From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E2BFC48BE8 for ; Fri, 18 Jun 2021 08:31:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B552D60FE3 for ; Fri, 18 Jun 2021 08:31:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B552D60FE3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3046F6E986; Fri, 18 Jun 2021 08:31:34 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id D83CE6E841; Fri, 18 Jun 2021 08:31:32 +0000 (UTC) IronPort-SDR: /rn+ZTWrPAT38lZcXcqwQKCfCwbs1VQoRaqSKGBGHsi67hA8ew1Ad72xWBFWgjK/8KSFQXz/EA XKmFnYgxDnuw== X-IronPort-AV: E=McAfee;i="6200,9189,10018"; a="204689094" X-IronPort-AV: E=Sophos;i="5.83,283,1616482800"; d="scan'208";a="204689094" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jun 2021 01:31:31 -0700 IronPort-SDR: qu5/NKVZLN2eS0CYpr1BxnA8ENYRLHB/xFhOcb58yhBEbSB3xxTaLLZP4m86G1t7JO+wb+hRWC NezK20j2T1hw== X-IronPort-AV: E=Sophos;i="5.83,283,1616482800"; d="scan'208";a="479759540" Received: from jhogberg-mobl1.ger.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.60]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jun 2021 01:31:29 -0700 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Fri, 18 Jun 2021 10:31:17 +0200 Message-Id: <20210618083117.158081-1-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915/ttm: Fix incorrect assumptions about ttm_bo_validate() semantics X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , matthew.auld@intel.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" V2UgaGF2ZSBhc3N1bWVkIHRoYXQgaWYgdGhlIGN1cnJlbnQgcGxhY2VtZW50IHdhcyBub3QgdGhl IHJlcXVlc3RlZApwbGFjZW1lbnQsIGJ1dCBpbnN0ZWFkIG9uZSBvZiB0aGUgYnVzeSBwbGFjZW1l bnRzLCBhIFRUTSBtb3ZlIHdvdWxkIGhhdmUKYmVlbiB0cmlnZ2VyZWQuIFRoYXQgaXMgbm90IHRo ZSBjYXNlLgoKU28gd2hlbiB3ZSBpbml0aWFsbHkgcGxhY2UgTE1FTSBvYmplY3RzIGluICJMaW1i byIsICh0aGF0IGlzIHN5c3RlbQpwbGFjZW1lbnQgd2l0aG91dCBhbnkgcGFnZXMgYWxsb2NhdGVk KSwgdG8gYmUgYWJsZSB0byBkZWZlciBjbGVhcmluZwpvYmplY3RzIHVudGlsIGZpcnN0IGdldF9w YWdlcygpLCB0aGUgZmlyc3QgZ2V0X3BhZ2VzKCkgd291bGQgaGFwcGlseSBrZWVwCm9iamVjdHMg aW4gc3lzdGVtIG1lbW9yeSBpZiB0aGF0IGlzIG9uZSBvZiB0aGUgYWxsb3dlZCBwbGFjZW1lbnRz LiBBbmQKc2luY2Ugd2UgZG9uJ3QgeWV0IHN1cHBvcnQgaTkxNSBHRU0gc3lzdGVtIG1lbW9yeSBm cm9tIFRUTSwgZXZlcnl0aGluZwpicmVha3MgYXBhcnQuCgpTbyBtYWtlIHN1cmUgd2UgdHJ5IHRo ZSByZXF1ZXN0ZWQgcGxhY2VtZW50IGZpcnN0LCBpZiBubyBldmljdGlvbiBpcwpuZWVkZWQuIElm IHRoYXQgZmFpbHMsIHJldHJ5IHdpdGggYWxsIGFsbG93ZWQgcGxhY2VtZW50cyBhbHNvIGFsbG93 aW5nCmV2aWN0aW9ucy4gQWxzbyBtYWtlIHN1cmUgd2UgaGFuZGxlIFRUTSBmYWlsdXJlIGNvZGVz IGNvcnJlY3RseS4KCkFsc28gdGVtcG9yYXJpbHkgKHVudGlsIHdlIHN1cHBvcnQgaTkxNSBHRU0g c3lzdGVtIG9uIFRUTSksIHJlc3RyaWN0CmFsbG93ZWQgcGxhY2VtZW50cyB0byB0aGUgcmVxdWVz dGVkIHBsYWNlbWVudCB0byBhdm9pZCB0aGluZ3MgZmFsbGluZwphcGFydCBzaG91bGQgTE1FTSBi ZSBmdWxsLgoKRml4ZXM6IDM4ZjI4YzA2OTVjMCAoImRybS9pOTE1L3R0bTogQ2FsY3VsYXRlIHRo ZSBvYmplY3QgcGxhY2VtZW50IGF0IGdldF9wYWdlcyB0aW1lKQpTaWduZWQtb2ZmLWJ5OiBUaG9t YXMgSGVsbHN0csO2bSA8dGhvbWFzLmhlbGxzdHJvbUBsaW51eC5pbnRlbC5jb20+Ci0tLQogZHJp dmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3R0bS5jIHwgNjEgKysrKysrKysrKysrKysr KysrKysrKystLQogMSBmaWxlIGNoYW5nZWQsIDU4IGluc2VydGlvbnMoKyksIDMgZGVsZXRpb25z KC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3R0bS5j IGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3R0bS5jCmluZGV4IGRmNDY1MzVj Y2E0Ny4uNGJiMDQ0MGY2OTNjIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0v aTkxNV9nZW1fdHRtLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3R0 bS5jCkBAIC02NCw2ICs2NCwzMCBAQCBzdGF0aWMgc3RydWN0IHR0bV9wbGFjZW1lbnQgaTkxNV9z eXNfcGxhY2VtZW50ID0gewogCS5idXN5X3BsYWNlbWVudCA9ICZzeXNfcGxhY2VtZW50X2ZsYWdz LAogfTsKIAorc3RhdGljIGludCBpOTE1X3R0bV9lcnJfdG9fZ2VtKGludCBlcnIpCit7CisJLyog RmFzdHBhdGggKi8KKwlpZiAobGlrZWx5KCFlcnIpKQorCQlyZXR1cm4gMDsKKworCXN3aXRjaCAo ZXJyKSB7CisJY2FzZSAtRUJVU1k6CisJCS8qCisJCSAqIFRUTSBsaWtlcyB0byBjb252ZXJ0IC1F REVBRExLIHRvIC1FQlVTWSwgYW5kIHdhbnRzIHVzIHRvCisJCSAqIHJlc3RhcnQgdGhlIG9wZXJh dGlvbiwgc2luY2Ugd2UgZG9uJ3QgcmVjb3JkIHRoZSBjb250ZW5kaW5nCisJCSAqIGxvY2suIFdl IHVzZSAtRUFHQUlOIHRvIHJlc3RhcnQuCisJCSAqLworCQlyZXR1cm4gLUVBR0FJTjsKKwljYXNl IC1FTk9TUEM6CisJCS8qIE1lbW9yeSB0eXBlIC8gcmVnaW9uIGlzIGZ1bGwsIGFuZCB3ZSBjYW4n dCBldmljdC4gKi8KKwkJcmV0dXJuIC1FTlhJTzsKKwlkZWZhdWx0OgorCQlicmVhazsKKwl9CisK KwlyZXR1cm4gZXJyOworfQorCiBzdGF0aWMgdm9pZCBpOTE1X3R0bV9hZGp1c3RfbHJ1KHN0cnVj dCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopOwogCiBzdGF0aWMgZW51bSB0dG1fY2FjaGluZwpA QCAtNTIyLDE1ICs1NDYsNDYgQEAgc3RhdGljIGludCBpOTE1X3R0bV9nZXRfcGFnZXMoc3RydWN0 IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaikKIAlzdHJ1Y3Qgc2dfdGFibGUgKnN0OwogCXN0cnVj dCB0dG1fcGxhY2UgcmVxdWVzdGVkLCBidXN5W0k5MTVfVFRNX01BWF9QTEFDRU1FTlRTXTsKIAlz dHJ1Y3QgdHRtX3BsYWNlbWVudCBwbGFjZW1lbnQ7CisJaW50IHJlYWxfbnVtX2J1c3k7CiAJaW50 IHJldDsKIAogCUdFTV9CVUdfT04ob2JqLT5tbS5uX3BsYWNlbWVudHMgPiBJOTE1X1RUTV9NQVhf UExBQ0VNRU5UUyk7CiAKIAkvKiBNb3ZlIHRvIHRoZSByZXF1ZXN0ZWQgcGxhY2VtZW50LiAqLwog CWk5MTVfdHRtX3BsYWNlbWVudF9mcm9tX29iaihvYmosICZyZXF1ZXN0ZWQsIGJ1c3ksICZwbGFj ZW1lbnQpOworCisJLyoKKwkgKiBGb3Igbm93IHdlIHN1cHBvcnQgTE1FTSBvbmx5IHdpdGggVFRN LgorCSAqIFRPRE86IFJlbW92ZSB3aXRoIHN5c3RlbSBzdXBwb3J0CisJICovCisJR0VNX0JVR19P TihyZXF1ZXN0ZWQubWVtX3R5cGUgPCBJOTE1X1BMX0xNRU0wIHx8CisJCSAgIGJ1c3lbMF0ubWVt X3R5cGUgPCBJOTE1X1BMX0xNRU0wKTsKKworCS8qIEZpcnN0IHRyeSBvbmx5IHRoZSByZXF1ZXN0 ZWQgcGxhY2VtZW50LiBObyBldmljdGlvbi4gKi8KKwlyZWFsX251bV9idXN5ID0gZmV0Y2hfYW5k X3plcm8oJnBsYWNlbWVudC5udW1fYnVzeV9wbGFjZW1lbnQpOwogCXJldCA9IHR0bV9ib192YWxp ZGF0ZShibywgJnBsYWNlbWVudCwgJmN0eCk7Ci0JaWYgKHJldCkKLQkJcmV0dXJuIHJldCA9PSAt RU5PU1BDID8gLUVOWElPIDogcmV0OworCWlmIChyZXQpIHsKKwkJcmV0ID0gaTkxNV90dG1fZXJy X3RvX2dlbShyZXQpOworCQkvKgorCQkgKiBBbnl0aGluZyB0aGF0IHdhbnRzIHRvIHJlc3RhcnQg dGhlIG9wZXJhdGlvbiBnZXRzIHRvCisJCSAqIGRvIHRoYXQuCisJCSAqLworCQlpZiAocmV0ID09 IC1FREVBRExLIHx8IHJldCA9PSAtRUlOVFIgfHwgcmV0ID09IC1FUkVTVEFSVFNZUyB8fAorCQkg ICAgcmV0ID09IC1FQUdBSU4pCisJCQlyZXR1cm4gcmV0OworCisJCS8qIFRPRE86IFJlbW92ZSB0 aGlzIHdoZW4gd2Ugc3VwcG9ydCBzeXN0ZW0gYXMgVFRNLiAqLworCQlyZWFsX251bV9idXN5ID0g MTsKKworCQkvKgorCQkgKiBJZiB0aGUgaW5pdGlhbCBhdHRlbXB0IGZhaWxzLCBhbGxvdyBhbGwg YWNjZXB0ZWQgcGxhY2VtZW50cywKKwkJICogZXZpY3RpbmcgaWYgbmVjZXNzYXJ5LgorCQkgKi8K KwkJcGxhY2VtZW50Lm51bV9idXN5X3BsYWNlbWVudCA9IHJlYWxfbnVtX2J1c3k7CisJCXJldCA9 IHR0bV9ib192YWxpZGF0ZShibywgJnBsYWNlbWVudCwgJmN0eCk7CisJCWlmIChyZXQpCisJCQly ZXR1cm4gaTkxNV90dG1fZXJyX3RvX2dlbShyZXQpOworCX0KIAogCS8qIE9iamVjdCBlaXRoZXIg aGFzIGEgcGFnZSB2ZWN0b3Igb3IgaXMgYW4gaW9tZW0gb2JqZWN0ICovCiAJc3QgPSBiby0+dHRt ID8gaTkxNV90dG1fdHRfZ2V0X3N0KGJvLT50dG0pIDogb2JqLT50dG0uY2FjaGVkX2lvX3N0OwpA QCAtNzQxLDUgKzc5Niw1IEBAIGludCBfX2k5MTVfZ2VtX3R0bV9vYmplY3RfaW5pdChzdHJ1Y3Qg aW50ZWxfbWVtb3J5X3JlZ2lvbiAqbWVtLAogCQlvYmotPnR0bS5jcmVhdGVkID0gdHJ1ZTsKIAog CS8qIGk5MTUgd2FudHMgLUVOWElPIHdoZW4gb3V0IG9mIG1lbW9yeSByZWdpb24gc3BhY2UuICov Ci0JcmV0dXJuIChyZXQgPT0gLUVOT1NQQykgPyAtRU5YSU8gOiByZXQ7CisJcmV0dXJuIGk5MTVf dHRtX2Vycl90b19nZW0ocmV0KTsKIH0KLS0gCjIuMzEuMQoKX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1n ZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21h aWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94808C48BDF for ; Fri, 18 Jun 2021 08:31:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4EF6A60FE3 for ; Fri, 18 Jun 2021 08:31:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4EF6A60FE3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6B01D6E987; Fri, 18 Jun 2021 08:31:34 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id D83CE6E841; Fri, 18 Jun 2021 08:31:32 +0000 (UTC) IronPort-SDR: /rn+ZTWrPAT38lZcXcqwQKCfCwbs1VQoRaqSKGBGHsi67hA8ew1Ad72xWBFWgjK/8KSFQXz/EA XKmFnYgxDnuw== X-IronPort-AV: E=McAfee;i="6200,9189,10018"; a="204689094" X-IronPort-AV: E=Sophos;i="5.83,283,1616482800"; d="scan'208";a="204689094" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jun 2021 01:31:31 -0700 IronPort-SDR: qu5/NKVZLN2eS0CYpr1BxnA8ENYRLHB/xFhOcb58yhBEbSB3xxTaLLZP4m86G1t7JO+wb+hRWC NezK20j2T1hw== X-IronPort-AV: E=Sophos;i="5.83,283,1616482800"; d="scan'208";a="479759540" Received: from jhogberg-mobl1.ger.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.60]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jun 2021 01:31:29 -0700 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH] drm/i915/ttm: Fix incorrect assumptions about ttm_bo_validate() semantics Date: Fri, 18 Jun 2021 10:31:17 +0200 Message-Id: <20210618083117.158081-1-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , matthew.auld@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We have assumed that if the current placement was not the requested placement, but instead one of the busy placements, a TTM move would have been triggered. That is not the case. So when we initially place LMEM objects in "Limbo", (that is system placement without any pages allocated), to be able to defer clearing objects until first get_pages(), the first get_pages() would happily keep objects in system memory if that is one of the allowed placements. And since we don't yet support i915 GEM system memory from TTM, everything breaks apart. So make sure we try the requested placement first, if no eviction is needed. If that fails, retry with all allowed placements also allowing evictions. Also make sure we handle TTM failure codes correctly. Also temporarily (until we support i915 GEM system on TTM), restrict allowed placements to the requested placement to avoid things falling apart should LMEM be full. Fixes: 38f28c0695c0 ("drm/i915/ttm: Calculate the object placement at get_pages time) Signed-off-by: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 61 +++++++++++++++++++++++-- 1 file changed, 58 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index df46535cca47..4bb0440f693c 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -64,6 +64,30 @@ static struct ttm_placement i915_sys_placement = { .busy_placement = &sys_placement_flags, }; +static int i915_ttm_err_to_gem(int err) +{ + /* Fastpath */ + if (likely(!err)) + return 0; + + switch (err) { + case -EBUSY: + /* + * TTM likes to convert -EDEADLK to -EBUSY, and wants us to + * restart the operation, since we don't record the contending + * lock. We use -EAGAIN to restart. + */ + return -EAGAIN; + case -ENOSPC: + /* Memory type / region is full, and we can't evict. */ + return -ENXIO; + default: + break; + } + + return err; +} + static void i915_ttm_adjust_lru(struct drm_i915_gem_object *obj); static enum ttm_caching @@ -522,15 +546,46 @@ static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) struct sg_table *st; struct ttm_place requested, busy[I915_TTM_MAX_PLACEMENTS]; struct ttm_placement placement; + int real_num_busy; int ret; GEM_BUG_ON(obj->mm.n_placements > I915_TTM_MAX_PLACEMENTS); /* Move to the requested placement. */ i915_ttm_placement_from_obj(obj, &requested, busy, &placement); + + /* + * For now we support LMEM only with TTM. + * TODO: Remove with system support + */ + GEM_BUG_ON(requested.mem_type < I915_PL_LMEM0 || + busy[0].mem_type < I915_PL_LMEM0); + + /* First try only the requested placement. No eviction. */ + real_num_busy = fetch_and_zero(&placement.num_busy_placement); ret = ttm_bo_validate(bo, &placement, &ctx); - if (ret) - return ret == -ENOSPC ? -ENXIO : ret; + if (ret) { + ret = i915_ttm_err_to_gem(ret); + /* + * Anything that wants to restart the operation gets to + * do that. + */ + if (ret == -EDEADLK || ret == -EINTR || ret == -ERESTARTSYS || + ret == -EAGAIN) + return ret; + + /* TODO: Remove this when we support system as TTM. */ + real_num_busy = 1; + + /* + * If the initial attempt fails, allow all accepted placements, + * evicting if necessary. + */ + placement.num_busy_placement = real_num_busy; + ret = ttm_bo_validate(bo, &placement, &ctx); + if (ret) + return i915_ttm_err_to_gem(ret); + } /* Object either has a page vector or is an iomem object */ st = bo->ttm ? i915_ttm_tt_get_st(bo->ttm) : obj->ttm.cached_io_st; @@ -741,5 +796,5 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem, obj->ttm.created = true; /* i915 wants -ENXIO when out of memory region space. */ - return (ret == -ENOSPC) ? -ENXIO : ret; + return i915_ttm_err_to_gem(ret); } -- 2.31.1