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header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A50DB6EB29; Thu, 24 Jun 2021 08:43:09 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 15A176EB24; Thu, 24 Jun 2021 08:43:08 +0000 (UTC) IronPort-SDR: eMZPo9GP6VLkMcQIKyy0HBBsItWuzMJqqI27dzfQ14CNujiZ7R5CeRc1B/PzTDdf1Tt/Dpqe55 hJdpE7u/XMcg== X-IronPort-AV: E=McAfee;i="6200,9189,10024"; a="205601338" X-IronPort-AV: E=Sophos;i="5.83,296,1616482800"; d="scan'208";a="205601338" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2021 01:43:07 -0700 IronPort-SDR: mmq+f4tzdaTQXPj4AmXBExJGRbptiSlUKwl5NlFAXKf998M7roe5l5Ewna1KddFf4Rja2n+Fl5 Azo2h8Jtp8hQ== X-IronPort-AV: E=Sophos;i="5.83,296,1616482800"; d="scan'208";a="453344917" Received: from cmutgix-mobl.gar.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.20]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2021 01:43:05 -0700 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 24 Jun 2021 10:42:38 +0200 Message-Id: <20210624084240.270219-2-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210624084240.270219-1-thomas.hellstrom@linux.intel.com> References: <20210624084240.270219-1-thomas.hellstrom@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v10 1/3] drm/i915: Update object placement flags to be mutable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , matthew.auld@intel.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VGhlIG9iamVjdCBvcHMgaTkxNV9HRU1fT0JKRUNUX0hBU19JT01FTSBhbmQgdGhlIG9iamVjdApJ OTE1X0JPX0FMTE9DX1NUUlVDVF9QQUdFIGZsYWdzIGFyZSBjb25zaWRlcmVkIGltbXV0YWJsZSBi eQptdWNoIG9mIG91ciBjb2RlLiBJbnRyb2R1Y2UgYSBuZXcgbWVtX2ZsYWdzIG1lbWJlciB0byBo b2xkIHRoZXNlCmFuZCBtYWtlIHN1cmUgY2hlY2tzIGZvciB0aGVzZSBmbGFncyBiZWluZyBzZXQg YXJlIGVpdGhlciBkb25lCnVuZGVyIHRoZSBvYmplY3QgbG9jayBvciB3aXRoIHBhZ2VzIHByb3Bl cmx5IHBpbm5lZC4gVGhlIGZsYWdzCndpbGwgY2hhbmdlIGR1cmluZyBtaWdyYXRpb24gdW5kZXIg dGhlIG9iamVjdCBsb2NrLgoKU2lnbmVkLW9mZi1ieTogVGhvbWFzIEhlbGxzdHLDtm0gPHRob21h cy5oZWxsc3Ryb21AbGludXguaW50ZWwuY29tPgpSZXZpZXdlZC1ieTogTWF0dGhldyBBdWxkIDxt YXR0aGV3LmF1bGRAaW50ZWwuY29tPgotLS0KdjI6Ci0gVW5jb25kaXRpb25hbGx5IHNldCBWTV9J TyBvbiBvdXIgVk1BcyBpbiBsaW5lIHdpdGggdGhlIHJlc3QgY29yZSBnZW0KICBhbmQgVFRNLiBT aW5jZSB0aGUgYm8gbWlnaHQgYmUgbWlncmF0ZWQgd2hpbGUgdGhlIFZNQSBpcyBzdGlsbCBhbGl2 ZSwKICB0aGVyZSBpcyBubyBzZW5zZSwgd2hldGhlciBvciBub3QgaXQgbWFwcyBpb21lbSBtaWdo dCBjaGFuZ2UuCnY2OgotIEludHJvZHVjZSBhIF9faTkxNV9nZW1fb2JqZWN0X2lzX2xtZW0oKSB0 byBiZSB1c2VkIGluIHNpdHVhdGlvbnMgd2hlcmUgd2UKICBrbm93IHRoYXQgYSBmZW5jZSB0aGF0 IGNhbid0IGN1cnJlbnRseSBzaWduYWwga2VlcHMgdGhlIG9iamVjdCBmcm9tIGJlaW5nCiAgbWln cmF0ZWQgb3IgZXZpY3RlZC4KLSBNb3ZlIGEgY291cGxlIG9mIHNobWVtIHdhcm5pbmdzIGZvciBE R0ZYIHRvIGEgbGF0ZXIgcGF0Y2ggd2hlcmUgd2UKICBhY3R1YWxseSBtb3ZlIHN5c3RlbSBtZW1v cnkgdG8gVFRNLgp2MTA6Ci0gQWRkIHNvbWUgY29tbWVudHMgYXJvdW5kIHRoZSBnZW0gb2JqZWN0 ICJtZW1fZmxhZ3MiIGZpZWxkLCBhbmQKICB1c2UgYSBmdWxsIHVuc2lnbmVkIGludCBmb3IgaXQu IChTdWdnZXN0ZWQgYnkgRGFuaWVsIFZldHRlcikuCi0gQWRkIGFuIG9iamVjdCBsb2NrZWQgc2Vj dGlvbiB3aGlsZSBjaGVja2luZyBtZW1fZmxhZ3MgaW4gdGhlIGxpdmUKICBtbWFuIHNlbGZ0ZXN0 LgotLS0KIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9pbnRlcm5hbC5jICB8ICA0 ICstCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fbG1lbS5jICAgICAgfCAyMiAr KysrKysrKysrKwogZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX2xtZW0uaCAgICAg IHwgIDIgKwogZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX21tYW4uYyAgICAgIHwg MTIgKysrLS0tCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmMgICAg fCAzOCArKysrKysrKysrKysrKysrKysrCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9n ZW1fb2JqZWN0LmggICAgfCAxNCArKy0tLS0tCiAuLi4vZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dl bV9vYmplY3RfdHlwZXMuaCAgfCAyNyArKysrKysrKy0tLS0tCiBkcml2ZXJzL2dwdS9kcm0vaTkx NS9nZW0vaTkxNV9nZW1fcGFnZXMuYyAgICAgfCAgMiArLQogZHJpdmVycy9ncHUvZHJtL2k5MTUv Z2VtL2k5MTVfZ2VtX3BoeXMuYyAgICAgIHwgIDIgKy0KIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2dl bS9pOTE1X2dlbV9zaG1lbS5jICAgICB8ICA3ICsrLS0KIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2dl bS9pOTE1X2dlbV90dG0uYyAgICAgICB8ICAyICstCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0v aTkxNV9nZW1fdXNlcnB0ci5jICAgfCAgNCArLQogLi4uL2RybS9pOTE1L2dlbS9zZWxmdGVzdHMv aHVnZV9nZW1fb2JqZWN0LmMgIHwgIDQgKy0KIC4uLi9ncHUvZHJtL2k5MTUvZ2VtL3NlbGZ0ZXN0 cy9odWdlX3BhZ2VzLmMgICB8ICA1ICstLQogLi4uL2RybS9pOTE1L2dlbS9zZWxmdGVzdHMvaTkx NV9nZW1fbW1hbi5jICAgIHwgMjUgKysrKysrKystLS0tCiAuLi4vZHJtL2k5MTUvZ2VtL3NlbGZ0 ZXN0cy9pOTE1X2dlbV9waHlzLmMgICAgfCAgMyArLQogZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkx NV9ncHVfZXJyb3IuYyAgICAgICAgIHwgIDIgKy0KIDE3IGZpbGVzIGNoYW5nZWQsIDEyMyBpbnNl cnRpb25zKCspLCA1MiBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0v aTkxNS9nZW0vaTkxNV9nZW1faW50ZXJuYWwuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9p OTE1X2dlbV9pbnRlcm5hbC5jCmluZGV4IGNlNmI2NjRiMTBhYS4uMTNiMjE3Zjc1MDU1IDEwMDY0 NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1faW50ZXJuYWwuYworKysg Yi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1faW50ZXJuYWwuYwpAQCAtMTc3LDgg KzE3Nyw4IEBAIGk5MTVfZ2VtX29iamVjdF9jcmVhdGVfaW50ZXJuYWwoc3RydWN0IGRybV9pOTE1 X3ByaXZhdGUgKmk5MTUsCiAJCXJldHVybiBFUlJfUFRSKC1FTk9NRU0pOwogCiAJZHJtX2dlbV9w cml2YXRlX29iamVjdF9pbml0KCZpOTE1LT5kcm0sICZvYmotPmJhc2UsIHNpemUpOwotCWk5MTVf Z2VtX29iamVjdF9pbml0KG9iaiwgJmk5MTVfZ2VtX29iamVjdF9pbnRlcm5hbF9vcHMsICZsb2Nr X2NsYXNzLAotCQkJICAgICBJOTE1X0JPX0FMTE9DX1NUUlVDVF9QQUdFKTsKKwlpOTE1X2dlbV9v YmplY3RfaW5pdChvYmosICZpOTE1X2dlbV9vYmplY3RfaW50ZXJuYWxfb3BzLCAmbG9ja19jbGFz cywgMCk7CisJb2JqLT5tZW1fZmxhZ3MgfD0gSTkxNV9CT19GTEFHX1NUUlVDVF9QQUdFOwogCiAJ LyoKIAkgKiBNYXJrIHRoZSBvYmplY3QgYXMgdm9sYXRpbGUsIHN1Y2ggdGhhdCB0aGUgcGFnZXMg YXJlIG1hcmtlZCBhcwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVf Z2VtX2xtZW0uYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9sbWVtLmMKaW5k ZXggZDUzOWRmZmExNTU0Li40MWQ1MTgyY2QzNjcgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2dlbS9pOTE1X2dlbV9sbWVtLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2Vt L2k5MTVfZ2VtX2xtZW0uYwpAQCAtNzEsNiArNzEsMjggQEAgYm9vbCBpOTE1X2dlbV9vYmplY3Rf aXNfbG1lbShzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKQogCQkgICAgICBtci0+dHlw ZSA9PSBJTlRFTF9NRU1PUllfU1RPTEVOX0xPQ0FMKTsKIH0KIAorLyoqCisgKiBfX2k5MTVfZ2Vt X29iamVjdF9pc19sbWVtIC0gV2hldGhlciB0aGUgb2JqZWN0IGlzIHJlc2lkZW50IGluCisgKiBs bWVtIHdoaWxlIGluIHRoZSBmZW5jZSBzaWduYWxpbmcgY3JpdGljYWwgcGF0aC4KKyAqIEBvYmo6 IFRoZSBvYmplY3QgdG8gY2hlY2suCisgKgorICogVGhpcyBmdW5jdGlvbiBpcyBpbnRlbmRlZCB0 byBiZSBjYWxsZWQgZnJvbSB3aXRoaW4gdGhlIGZlbmNlIHNpZ25hbGluZworICogcGF0aCB3aGVy ZSB0aGUgZmVuY2Uga2VlcHMgdGhlIG9iamVjdCBmcm9tIGJlaW5nIG1pZ3JhdGVkLiBGb3IgZXhh bXBsZQorICogZHVyaW5nIGdwdSByZXNldCBvciBzaW1pbGFyLgorICoKKyAqIFJldHVybjogV2hl dGhlciB0aGUgb2JqZWN0IGlzIHJlc2lkZW50IGluIGxtZW0uCisgKi8KK2Jvb2wgX19pOTE1X2dl bV9vYmplY3RfaXNfbG1lbShzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKQoreworCXN0 cnVjdCBpbnRlbF9tZW1vcnlfcmVnaW9uICptciA9IFJFQURfT05DRShvYmotPm1tLnJlZ2lvbik7 CisKKyNpZmRlZiBDT05GSUdfTE9DS0RFUAorCUdFTV9XQVJOX09OKGRtYV9yZXN2X3Rlc3Rfc2ln bmFsZWQob2JqLT5iYXNlLnJlc3YsIHRydWUpKTsKKyNlbmRpZgorCXJldHVybiBtciAmJiAobXIt PnR5cGUgPT0gSU5URUxfTUVNT1JZX0xPQ0FMIHx8CisJCSAgICAgIG1yLT50eXBlID09IElOVEVM X01FTU9SWV9TVE9MRU5fTE9DQUwpOworfQorCiBzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAq CiBpOTE1X2dlbV9vYmplY3RfY3JlYXRlX2xtZW0oc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmk5 MTUsCiAJCQkgICAgcmVzb3VyY2Vfc2l6ZV90IHNpemUsCmRpZmYgLS1naXQgYS9kcml2ZXJzL2dw dS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fbG1lbS5oIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2Vt L2k5MTVfZ2VtX2xtZW0uaAppbmRleCBlYTc2ZmQxMWNjYjAuLjI3YTYxMWRlYmE0NyAxMDA2NDQK LS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX2xtZW0uaAorKysgYi9kcml2 ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fbG1lbS5oCkBAIC0yMSw2ICsyMSw4IEBAIGk5 MTVfZ2VtX29iamVjdF9sbWVtX2lvX21hcChzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2Jq LAogCiBib29sIGk5MTVfZ2VtX29iamVjdF9pc19sbWVtKHN0cnVjdCBkcm1faTkxNV9nZW1fb2Jq ZWN0ICpvYmopOwogCitib29sIF9faTkxNV9nZW1fb2JqZWN0X2lzX2xtZW0oc3RydWN0IGRybV9p OTE1X2dlbV9vYmplY3QgKm9iaik7CisKIHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICoKIGk5 MTVfZ2VtX29iamVjdF9jcmVhdGVfbG1lbShzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqaTkxNSwK IAkJCSAgICByZXNvdXJjZV9zaXplX3Qgc2l6ZSwKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2dlbS9pOTE1X2dlbV9tbWFuLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkx NV9nZW1fbW1hbi5jCmluZGV4IDJmZDE1NTc0MmJkMi4uNjQ5N2EyZGJkYWI5IDEwMDY0NAotLS0g YS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fbW1hbi5jCisrKyBiL2RyaXZlcnMv Z3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9tbWFuLmMKQEAgLTY4NCw3ICs2ODQsNyBAQCBfX2Fz c2lnbl9tbWFwX29mZnNldChzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqLAogCiAJaWYg KG1tYXBfdHlwZSAhPSBJOTE1X01NQVBfVFlQRV9HVFQgJiYKIAkgICAgIWk5MTVfZ2VtX29iamVj dF9oYXNfc3RydWN0X3BhZ2Uob2JqKSAmJgotCSAgICAhaTkxNV9nZW1fb2JqZWN0X3R5cGVfaGFz KG9iaiwgSTkxNV9HRU1fT0JKRUNUX0hBU19JT01FTSkpCisJICAgICFpOTE1X2dlbV9vYmplY3Rf aGFzX2lvbWVtKG9iaikpCiAJCXJldHVybiAtRU5PREVWOwogCiAJbW1vID0gbW1hcF9vZmZzZXRf YXR0YWNoKG9iaiwgbW1hcF90eXBlLCBmaWxlKTsKQEAgLTcwOCw3ICs3MDgsMTIgQEAgX19hc3Np Z25fbW1hcF9vZmZzZXRfaGFuZGxlKHN0cnVjdCBkcm1fZmlsZSAqZmlsZSwKIAlpZiAoIW9iaikK IAkJcmV0dXJuIC1FTk9FTlQ7CiAKKwllcnIgPSBpOTE1X2dlbV9vYmplY3RfbG9ja19pbnRlcnJ1 cHRpYmxlKG9iaiwgTlVMTCk7CisJaWYgKGVycikKKwkJZ290byBvdXRfcHV0OwogCWVyciA9IF9f YXNzaWduX21tYXBfb2Zmc2V0KG9iaiwgbW1hcF90eXBlLCBvZmZzZXQsIGZpbGUpOworCWk5MTVf Z2VtX29iamVjdF91bmxvY2sob2JqKTsKK291dF9wdXQ6CiAJaTkxNV9nZW1fb2JqZWN0X3B1dChv YmopOwogCXJldHVybiBlcnI7CiB9CkBAIC05MzIsMTAgKzkzNyw3IEBAIGludCBpOTE1X2dlbV9t bWFwKHN0cnVjdCBmaWxlICpmaWxwLCBzdHJ1Y3Qgdm1fYXJlYV9zdHJ1Y3QgKnZtYSkKIAkJcmV0 dXJuIFBUUl9FUlIoYW5vbik7CiAJfQogCi0Jdm1hLT52bV9mbGFncyB8PSBWTV9QRk5NQVAgfCBW TV9ET05URVhQQU5EIHwgVk1fRE9OVERVTVA7Ci0KLQlpZiAoaTkxNV9nZW1fb2JqZWN0X2hhc19p b21lbShvYmopKQotCQl2bWEtPnZtX2ZsYWdzIHw9IFZNX0lPOworCXZtYS0+dm1fZmxhZ3MgfD0g Vk1fUEZOTUFQIHwgVk1fRE9OVEVYUEFORCB8IFZNX0RPTlREVU1QIHwgVk1fSU87CiAKIAkvKgog CSAqIFdlIGtlZXAgdGhlIHJlZiBvbiBtbW8tPm9iaiwgbm90IHZtX2ZpbGUsIGJ1dCB3ZSByZXF1 aXJlCmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0 LmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmMKaW5kZXggY2Yx OGM0MzBkNTFmLi4wN2U4ZmY5YThhYWUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1 L2dlbS9pOTE1X2dlbV9vYmplY3QuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkx NV9nZW1fb2JqZWN0LmMKQEAgLTQ3NSw2ICs0NzUsNDQgQEAgYm9vbCBpOTE1X2dlbV9vYmplY3Rf bWlncmF0YWJsZShzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKQogCXJldHVybiBvYmot Pm1tLm5fcGxhY2VtZW50cyA+IDE7CiB9CiAKKy8qKgorICogaTkxNV9nZW1fb2JqZWN0X2hhc19z dHJ1Y3RfcGFnZSAtIFdoZXRoZXIgdGhlIG9iamVjdCBpcyBwYWdlLWJhY2tlZAorICogQG9iajog VGhlIG9iamVjdCB0byBxdWVyeS4KKyAqCisgKiBUaGlzIGZ1bmN0aW9uIHNob3VsZCBvbmx5IGJl IGNhbGxlZCB3aGlsZSB0aGUgb2JqZWN0IGlzIGxvY2tlZCBvciBwaW5uZWQsCisgKiBvdGhlcndp c2UgdGhlIHBhZ2UgYmFja2luZyBtYXkgY2hhbmdlIHVuZGVyIHRoZSBjYWxsZXIuCisgKgorICog UmV0dXJuOiBUcnVlIGlmIHBhZ2UtYmFja2VkLCBmYWxzZSBvdGhlcndpc2UuCisgKi8KK2Jvb2wg aTkxNV9nZW1fb2JqZWN0X2hhc19zdHJ1Y3RfcGFnZShjb25zdCBzdHJ1Y3QgZHJtX2k5MTVfZ2Vt X29iamVjdCAqb2JqKQoreworI2lmZGVmIENPTkZJR19MT0NLREVQCisJaWYgKElTX0RHRlgodG9f aTkxNShvYmotPmJhc2UuZGV2KSkgJiYKKwkgICAgaTkxNV9nZW1fb2JqZWN0X2V2aWN0YWJsZSgo dm9pZCBfX2ZvcmNlICopb2JqKSkKKwkJYXNzZXJ0X29iamVjdF9oZWxkX3NoYXJlZChvYmopOwor I2VuZGlmCisJcmV0dXJuIG9iai0+bWVtX2ZsYWdzICYgSTkxNV9CT19GTEFHX1NUUlVDVF9QQUdF OworfQorCisvKioKKyAqIGk5MTVfZ2VtX29iamVjdF9oYXNfaW9tZW0gLSBXaGV0aGVyIHRoZSBv YmplY3QgaXMgaW9tZW0tYmFja2VkCisgKiBAb2JqOiBUaGUgb2JqZWN0IHRvIHF1ZXJ5LgorICoK KyAqIFRoaXMgZnVuY3Rpb24gc2hvdWxkIG9ubHkgYmUgY2FsbGVkIHdoaWxlIHRoZSBvYmplY3Qg aXMgbG9ja2VkIG9yIHBpbm5lZCwKKyAqIG90aGVyd2lzZSB0aGUgaW9tZW0gYmFja2luZyBtYXkg Y2hhbmdlIHVuZGVyIHRoZSBjYWxsZXIuCisgKgorICogUmV0dXJuOiBUcnVlIGlmIGlvbWVtLWJh Y2tlZCwgZmFsc2Ugb3RoZXJ3aXNlLgorICovCitib29sIGk5MTVfZ2VtX29iamVjdF9oYXNfaW9t ZW0oY29uc3Qgc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaikKK3sKKyNpZmRlZiBDT05G SUdfTE9DS0RFUAorCWlmIChJU19ER0ZYKHRvX2k5MTUob2JqLT5iYXNlLmRldikpICYmCisJICAg IGk5MTVfZ2VtX29iamVjdF9ldmljdGFibGUoKHZvaWQgX19mb3JjZSAqKW9iaikpCisJCWFzc2Vy dF9vYmplY3RfaGVsZF9zaGFyZWQob2JqKTsKKyNlbmRpZgorCXJldHVybiBvYmotPm1lbV9mbGFn cyAmIEk5MTVfQk9fRkxBR19JT01FTTsKK30KKwogdm9pZCBpOTE1X2dlbV9pbml0X19vYmplY3Rz KHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICppOTE1KQogewogCUlOSVRfV09SSygmaTkxNS0+bW0u ZnJlZV93b3JrLCBfX2k5MTVfZ2VtX2ZyZWVfd29yayk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dw dS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmggYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9n ZW0vaTkxNV9nZW1fb2JqZWN0LmgKaW5kZXggN2JmNGRkNDZkOGQyLi5lYTMyMjRhNDgwYzQgMTAw NjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9vYmplY3QuaAorKysg Yi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmgKQEAgLTE0OCw3ICsx NDgsNyBAQCBpOTE1X2dlbV9vYmplY3RfcHV0KHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpv YmopCiAvKgogICogSWYgbW9yZSB0aGFuIG9uZSBwb3RlbnRpYWwgc2ltdWx0YW5lb3VzIGxvY2tl ciwgYXNzZXJ0IGhlbGQuCiAgKi8KLXN0YXRpYyBpbmxpbmUgdm9pZCBhc3NlcnRfb2JqZWN0X2hl bGRfc2hhcmVkKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCitzdGF0aWMgaW5saW5l IHZvaWQgYXNzZXJ0X29iamVjdF9oZWxkX3NoYXJlZChjb25zdCBzdHJ1Y3QgZHJtX2k5MTVfZ2Vt X29iamVjdCAqb2JqKQogewogCS8qCiAJICogTm90ZSBtbSBsaXN0IGxvb2t1cCBpcyBwcm90ZWN0 ZWQgYnkKQEAgLTI2NiwxNyArMjY2LDkgQEAgaTkxNV9nZW1fb2JqZWN0X3R5cGVfaGFzKGNvbnN0 IHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmosCiAJcmV0dXJuIG9iai0+b3BzLT5mbGFn cyAmIGZsYWdzOwogfQogCi1zdGF0aWMgaW5saW5lIGJvb2wKLWk5MTVfZ2VtX29iamVjdF9oYXNf c3RydWN0X3BhZ2UoY29uc3Qgc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaikKLXsKLQly ZXR1cm4gb2JqLT5mbGFncyAmIEk5MTVfQk9fQUxMT0NfU1RSVUNUX1BBR0U7Ci19Citib29sIGk5 MTVfZ2VtX29iamVjdF9oYXNfc3RydWN0X3BhZ2UoY29uc3Qgc3RydWN0IGRybV9pOTE1X2dlbV9v YmplY3QgKm9iaik7CiAKLXN0YXRpYyBpbmxpbmUgYm9vbAotaTkxNV9nZW1fb2JqZWN0X2hhc19p b21lbShjb25zdCBzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKQotewotCXJldHVybiBp OTE1X2dlbV9vYmplY3RfdHlwZV9oYXMob2JqLCBJOTE1X0dFTV9PQkpFQ1RfSEFTX0lPTUVNKTsK LX0KK2Jvb2wgaTkxNV9nZW1fb2JqZWN0X2hhc19pb21lbShjb25zdCBzdHJ1Y3QgZHJtX2k5MTVf Z2VtX29iamVjdCAqb2JqKTsKIAogc3RhdGljIGlubGluZSBib29sCiBpOTE1X2dlbV9vYmplY3Rf aXNfc2hyaW5rYWJsZShjb25zdCBzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKQpkaWZm IC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5o IGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oCmluZGV4 IDNhMmQ5ZWNmOGUwMy4uNDQxZjkxM2M4N2U2IDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0v aTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0X3R5cGVzLmgKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5 MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oCkBAIC0zMywxMCArMzMsOSBAQCBzdHJ1Y3Qg aTkxNV9sdXRfaGFuZGxlIHsKIAogc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3Rfb3BzIHsKIAl1 bnNpZ25lZCBpbnQgZmxhZ3M7Ci0jZGVmaW5lIEk5MTVfR0VNX09CSkVDVF9IQVNfSU9NRU0JQklU KDEpCi0jZGVmaW5lIEk5MTVfR0VNX09CSkVDVF9JU19TSFJJTktBQkxFCUJJVCgyKQotI2RlZmlu ZSBJOTE1X0dFTV9PQkpFQ1RfSVNfUFJPWFkJQklUKDMpCi0jZGVmaW5lIEk5MTVfR0VNX09CSkVD VF9OT19NTUFQCQlCSVQoNCkKKyNkZWZpbmUgSTkxNV9HRU1fT0JKRUNUX0lTX1NIUklOS0FCTEUJ QklUKDEpCisjZGVmaW5lIEk5MTVfR0VNX09CSkVDVF9JU19QUk9YWQlCSVQoMikKKyNkZWZpbmUg STkxNV9HRU1fT0JKRUNUX05PX01NQVAJCUJJVCgzKQogCiAJLyogSW50ZXJmYWNlIGJldHdlZW4g dGhlIEdFTSBvYmplY3QgYW5kIGl0cyBiYWNraW5nIHN0b3JhZ2UuCiAJICogZ2V0X3BhZ2VzKCkg aXMgY2FsbGVkIG9uY2UgcHJpb3IgdG8gdGhlIHVzZSBvZiB0aGUgYXNzb2NpYXRlZCBzZXQKQEAg LTIwMSwxNyArMjAwLDI1IEBAIHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0IHsKIAl1bnNpZ25l ZCBsb25nIGZsYWdzOwogI2RlZmluZSBJOTE1X0JPX0FMTE9DX0NPTlRJR1VPVVMgQklUKDApCiAj ZGVmaW5lIEk5MTVfQk9fQUxMT0NfVk9MQVRJTEUgICBCSVQoMSkKLSNkZWZpbmUgSTkxNV9CT19B TExPQ19TVFJVQ1RfUEFHRSBCSVQoMikKLSNkZWZpbmUgSTkxNV9CT19BTExPQ19DUFVfQ0xFQVIg IEJJVCgzKQotI2RlZmluZSBJOTE1X0JPX0FMTE9DX1VTRVIgICAgICAgQklUKDQpCisjZGVmaW5l IEk5MTVfQk9fQUxMT0NfQ1BVX0NMRUFSICBCSVQoMikKKyNkZWZpbmUgSTkxNV9CT19BTExPQ19V U0VSICAgICAgIEJJVCgzKQogI2RlZmluZSBJOTE1X0JPX0FMTE9DX0ZMQUdTIChJOTE1X0JPX0FM TE9DX0NPTlRJR1VPVVMgfCBcCiAJCQkgICAgIEk5MTVfQk9fQUxMT0NfVk9MQVRJTEUgfCBcCi0J CQkgICAgIEk5MTVfQk9fQUxMT0NfU1RSVUNUX1BBR0UgfCBcCiAJCQkgICAgIEk5MTVfQk9fQUxM T0NfQ1BVX0NMRUFSIHwgXAogCQkJICAgICBJOTE1X0JPX0FMTE9DX1VTRVIpCi0jZGVmaW5lIEk5 MTVfQk9fUkVBRE9OTFkgICAgICAgICBCSVQoNSkKLSNkZWZpbmUgSTkxNV9USUxJTkdfUVVJUktf QklUICAgIDYgLyogdW5rbm93biBzd2l6emxpbmc7IGRvIG5vdCByZWxlYXNlISAqLworI2RlZmlu ZSBJOTE1X0JPX1JFQURPTkxZICAgICAgICAgQklUKDQpCisjZGVmaW5lIEk5MTVfVElMSU5HX1FV SVJLX0JJVCAgICA1IC8qIHVua25vd24gc3dpenpsaW5nOyBkbyBub3QgcmVsZWFzZSEgKi8KIAor CS8qKgorCSAqIEBtZW1fZmxhZ3MgLSBNdXRhYmxlIHBsYWNlbWVudC1yZWxhdGVkIGZsYWdzCisJ ICoKKwkgKiBUaGVzZSBhcmUgZmxhZ3MgdGhhdCBpbmRpY2F0ZSBzcGVjaWZpY3Mgb2YgdGhlIG1l bW9yeSByZWdpb24KKwkgKiB0aGUgb2JqZWN0IGlzIGN1cnJlbnRseSBpbi4gQXMgc3VjaCB0aGV5 IGFyZSBvbmx5IHN0YWJsZQorCSAqIGVpdGhlciB1bmRlciB0aGUgb2JqZWN0IGxvY2sgb3IgaWYg dGhlIG9iamVjdCBpcyBwaW5uZWQuCisJICovCisJdW5zaWduZWQgaW50IG1lbV9mbGFnczsKKyNk ZWZpbmUgSTkxNV9CT19GTEFHX1NUUlVDVF9QQUdFIEJJVCgwKSAvKiBPYmplY3QgYmFja2VkIGJ5 IHN0cnVjdCBwYWdlcyAqLworI2RlZmluZSBJOTE1X0JPX0ZMQUdfSU9NRU0gICAgICAgQklUKDEp IC8qIE9iamVjdCBiYWNrZWQgYnkgSU8gbWVtb3J5ICovCiAJLyoKIAkgKiBJcyB0aGUgb2JqZWN0 IHRvIGJlIG1hcHBlZCBhcyByZWFkLW9ubHkgdG8gdGhlIEdQVQogCSAqIE9ubHkgaG9ub3VyZWQg aWYgaGFyZHdhcmUgaGFzIHJlbGV2YW50IHB0ZSBiaXQKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1 L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9wYWdlcy5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2Vt L2k5MTVfZ2VtX3BhZ2VzLmMKaW5kZXggMDg2MDA1YzFjN2VhLi5mMmY4NTBlMzFiOGUgMTAwNjQ0 Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9wYWdlcy5jCisrKyBiL2Ry aXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9wYWdlcy5jCkBAIC0zNTEsNyArMzUxLDcg QEAgdm9pZCAqaTkxNV9nZW1fb2JqZWN0X3Bpbl9tYXAoc3RydWN0IGRybV9pOTE1X2dlbV9vYmpl Y3QgKm9iaiwKIAlpbnQgZXJyOwogCiAJaWYgKCFpOTE1X2dlbV9vYmplY3RfaGFzX3N0cnVjdF9w YWdlKG9iaikgJiYKLQkgICAgIWk5MTVfZ2VtX29iamVjdF90eXBlX2hhcyhvYmosIEk5MTVfR0VN X09CSkVDVF9IQVNfSU9NRU0pKQorCSAgICAhaTkxNV9nZW1fb2JqZWN0X2hhc19pb21lbShvYmop KQogCQlyZXR1cm4gRVJSX1BUUigtRU5YSU8pOwogCiAJYXNzZXJ0X29iamVjdF9oZWxkKG9iaik7 CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fcGh5cy5jIGIv ZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3BoeXMuYwppbmRleCBiZTcyYWQwNjM0 YmEuLjc5ODY2MTJmNDhmYSAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5 MTVfZ2VtX3BoeXMuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fcGh5 cy5jCkBAIC03Niw3ICs3Niw3IEBAIHN0YXRpYyBpbnQgaTkxNV9nZW1fb2JqZWN0X2dldF9wYWdl c19waHlzKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCiAJaW50ZWxfZ3RfY2hpcHNl dF9mbHVzaCgmdG9faTkxNShvYmotPmJhc2UuZGV2KS0+Z3QpOwogCiAJLyogV2UncmUgbm8gbG9u Z2VyIHN0cnVjdCBwYWdlIGJhY2tlZCAqLwotCW9iai0+ZmxhZ3MgJj0gfkk5MTVfQk9fQUxMT0Nf U1RSVUNUX1BBR0U7CisJb2JqLT5tZW1fZmxhZ3MgJj0gfkk5MTVfQk9fRkxBR19TVFJVQ1RfUEFH RTsKIAlfX2k5MTVfZ2VtX29iamVjdF9zZXRfcGFnZXMob2JqLCBzdCwgc2ctPmxlbmd0aCk7CiAK IAlyZXR1cm4gMDsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dl bV9zaG1lbS5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3NobWVtLmMKaW5k ZXggNWQxNmM0NDYyZmRhLi43YWExYzk1YzdiN2QgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2dlbS9pOTE1X2dlbV9zaG1lbS5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dl bS9pOTE1X2dlbV9zaG1lbS5jCkBAIC00NDQsNyArNDQ0LDcgQEAgc2htZW1fcHJlYWQoc3RydWN0 IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaiwKIAogc3RhdGljIHZvaWQgc2htZW1fcmVsZWFzZShz dHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKQogewotCWlmIChvYmotPmZsYWdzICYgSTkx NV9CT19BTExPQ19TVFJVQ1RfUEFHRSkKKwlpZiAoaTkxNV9nZW1fb2JqZWN0X2hhc19zdHJ1Y3Rf cGFnZShvYmopKQogCQlpOTE1X2dlbV9vYmplY3RfcmVsZWFzZV9tZW1vcnlfcmVnaW9uKG9iaik7 CiAKIAlmcHV0KG9iai0+YmFzZS5maWxwKTsKQEAgLTUxMyw5ICs1MTMsOCBAQCBzdGF0aWMgaW50 IHNobWVtX29iamVjdF9pbml0KHN0cnVjdCBpbnRlbF9tZW1vcnlfcmVnaW9uICptZW0sCiAJbWFw cGluZ19zZXRfZ2ZwX21hc2sobWFwcGluZywgbWFzayk7CiAJR0VNX0JVR19PTighKG1hcHBpbmdf Z2ZwX21hc2sobWFwcGluZykgJiBfX0dGUF9SRUNMQUlNKSk7CiAKLQlpOTE1X2dlbV9vYmplY3Rf aW5pdChvYmosICZpOTE1X2dlbV9zaG1lbV9vcHMsICZsb2NrX2NsYXNzLAotCQkJICAgICBJOTE1 X0JPX0FMTE9DX1NUUlVDVF9QQUdFKTsKLQorCWk5MTVfZ2VtX29iamVjdF9pbml0KG9iaiwgJmk5 MTVfZ2VtX3NobWVtX29wcywgJmxvY2tfY2xhc3MsIDApOworCW9iai0+bWVtX2ZsYWdzIHw9IEk5 MTVfQk9fRkxBR19TVFJVQ1RfUEFHRTsKIAlvYmotPndyaXRlX2RvbWFpbiA9IEk5MTVfR0VNX0RP TUFJTl9DUFU7CiAJb2JqLT5yZWFkX2RvbWFpbnMgPSBJOTE1X0dFTV9ET01BSU5fQ1BVOwogCmRp ZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fdHRtLmMgYi9kcml2 ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fdHRtLmMKaW5kZXggYzVkZWI4YjcyMjdjLi5i NWRkM2I3MDM3ZjQgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dl bV90dG0uYworKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fdHRtLmMKQEAg LTczMiw3ICs3MzIsNiBAQCBzdGF0aWMgdTY0IGk5MTVfdHRtX21tYXBfb2Zmc2V0KHN0cnVjdCBk cm1faTkxNV9nZW1fb2JqZWN0ICpvYmopCiAKIGNvbnN0IHN0cnVjdCBkcm1faTkxNV9nZW1fb2Jq ZWN0X29wcyBpOTE1X2dlbV90dG1fb2JqX29wcyA9IHsKIAkubmFtZSA9ICJpOTE1X2dlbV9vYmpl Y3RfdHRtIiwKLQkuZmxhZ3MgPSBJOTE1X0dFTV9PQkpFQ1RfSEFTX0lPTUVNLAogCiAJLmdldF9w YWdlcyA9IGk5MTVfdHRtX2dldF9wYWdlcywKIAkucHV0X3BhZ2VzID0gaTkxNV90dG1fcHV0X3Bh Z2VzLApAQCAtNzc3LDYgKzc3Niw3IEBAIGludCBfX2k5MTVfZ2VtX3R0bV9vYmplY3RfaW5pdChz dHJ1Y3QgaW50ZWxfbWVtb3J5X3JlZ2lvbiAqbWVtLAogCWk5MTVfZ2VtX29iamVjdF9pbml0X21l bW9yeV9yZWdpb24ob2JqLCBtZW0pOwogCWk5MTVfZ2VtX29iamVjdF9tYWtlX3Vuc2hyaW5rYWJs ZShvYmopOwogCW9iai0+cmVhZF9kb21haW5zID0gSTkxNV9HRU1fRE9NQUlOX1dDIHwgSTkxNV9H RU1fRE9NQUlOX0dUVDsKKwlvYmotPm1lbV9mbGFncyB8PSBJOTE1X0JPX0ZMQUdfSU9NRU07CiAJ aTkxNV9nZW1fb2JqZWN0X3NldF9jYWNoZV9jb2hlcmVuY3kob2JqLCBJOTE1X0NBQ0hFX05PTkUp OwogCUlOSVRfUkFESVhfVFJFRSgmb2JqLT50dG0uZ2V0X2lvX3BhZ2UucmFkaXgsIEdGUF9LRVJO RUwgfCBfX0dGUF9OT1dBUk4pOwogCW11dGV4X2luaXQoJm9iai0+dHRtLmdldF9pb19wYWdlLmxv Y2spOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3VzZXJw dHIuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV91c2VycHRyLmMKaW5kZXgg NGIwYWNjN2VhYTI3Li41NmVkZmVmZjhjMDIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9p OTE1L2dlbS9pOTE1X2dlbV91c2VycHRyLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2Vt L2k5MTVfZ2VtX3VzZXJwdHIuYwpAQCAtNTEwLDggKzUxMCw4IEBAIGk5MTVfZ2VtX3VzZXJwdHJf aW9jdGwoc3RydWN0IGRybV9kZXZpY2UgKmRldiwKIAkJcmV0dXJuIC1FTk9NRU07CiAKIAlkcm1f Z2VtX3ByaXZhdGVfb2JqZWN0X2luaXQoZGV2LCAmb2JqLT5iYXNlLCBhcmdzLT51c2VyX3NpemUp OwotCWk5MTVfZ2VtX29iamVjdF9pbml0KG9iaiwgJmk5MTVfZ2VtX3VzZXJwdHJfb3BzLCAmbG9j a19jbGFzcywKLQkJCSAgICAgSTkxNV9CT19BTExPQ19TVFJVQ1RfUEFHRSk7CisJaTkxNV9nZW1f b2JqZWN0X2luaXQob2JqLCAmaTkxNV9nZW1fdXNlcnB0cl9vcHMsICZsb2NrX2NsYXNzLCAwKTsK KwlvYmotPm1lbV9mbGFncyA9IEk5MTVfQk9fRkxBR19TVFJVQ1RfUEFHRTsKIAlvYmotPnJlYWRf ZG9tYWlucyA9IEk5MTVfR0VNX0RPTUFJTl9DUFU7CiAJb2JqLT53cml0ZV9kb21haW4gPSBJOTE1 X0dFTV9ET01BSU5fQ1BVOwogCWk5MTVfZ2VtX29iamVjdF9zZXRfY2FjaGVfY29oZXJlbmN5KG9i aiwgSTkxNV9DQUNIRV9MTEMpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2Vt L3NlbGZ0ZXN0cy9odWdlX2dlbV9vYmplY3QuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9z ZWxmdGVzdHMvaHVnZV9nZW1fb2JqZWN0LmMKaW5kZXggMGM4ZWNmZGY1NDA1Li5mOTYzYjhlMWUz N2IgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9zZWxmdGVzdHMvaHVnZV9n ZW1fb2JqZWN0LmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL3NlbGZ0ZXN0cy9odWdl X2dlbV9vYmplY3QuYwpAQCAtMTE0LDggKzExNCw4IEBAIGh1Z2VfZ2VtX29iamVjdChzdHJ1Y3Qg ZHJtX2k5MTVfcHJpdmF0ZSAqaTkxNSwKIAkJcmV0dXJuIEVSUl9QVFIoLUVOT01FTSk7CiAKIAlk cm1fZ2VtX3ByaXZhdGVfb2JqZWN0X2luaXQoJmk5MTUtPmRybSwgJm9iai0+YmFzZSwgZG1hX3Np emUpOwotCWk5MTVfZ2VtX29iamVjdF9pbml0KG9iaiwgJmh1Z2Vfb3BzLCAmbG9ja19jbGFzcywK LQkJCSAgICAgSTkxNV9CT19BTExPQ19TVFJVQ1RfUEFHRSk7CisJaTkxNV9nZW1fb2JqZWN0X2lu aXQob2JqLCAmaHVnZV9vcHMsICZsb2NrX2NsYXNzLCAwKTsKKwlvYmotPm1lbV9mbGFncyB8PSBJ OTE1X0JPX0ZMQUdfU1RSVUNUX1BBR0U7CiAKIAlvYmotPnJlYWRfZG9tYWlucyA9IEk5MTVfR0VN X0RPTUFJTl9DUFU7CiAJb2JqLT53cml0ZV9kb21haW4gPSBJOTE1X0dFTV9ET01BSU5fQ1BVOwpk aWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL3NlbGZ0ZXN0cy9odWdlX3BhZ2Vz LmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vc2VsZnRlc3RzL2h1Z2VfcGFnZXMuYwppbmRl eCBkYWRkNDg1YmM1MmYuLmNjYzY3ZWQxYTg0YiAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJt L2k5MTUvZ2VtL3NlbGZ0ZXN0cy9odWdlX3BhZ2VzLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5 MTUvZ2VtL3NlbGZ0ZXN0cy9odWdlX3BhZ2VzLmMKQEAgLTE2Nyw5ICsxNjcsOCBAQCBodWdlX3Bh Z2VzX29iamVjdChzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqaTkxNSwKIAkJcmV0dXJuIEVSUl9Q VFIoLUVOT01FTSk7CiAKIAlkcm1fZ2VtX3ByaXZhdGVfb2JqZWN0X2luaXQoJmk5MTUtPmRybSwg Jm9iai0+YmFzZSwgc2l6ZSk7Ci0JaTkxNV9nZW1fb2JqZWN0X2luaXQob2JqLCAmaHVnZV9wYWdl X29wcywgJmxvY2tfY2xhc3MsCi0JCQkgICAgIEk5MTVfQk9fQUxMT0NfU1RSVUNUX1BBR0UpOwot CisJaTkxNV9nZW1fb2JqZWN0X2luaXQob2JqLCAmaHVnZV9wYWdlX29wcywgJmxvY2tfY2xhc3Ms IDApOworCW9iai0+bWVtX2ZsYWdzIHw9IEk5MTVfQk9fRkxBR19TVFJVQ1RfUEFHRTsKIAlpOTE1 X2dlbV9vYmplY3Rfc2V0X3ZvbGF0aWxlKG9iaik7CiAKIAlvYmotPndyaXRlX2RvbWFpbiA9IEk5 MTVfR0VNX0RPTUFJTl9DUFU7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0v c2VsZnRlc3RzL2k5MTVfZ2VtX21tYW4uYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9zZWxm dGVzdHMvaTkxNV9nZW1fbW1hbi5jCmluZGV4IDQ0YjVkZTA2Y2U2NC4uNjA3YjdkMmQ0YzI5IDEw MDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vc2VsZnRlc3RzL2k5MTVfZ2VtX21t YW4uYworKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vc2VsZnRlc3RzL2k5MTVfZ2VtX21t YW4uYwpAQCAtODMxLDE2ICs4MzEsMTkgQEAgc3RhdGljIGludCB3Y19jaGVjayhzdHJ1Y3QgZHJt X2k5MTVfZ2VtX29iamVjdCAqb2JqKQogCiBzdGF0aWMgYm9vbCBjYW5fbW1hcChzdHJ1Y3QgZHJt X2k5MTVfZ2VtX29iamVjdCAqb2JqLCBlbnVtIGk5MTVfbW1hcF90eXBlIHR5cGUpCiB7CisJYm9v bCBub19tYXA7CisKIAlpZiAodHlwZSA9PSBJOTE1X01NQVBfVFlQRV9HVFQgJiYKIAkgICAgIWk5 MTVfZ2d0dF9oYXNfYXBlcnR1cmUoJnRvX2k5MTUob2JqLT5iYXNlLmRldiktPmdndHQpKQogCQly ZXR1cm4gZmFsc2U7CiAKLQlpZiAodHlwZSAhPSBJOTE1X01NQVBfVFlQRV9HVFQgJiYKLQkgICAg IWk5MTVfZ2VtX29iamVjdF9oYXNfc3RydWN0X3BhZ2Uob2JqKSAmJgotCSAgICAhaTkxNV9nZW1f b2JqZWN0X3R5cGVfaGFzKG9iaiwgSTkxNV9HRU1fT0JKRUNUX0hBU19JT01FTSkpCi0JCXJldHVy biBmYWxzZTsKKwlpOTE1X2dlbV9vYmplY3RfbG9jayhvYmosIE5VTEwpOworCW5vX21hcCA9ICh0 eXBlICE9IEk5MTVfTU1BUF9UWVBFX0dUVCAmJgorCQkgICFpOTE1X2dlbV9vYmplY3RfaGFzX3N0 cnVjdF9wYWdlKG9iaikgJiYKKwkJICAhaTkxNV9nZW1fb2JqZWN0X2hhc19pb21lbShvYmopKTsK KwlpOTE1X2dlbV9vYmplY3RfdW5sb2NrKG9iaik7CiAKLQlyZXR1cm4gdHJ1ZTsKKwlyZXR1cm4g IW5vX21hcDsKIH0KIAogc3RhdGljIHZvaWQgb2JqZWN0X3NldF9wbGFjZW1lbnRzKHN0cnVjdCBk cm1faTkxNV9nZW1fb2JqZWN0ICpvYmosCkBAIC05ODgsMTAgKzk5MSwxNiBAQCBzdGF0aWMgY29u c3QgY2hhciAqcmVwcl9tbWFwX3R5cGUoZW51bSBpOTE1X21tYXBfdHlwZSB0eXBlKQogCX0KIH0K IAotc3RhdGljIGJvb2wgY2FuX2FjY2Vzcyhjb25zdCBzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVj dCAqb2JqKQorc3RhdGljIGJvb2wgY2FuX2FjY2VzcyhzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVj dCAqb2JqKQogewotCXJldHVybiBpOTE1X2dlbV9vYmplY3RfaGFzX3N0cnVjdF9wYWdlKG9iaikg fHwKLQkgICAgICAgaTkxNV9nZW1fb2JqZWN0X3R5cGVfaGFzKG9iaiwgSTkxNV9HRU1fT0JKRUNU X0hBU19JT01FTSk7CisJYm9vbCBhY2Nlc3M7CisKKwlpOTE1X2dlbV9vYmplY3RfbG9jayhvYmos IE5VTEwpOworCWFjY2VzcyA9IGk5MTVfZ2VtX29iamVjdF9oYXNfc3RydWN0X3BhZ2Uob2JqKSB8 fAorCQlpOTE1X2dlbV9vYmplY3RfaGFzX2lvbWVtKG9iaik7CisJaTkxNV9nZW1fb2JqZWN0X3Vu bG9jayhvYmopOworCisJcmV0dXJuIGFjY2VzczsKIH0KIAogc3RhdGljIGludCBfX2lndF9tbWFw X2FjY2VzcyhzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqaTkxNSwKZGlmZiAtLWdpdCBhL2RyaXZl cnMvZ3B1L2RybS9pOTE1L2dlbS9zZWxmdGVzdHMvaTkxNV9nZW1fcGh5cy5jIGIvZHJpdmVycy9n cHUvZHJtL2k5MTUvZ2VtL3NlbGZ0ZXN0cy9pOTE1X2dlbV9waHlzLmMKaW5kZXggM2E2Y2U4N2Y4 YjUyLi5kNDNkOGRhZTBmNjkgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9z ZWxmdGVzdHMvaTkxNV9nZW1fcGh5cy5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9z ZWxmdGVzdHMvaTkxNV9nZW1fcGh5cy5jCkBAIC0yNSwxMyArMjUsMTQgQEAgc3RhdGljIGludCBt b2NrX3BoeXNfb2JqZWN0KHZvaWQgKmFyZykKIAkJZ290byBvdXQ7CiAJfQogCisJaTkxNV9nZW1f b2JqZWN0X2xvY2sob2JqLCBOVUxMKTsKIAlpZiAoIWk5MTVfZ2VtX29iamVjdF9oYXNfc3RydWN0 X3BhZ2Uob2JqKSkgeworCQlpOTE1X2dlbV9vYmplY3RfdW5sb2NrKG9iaik7CiAJCWVyciA9IC1F SU5WQUw7CiAJCXByX2Vycigic2htZW0gaGFzIG5vIHN0cnVjdCBwYWdlXG4iKTsKIAkJZ290byBv dXRfb2JqOwogCX0KIAotCWk5MTVfZ2VtX29iamVjdF9sb2NrKG9iaiwgTlVMTCk7CiAJZXJyID0g aTkxNV9nZW1fb2JqZWN0X2F0dGFjaF9waHlzKG9iaiwgUEFHRV9TSVpFKTsKIAlpOTE1X2dlbV9v YmplY3RfdW5sb2NrKG9iaik7CiAJaWYgKGVycikgewpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUv ZHJtL2k5MTUvaTkxNV9ncHVfZXJyb3IuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfZ3B1 X2Vycm9yLmMKaW5kZXggY2IxODJjNmQyNjVhLi5hMmM1OGI1NGE1OTIgMTAwNjQ0Ci0tLSBhL2Ry aXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfZ3B1X2Vycm9yLmMKKysrIGIvZHJpdmVycy9ncHUvZHJt L2k5MTUvaTkxNV9ncHVfZXJyb3IuYwpAQCAtMTAzOSw3ICsxMDM5LDcgQEAgaTkxNV92bWFfY29y ZWR1bXBfY3JlYXRlKGNvbnN0IHN0cnVjdCBpbnRlbF9ndCAqZ3QsCiAJCQlpZiAocmV0KQogCQkJ CWJyZWFrOwogCQl9Ci0JfSBlbHNlIGlmIChpOTE1X2dlbV9vYmplY3RfaXNfbG1lbSh2bWEtPm9i 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E=McAfee;i="6200,9189,10024"; a="205601338" X-IronPort-AV: E=Sophos;i="5.83,296,1616482800"; d="scan'208";a="205601338" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2021 01:43:07 -0700 IronPort-SDR: mmq+f4tzdaTQXPj4AmXBExJGRbptiSlUKwl5NlFAXKf998M7roe5l5Ewna1KddFf4Rja2n+Fl5 Azo2h8Jtp8hQ== X-IronPort-AV: E=Sophos;i="5.83,296,1616482800"; d="scan'208";a="453344917" Received: from cmutgix-mobl.gar.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.20]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2021 01:43:05 -0700 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH v10 1/3] drm/i915: Update object placement flags to be mutable Date: Thu, 24 Jun 2021 10:42:38 +0200 Message-Id: <20210624084240.270219-2-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210624084240.270219-1-thomas.hellstrom@linux.intel.com> References: <20210624084240.270219-1-thomas.hellstrom@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , matthew.auld@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The object ops i915_GEM_OBJECT_HAS_IOMEM and the object I915_BO_ALLOC_STRUCT_PAGE flags are considered immutable by much of our code. Introduce a new mem_flags member to hold these and make sure checks for these flags being set are either done under the object lock or with pages properly pinned. The flags will change during migration under the object lock. Signed-off-by: Thomas Hellström Reviewed-by: Matthew Auld --- v2: - Unconditionally set VM_IO on our VMAs in line with the rest core gem and TTM. Since the bo might be migrated while the VMA is still alive, there is no sense, whether or not it maps iomem might change. v6: - Introduce a __i915_gem_object_is_lmem() to be used in situations where we know that a fence that can't currently signal keeps the object from being migrated or evicted. - Move a couple of shmem warnings for DGFX to a later patch where we actually move system memory to TTM. v10: - Add some comments around the gem object "mem_flags" field, and use a full unsigned int for it. (Suggested by Daniel Vetter). - Add an object locked section while checking mem_flags in the live mman selftest. --- drivers/gpu/drm/i915/gem/i915_gem_internal.c | 4 +- drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 22 +++++++++++ drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 2 + drivers/gpu/drm/i915/gem/i915_gem_mman.c | 12 +++--- drivers/gpu/drm/i915/gem/i915_gem_object.c | 38 +++++++++++++++++++ drivers/gpu/drm/i915/gem/i915_gem_object.h | 14 ++----- .../gpu/drm/i915/gem/i915_gem_object_types.h | 27 ++++++++----- drivers/gpu/drm/i915/gem/i915_gem_pages.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_phys.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 7 ++-- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 4 +- .../drm/i915/gem/selftests/huge_gem_object.c | 4 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 5 +-- .../drm/i915/gem/selftests/i915_gem_mman.c | 25 ++++++++---- .../drm/i915/gem/selftests/i915_gem_phys.c | 3 +- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- 17 files changed, 123 insertions(+), 52 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c b/drivers/gpu/drm/i915/gem/i915_gem_internal.c index ce6b664b10aa..13b217f75055 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c @@ -177,8 +177,8 @@ i915_gem_object_create_internal(struct drm_i915_private *i915, return ERR_PTR(-ENOMEM); drm_gem_private_object_init(&i915->drm, &obj->base, size); - i915_gem_object_init(obj, &i915_gem_object_internal_ops, &lock_class, - I915_BO_ALLOC_STRUCT_PAGE); + i915_gem_object_init(obj, &i915_gem_object_internal_ops, &lock_class, 0); + obj->mem_flags |= I915_BO_FLAG_STRUCT_PAGE; /* * Mark the object as volatile, such that the pages are marked as diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c index d539dffa1554..41d5182cd367 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c @@ -71,6 +71,28 @@ bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj) mr->type == INTEL_MEMORY_STOLEN_LOCAL); } +/** + * __i915_gem_object_is_lmem - Whether the object is resident in + * lmem while in the fence signaling critical path. + * @obj: The object to check. + * + * This function is intended to be called from within the fence signaling + * path where the fence keeps the object from being migrated. For example + * during gpu reset or similar. + * + * Return: Whether the object is resident in lmem. + */ +bool __i915_gem_object_is_lmem(struct drm_i915_gem_object *obj) +{ + struct intel_memory_region *mr = READ_ONCE(obj->mm.region); + +#ifdef CONFIG_LOCKDEP + GEM_WARN_ON(dma_resv_test_signaled(obj->base.resv, true)); +#endif + return mr && (mr->type == INTEL_MEMORY_LOCAL || + mr->type == INTEL_MEMORY_STOLEN_LOCAL); +} + struct drm_i915_gem_object * i915_gem_object_create_lmem(struct drm_i915_private *i915, resource_size_t size, diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h index ea76fd11ccb0..27a611deba47 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h @@ -21,6 +21,8 @@ i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj, bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj); +bool __i915_gem_object_is_lmem(struct drm_i915_gem_object *obj); + struct drm_i915_gem_object * i915_gem_object_create_lmem(struct drm_i915_private *i915, resource_size_t size, diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index 2fd155742bd2..6497a2dbdab9 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -684,7 +684,7 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj, if (mmap_type != I915_MMAP_TYPE_GTT && !i915_gem_object_has_struct_page(obj) && - !i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM)) + !i915_gem_object_has_iomem(obj)) return -ENODEV; mmo = mmap_offset_attach(obj, mmap_type, file); @@ -708,7 +708,12 @@ __assign_mmap_offset_handle(struct drm_file *file, if (!obj) return -ENOENT; + err = i915_gem_object_lock_interruptible(obj, NULL); + if (err) + goto out_put; err = __assign_mmap_offset(obj, mmap_type, offset, file); + i915_gem_object_unlock(obj); +out_put: i915_gem_object_put(obj); return err; } @@ -932,10 +937,7 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma) return PTR_ERR(anon); } - vma->vm_flags |= VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP; - - if (i915_gem_object_has_iomem(obj)) - vma->vm_flags |= VM_IO; + vma->vm_flags |= VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP | VM_IO; /* * We keep the ref on mmo->obj, not vm_file, but we require diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index cf18c430d51f..07e8ff9a8aae 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -475,6 +475,44 @@ bool i915_gem_object_migratable(struct drm_i915_gem_object *obj) return obj->mm.n_placements > 1; } +/** + * i915_gem_object_has_struct_page - Whether the object is page-backed + * @obj: The object to query. + * + * This function should only be called while the object is locked or pinned, + * otherwise the page backing may change under the caller. + * + * Return: True if page-backed, false otherwise. + */ +bool i915_gem_object_has_struct_page(const struct drm_i915_gem_object *obj) +{ +#ifdef CONFIG_LOCKDEP + if (IS_DGFX(to_i915(obj->base.dev)) && + i915_gem_object_evictable((void __force *)obj)) + assert_object_held_shared(obj); +#endif + return obj->mem_flags & I915_BO_FLAG_STRUCT_PAGE; +} + +/** + * i915_gem_object_has_iomem - Whether the object is iomem-backed + * @obj: The object to query. + * + * This function should only be called while the object is locked or pinned, + * otherwise the iomem backing may change under the caller. + * + * Return: True if iomem-backed, false otherwise. + */ +bool i915_gem_object_has_iomem(const struct drm_i915_gem_object *obj) +{ +#ifdef CONFIG_LOCKDEP + if (IS_DGFX(to_i915(obj->base.dev)) && + i915_gem_object_evictable((void __force *)obj)) + assert_object_held_shared(obj); +#endif + return obj->mem_flags & I915_BO_FLAG_IOMEM; +} + void i915_gem_init__objects(struct drm_i915_private *i915) { INIT_WORK(&i915->mm.free_work, __i915_gem_free_work); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h index 7bf4dd46d8d2..ea3224a480c4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -148,7 +148,7 @@ i915_gem_object_put(struct drm_i915_gem_object *obj) /* * If more than one potential simultaneous locker, assert held. */ -static inline void assert_object_held_shared(struct drm_i915_gem_object *obj) +static inline void assert_object_held_shared(const struct drm_i915_gem_object *obj) { /* * Note mm list lookup is protected by @@ -266,17 +266,9 @@ i915_gem_object_type_has(const struct drm_i915_gem_object *obj, return obj->ops->flags & flags; } -static inline bool -i915_gem_object_has_struct_page(const struct drm_i915_gem_object *obj) -{ - return obj->flags & I915_BO_ALLOC_STRUCT_PAGE; -} +bool i915_gem_object_has_struct_page(const struct drm_i915_gem_object *obj); -static inline bool -i915_gem_object_has_iomem(const struct drm_i915_gem_object *obj) -{ - return i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM); -} +bool i915_gem_object_has_iomem(const struct drm_i915_gem_object *obj); static inline bool i915_gem_object_is_shrinkable(const struct drm_i915_gem_object *obj) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h index 3a2d9ecf8e03..441f913c87e6 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h @@ -33,10 +33,9 @@ struct i915_lut_handle { struct drm_i915_gem_object_ops { unsigned int flags; -#define I915_GEM_OBJECT_HAS_IOMEM BIT(1) -#define I915_GEM_OBJECT_IS_SHRINKABLE BIT(2) -#define I915_GEM_OBJECT_IS_PROXY BIT(3) -#define I915_GEM_OBJECT_NO_MMAP BIT(4) +#define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1) +#define I915_GEM_OBJECT_IS_PROXY BIT(2) +#define I915_GEM_OBJECT_NO_MMAP BIT(3) /* Interface between the GEM object and its backing storage. * get_pages() is called once prior to the use of the associated set @@ -201,17 +200,25 @@ struct drm_i915_gem_object { unsigned long flags; #define I915_BO_ALLOC_CONTIGUOUS BIT(0) #define I915_BO_ALLOC_VOLATILE BIT(1) -#define I915_BO_ALLOC_STRUCT_PAGE BIT(2) -#define I915_BO_ALLOC_CPU_CLEAR BIT(3) -#define I915_BO_ALLOC_USER BIT(4) +#define I915_BO_ALLOC_CPU_CLEAR BIT(2) +#define I915_BO_ALLOC_USER BIT(3) #define I915_BO_ALLOC_FLAGS (I915_BO_ALLOC_CONTIGUOUS | \ I915_BO_ALLOC_VOLATILE | \ - I915_BO_ALLOC_STRUCT_PAGE | \ I915_BO_ALLOC_CPU_CLEAR | \ I915_BO_ALLOC_USER) -#define I915_BO_READONLY BIT(5) -#define I915_TILING_QUIRK_BIT 6 /* unknown swizzling; do not release! */ +#define I915_BO_READONLY BIT(4) +#define I915_TILING_QUIRK_BIT 5 /* unknown swizzling; do not release! */ + /** + * @mem_flags - Mutable placement-related flags + * + * These are flags that indicate specifics of the memory region + * the object is currently in. As such they are only stable + * either under the object lock or if the object is pinned. + */ + unsigned int mem_flags; +#define I915_BO_FLAG_STRUCT_PAGE BIT(0) /* Object backed by struct pages */ +#define I915_BO_FLAG_IOMEM BIT(1) /* Object backed by IO memory */ /* * Is the object to be mapped as read-only to the GPU * Only honoured if hardware has relevant pte bit diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c index 086005c1c7ea..f2f850e31b8e 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c @@ -351,7 +351,7 @@ void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, int err; if (!i915_gem_object_has_struct_page(obj) && - !i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM)) + !i915_gem_object_has_iomem(obj)) return ERR_PTR(-ENXIO); assert_object_held(obj); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c b/drivers/gpu/drm/i915/gem/i915_gem_phys.c index be72ad0634ba..7986612f48fa 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c @@ -76,7 +76,7 @@ static int i915_gem_object_get_pages_phys(struct drm_i915_gem_object *obj) intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt); /* We're no longer struct page backed */ - obj->flags &= ~I915_BO_ALLOC_STRUCT_PAGE; + obj->mem_flags &= ~I915_BO_FLAG_STRUCT_PAGE; __i915_gem_object_set_pages(obj, st, sg->length); return 0; diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c index 5d16c4462fda..7aa1c95c7b7d 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c @@ -444,7 +444,7 @@ shmem_pread(struct drm_i915_gem_object *obj, static void shmem_release(struct drm_i915_gem_object *obj) { - if (obj->flags & I915_BO_ALLOC_STRUCT_PAGE) + if (i915_gem_object_has_struct_page(obj)) i915_gem_object_release_memory_region(obj); fput(obj->base.filp); @@ -513,9 +513,8 @@ static int shmem_object_init(struct intel_memory_region *mem, mapping_set_gfp_mask(mapping, mask); GEM_BUG_ON(!(mapping_gfp_mask(mapping) & __GFP_RECLAIM)); - i915_gem_object_init(obj, &i915_gem_shmem_ops, &lock_class, - I915_BO_ALLOC_STRUCT_PAGE); - + i915_gem_object_init(obj, &i915_gem_shmem_ops, &lock_class, 0); + obj->mem_flags |= I915_BO_FLAG_STRUCT_PAGE; obj->write_domain = I915_GEM_DOMAIN_CPU; obj->read_domains = I915_GEM_DOMAIN_CPU; diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index c5deb8b7227c..b5dd3b7037f4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -732,7 +732,6 @@ static u64 i915_ttm_mmap_offset(struct drm_i915_gem_object *obj) const struct drm_i915_gem_object_ops i915_gem_ttm_obj_ops = { .name = "i915_gem_object_ttm", - .flags = I915_GEM_OBJECT_HAS_IOMEM, .get_pages = i915_ttm_get_pages, .put_pages = i915_ttm_put_pages, @@ -777,6 +776,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem, i915_gem_object_init_memory_region(obj, mem); i915_gem_object_make_unshrinkable(obj); obj->read_domains = I915_GEM_DOMAIN_WC | I915_GEM_DOMAIN_GTT; + obj->mem_flags |= I915_BO_FLAG_IOMEM; i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE); INIT_RADIX_TREE(&obj->ttm.get_io_page.radix, GFP_KERNEL | __GFP_NOWARN); mutex_init(&obj->ttm.get_io_page.lock); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c index 4b0acc7eaa27..56edfeff8c02 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c @@ -510,8 +510,8 @@ i915_gem_userptr_ioctl(struct drm_device *dev, return -ENOMEM; drm_gem_private_object_init(dev, &obj->base, args->user_size); - i915_gem_object_init(obj, &i915_gem_userptr_ops, &lock_class, - I915_BO_ALLOC_STRUCT_PAGE); + i915_gem_object_init(obj, &i915_gem_userptr_ops, &lock_class, 0); + obj->mem_flags = I915_BO_FLAG_STRUCT_PAGE; obj->read_domains = I915_GEM_DOMAIN_CPU; obj->write_domain = I915_GEM_DOMAIN_CPU; i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC); diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c b/drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c index 0c8ecfdf5405..f963b8e1e37b 100644 --- a/drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c +++ b/drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c @@ -114,8 +114,8 @@ huge_gem_object(struct drm_i915_private *i915, return ERR_PTR(-ENOMEM); drm_gem_private_object_init(&i915->drm, &obj->base, dma_size); - i915_gem_object_init(obj, &huge_ops, &lock_class, - I915_BO_ALLOC_STRUCT_PAGE); + i915_gem_object_init(obj, &huge_ops, &lock_class, 0); + obj->mem_flags |= I915_BO_FLAG_STRUCT_PAGE; obj->read_domains = I915_GEM_DOMAIN_CPU; obj->write_domain = I915_GEM_DOMAIN_CPU; diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c index dadd485bc52f..ccc67ed1a84b 100644 --- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c +++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c @@ -167,9 +167,8 @@ huge_pages_object(struct drm_i915_private *i915, return ERR_PTR(-ENOMEM); drm_gem_private_object_init(&i915->drm, &obj->base, size); - i915_gem_object_init(obj, &huge_page_ops, &lock_class, - I915_BO_ALLOC_STRUCT_PAGE); - + i915_gem_object_init(obj, &huge_page_ops, &lock_class, 0); + obj->mem_flags |= I915_BO_FLAG_STRUCT_PAGE; i915_gem_object_set_volatile(obj); obj->write_domain = I915_GEM_DOMAIN_CPU; diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c index 44b5de06ce64..607b7d2d4c29 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c @@ -831,16 +831,19 @@ static int wc_check(struct drm_i915_gem_object *obj) static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type) { + bool no_map; + if (type == I915_MMAP_TYPE_GTT && !i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt)) return false; - if (type != I915_MMAP_TYPE_GTT && - !i915_gem_object_has_struct_page(obj) && - !i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM)) - return false; + i915_gem_object_lock(obj, NULL); + no_map = (type != I915_MMAP_TYPE_GTT && + !i915_gem_object_has_struct_page(obj) && + !i915_gem_object_has_iomem(obj)); + i915_gem_object_unlock(obj); - return true; + return !no_map; } static void object_set_placements(struct drm_i915_gem_object *obj, @@ -988,10 +991,16 @@ static const char *repr_mmap_type(enum i915_mmap_type type) } } -static bool can_access(const struct drm_i915_gem_object *obj) +static bool can_access(struct drm_i915_gem_object *obj) { - return i915_gem_object_has_struct_page(obj) || - i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM); + bool access; + + i915_gem_object_lock(obj, NULL); + access = i915_gem_object_has_struct_page(obj) || + i915_gem_object_has_iomem(obj); + i915_gem_object_unlock(obj); + + return access; } static int __igt_mmap_access(struct drm_i915_private *i915, diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c index 3a6ce87f8b52..d43d8dae0f69 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c @@ -25,13 +25,14 @@ static int mock_phys_object(void *arg) goto out; } + i915_gem_object_lock(obj, NULL); if (!i915_gem_object_has_struct_page(obj)) { + i915_gem_object_unlock(obj); err = -EINVAL; pr_err("shmem has no struct page\n"); goto out_obj; } - i915_gem_object_lock(obj, NULL); err = i915_gem_object_attach_phys(obj, PAGE_SIZE); i915_gem_object_unlock(obj); if (err) { diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index cb182c6d265a..a2c58b54a592 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -1039,7 +1039,7 @@ i915_vma_coredump_create(const struct intel_gt *gt, if (ret) break; } - } else if (i915_gem_object_is_lmem(vma->obj)) { + } else if (__i915_gem_object_is_lmem(vma->obj)) { struct intel_memory_region *mem = vma->obj->mm.region; dma_addr_t dma; -- 2.31.1