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header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 949796E8A1; Tue, 29 Jun 2021 15:12:30 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 73B396E8A9; Tue, 29 Jun 2021 15:12:29 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10030"; a="195318916" X-IronPort-AV: E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="195318916" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2021 08:12:29 -0700 X-IronPort-AV: E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="408203406" Received: from ettammin-mobl1.ger.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.141]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2021 08:12:27 -0700 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Tue, 29 Jun 2021 17:12:01 +0200 Message-Id: <20210629151203.209465-2-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210629151203.209465-1-thomas.hellstrom@linux.intel.com> References: <20210629151203.209465-1-thomas.hellstrom@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 1/3] drm/i915/gem: Implement object migration X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , matthew.auld@intel.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" SW50cm9kdWNlIGFuIGludGVyZmFjZSB0byBtaWdyYXRlIG9iamVjdHMgYmV0d2VlbiByZWdpb25z LgpUaGlzIGlzIHByaW1hcmlseSBpbnRlbmRlZCB0byBtaWdyYXRlIG9iamVjdHMgdG8gTE1FTSBm b3IgZGlzcGxheSBhbmQKdG8gU1lTVEVNIGZvciBkbWEtYnVmLCBidXQgbWlnaHQgYmUgcmV1c2Vk IGluIG9uZSBmb3JtIG9yIGFub3RoZXIgZm9yCnBlcmZvcm1hbmNlLWJhc2VkIG1pZ3JhdGlvbi4K CnYyOgotIFZlcmlmeSB0aGF0IHRoZSBtZW1vcnkgcmVnaW9uIGdpdmVuIGFzIGFuIGlkIHJlYWxs eSBleGlzdHMuCiAgKFJlcG9ydGVkIGJ5IE1hdHRoZXcgQXVsZCkKLSBDYWxsIGk5MTVfZ2VtX29i amVjdF97aW5pdCxyZWxlYXNlfV9tZW1vcnlfcmVnaW9uKCkgd2hlbiBzd2l0Y2hpbmcgcmVnaW9u CiAgdG8gaGFuZGxlIGFsc28gc3dpdGNoaW5nIHJlZ2lvbiBsaXN0cy4gKFJlcG9ydGVkIGJ5IE1h dHRoZXcgQXVsZCkKdjM6Ci0gRml4IGk5MTVfZ2VtX29iamVjdF9jYW5fbWlncmF0ZSgpIHRvIHJl dHVybiB0cnVlIGlmIG9iamVjdCBpcyBhbHJlYWR5IGluCiAgdGhlIGNvcnJlY3QgcmVnaW9uLCBl dmVuIGlmIHRoZSBvYmplY3Qgb3BzIGRvZXNuJ3QgaGF2ZSBhIG1pZ3JhdGUoKQogIGNhbGxiYWNr LgotIFVwZGF0ZSB0eXBvIGluIGNvbW1pdCBtZXNzYWdlLgotIEZpeCBrZXJuZWxkb2Mgb2YgaTkx NV9nZW1fb2JqZWN0X3dhaXRfbWlncmF0aW9uKCkuCnY0OgotIEltcHJvdmUgZG9jdW1lbnRhdGlv biAoU3VnZ2VzdGVkIGJ5IE1hdHRldyBBdWxkIGFuZCBNaWNoYWVsIFJ1aGwpCi0gQWx3YXlzIGFz c3VtZSBUVE0gbWlncmF0aW9uIGhpdHMgYSBUVE0gbW92ZSBhbmQgdW5zZXRzIHRoZSBwYWdlcyB0 aHJvdWdoCiAgbW92ZV9ub3RpZnkuIChSZXBvcnRlZCBieSBNYXR0aGV3IEF1bGQpCi0gQWRkIGEg ZG1hX2ZlbmNlX21pZ2h0X3dhaXQoKSBhbm5vdGF0aW9uIHRvCiAgaTkxNV9nZW1fb2JqZWN0X3dh aXRfbWlncmF0aW9uKCkgKFN1Z2dlc3RlZCBieSBEYW5pZWwgVmV0dGVyKQp2NToKLSBSZS1hZGQg bWlnaHRfc2xlZXAoKSBpbnN0ZWFkIG9mIF9fZG1hX2ZlbmNlX21pZ2h0X3dhaXQoKSwgU2VudAog IHY0IHdpdGggdGhlIHdyb25nIHZlcnNpb24sIGRpZG4ndCBjb21waWxlIGFuZCBfX2RtYV9mZW5j ZV9taWdodF93YWl0KCkKICBpcyBub3QgZXhwb3J0ZWQuCi0gQWRkZWQgYW4gUi1CLgoKUmVwb3J0 ZWQtYnk6IGtlcm5lbCB0ZXN0IHJvYm90IDxsa3BAaW50ZWwuY29tPgpTaWduZWQtb2ZmLWJ5OiBU aG9tYXMgSGVsbHN0csO2bSA8dGhvbWFzLmhlbGxzdHJvbUBsaW51eC5pbnRlbC5jb20+ClJldmll d2VkLWJ5OiBNaWNoYWVsIEouIFJ1aGwgPG1pY2hhZWwuai5ydWhsQGludGVsLmNvbT4KUmV2aWV3 ZWQtYnk6IE1hdHRoZXcgQXVsZCA8bWF0dGhldy5hdWxkQGludGVsLmNvbT4KLS0tCiBkcml2ZXJz L2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmMgICAgfCAxMTIgKysrKysrKysrKysr KysrKysrCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmggICAgfCAg MTIgKysKIC4uLi9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oICB8ICAg OSArKwogZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3R0bS5jICAgICAgIHwgIDc3 ICsrKysrKysrKystLQogZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX3dhaXQuYyAg ICAgIHwgIDE5ICsrKwogNSBmaWxlcyBjaGFuZ2VkLCAyMTcgaW5zZXJ0aW9ucygrKSwgMTIgZGVs ZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2Vt X29iamVjdC5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdC5jCmlu ZGV4IDA3ZThmZjlhOGFhZS4uMjI1Yjc3ZmI0MzE0IDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9k cm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUv Z2VtL2k5MTVfZ2VtX29iamVjdC5jCkBAIC01MTMsNiArNTEzLDExOCBAQCBib29sIGk5MTVfZ2Vt X29iamVjdF9oYXNfaW9tZW0oY29uc3Qgc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaikK IAlyZXR1cm4gb2JqLT5tZW1fZmxhZ3MgJiBJOTE1X0JPX0ZMQUdfSU9NRU07CiB9CiAKKy8qKgor ICogaTkxNV9nZW1fb2JqZWN0X2Nhbl9taWdyYXRlIC0gV2hldGhlciBhbiBvYmplY3QgbGlrZWx5 IGNhbiBiZSBtaWdyYXRlZAorICoKKyAqIEBvYmo6IFRoZSBvYmplY3QgdG8gbWlncmF0ZQorICog QGlkOiBUaGUgcmVnaW9uIGludGVuZGVkIHRvIG1pZ3JhdGUgdG8KKyAqCisgKiBDaGVjayB3aGV0 aGVyIHRoZSBvYmplY3QgYmFja2VuZCBzdXBwb3J0cyBtaWdyYXRpb24gdG8gdGhlCisgKiBnaXZl biByZWdpb24uIE5vdGUgdGhhdCBwaW5uaW5nIG1heSBhZmZlY3QgdGhlIGFiaWxpdHkgdG8gbWln cmF0ZSBhcworICogcmV0dXJuZWQgYnkgdGhpcyBmdW5jdGlvbi4KKyAqCisgKiBUaGlzIGZ1bmN0 aW9uIGlzIHByaW1hcmlseSBpbnRlbmRlZCBhcyBhIGhlbHBlciBmb3IgY2hlY2tpbmcgdGhlCisg KiBwb3NzaWJpbGl0eSB0byBtaWdyYXRlIG9iamVjdHMgYW5kIG1pZ2h0IGJlIHNsaWdodGx5IGxl c3MgcGVybWlzc2l2ZQorICogdGhhbiBpOTE1X2dlbV9vYmplY3RfbWlncmF0ZSgpIHdoZW4gaXQg Y29tZXMgdG8gb2JqZWN0cyB3aXRoIHRoZQorICogSTkxNV9CT19BTExPQ19VU0VSIGZsYWcgc2V0 LgorICoKKyAqIFJldHVybjogdHJ1ZSBpZiBtaWdyYXRpb24gaXMgcG9zc2libGUsIGZhbHNlIG90 aGVyd2lzZS4KKyAqLworYm9vbCBpOTE1X2dlbV9vYmplY3RfY2FuX21pZ3JhdGUoc3RydWN0IGRy bV9pOTE1X2dlbV9vYmplY3QgKm9iaiwKKwkJCQkgZW51bSBpbnRlbF9yZWdpb25faWQgaWQpCit7 CisJc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmk5MTUgPSB0b19pOTE1KG9iai0+YmFzZS5kZXYp OworCXVuc2lnbmVkIGludCBudW1fYWxsb3dlZCA9IG9iai0+bW0ubl9wbGFjZW1lbnRzOworCXN0 cnVjdCBpbnRlbF9tZW1vcnlfcmVnaW9uICptcjsKKwl1bnNpZ25lZCBpbnQgaTsKKworCUdFTV9C VUdfT04oaWQgPj0gSU5URUxfUkVHSU9OX1VOS05PV04pOworCUdFTV9CVUdfT04ob2JqLT5tbS5t YWR2ICE9IEk5MTVfTUFEVl9XSUxMTkVFRCk7CisKKwltciA9IGk5MTUtPm1tLnJlZ2lvbnNbaWRd OworCWlmICghbXIpCisJCXJldHVybiBmYWxzZTsKKworCWlmIChvYmotPm1tLnJlZ2lvbiA9PSBt cikKKwkJcmV0dXJuIHRydWU7CisKKwlpZiAoIWk5MTVfZ2VtX29iamVjdF9ldmljdGFibGUob2Jq KSkKKwkJcmV0dXJuIGZhbHNlOworCisJaWYgKCFvYmotPm9wcy0+bWlncmF0ZSkKKwkJcmV0dXJu IGZhbHNlOworCisJaWYgKCEob2JqLT5mbGFncyAmIEk5MTVfQk9fQUxMT0NfVVNFUikpCisJCXJl dHVybiB0cnVlOworCisJaWYgKG51bV9hbGxvd2VkID09IDApCisJCXJldHVybiBmYWxzZTsKKwor CWZvciAoaSA9IDA7IGkgPCBudW1fYWxsb3dlZDsgKytpKSB7CisJCWlmIChtciA9PSBvYmotPm1t LnBsYWNlbWVudHNbaV0pCisJCQlyZXR1cm4gdHJ1ZTsKKwl9CisKKwlyZXR1cm4gZmFsc2U7Cit9 CisKKy8qKgorICogaTkxNV9nZW1fb2JqZWN0X21pZ3JhdGUgLSBNaWdyYXRlIGFuIG9iamVjdCB0 byB0aGUgZGVzaXJlZCByZWdpb24gaWQKKyAqIEBvYmo6IFRoZSBvYmplY3QgdG8gbWlncmF0ZS4K KyAqIEB3dzogQW4gb3B0aW9uYWwgc3RydWN0IGk5MTVfZ2VtX3d3X2N0eC4gSWYgTlVMTCwgdGhl IGJhY2tlbmQgbWF5CisgKiBub3QgYmUgc3VjY2Vzc2Z1bCBpbiBldmljdGluZyBvdGhlciBvYmpl Y3RzIHRvIG1ha2Ugcm9vbSBmb3IgdGhpcyBvYmplY3QuCisgKiBAaWQ6IFRoZSByZWdpb24gaWQg dG8gbWlncmF0ZSB0by4KKyAqCisgKiBBdHRlbXB0IHRvIG1pZ3JhdGUgdGhlIG9iamVjdCB0byB0 aGUgZGVzaXJlZCBtZW1vcnkgcmVnaW9uLiBUaGUKKyAqIG9iamVjdCBiYWNrZW5kIG11c3Qgc3Vw cG9ydCBtaWdyYXRpb24gYW5kIHRoZSBvYmplY3QgbWF5IG5vdCBiZQorICogcGlubmVkLCAoZXhw bGljaXRseSBwaW5uZWQgcGFnZXMgb3IgcGlubmVkIHZtYXMpLiBUaGUgb2JqZWN0IG11c3QKKyAq IGJlIGxvY2tlZC4KKyAqIE9uIHN1Y2Nlc3NmdWwgY29tcGxldGlvbiwgdGhlIG9iamVjdCB3aWxs IGhhdmUgcGFnZXMgcG9pbnRpbmcgdG8KKyAqIG1lbW9yeSBpbiB0aGUgbmV3IHJlZ2lvbiwgYnV0 IGFuIGFzeW5jIG1pZ3JhdGlvbiB0YXNrIG1heSBub3QgaGF2ZQorICogY29tcGxldGVkIHlldCwg YW5kIHRvIGFjY29tcGxpc2ggdGhhdCwgaTkxNV9nZW1fb2JqZWN0X3dhaXRfbWlncmF0aW9uKCkK KyAqIG11c3QgYmUgY2FsbGVkLgorICoKKyAqIFRoaXMgZnVuY3Rpb24gaXMgYSBiaXQgbW9yZSBw ZXJtaXNzaXZlIHRoYW4gaTkxNV9nZW1fb2JqZWN0X2Nhbl9taWdyYXRlKCkKKyAqIHRvIGFsbG93 IGZvciBtaWdyYXRpbmcgb2JqZWN0cyB3aGVyZSB0aGUgY2FsbGVyIGtub3dzIGV4YWN0bHkgd2hh dCBpcworICogaGFwcGVuaW5nLiBGb3IgZXhhbXBsZSB3aXRoaW4gc2VsZnRlc3RzLiBNb3JlIHNw ZWNpZmljYWxseSB0aGlzCisgKiBmdW5jdGlvbiBhbGxvd3MgbWlncmF0aW5nIEk5MTVfQk9fQUxM T0NfVVNFUiBvYmplY3RzIHRvIHJlZ2lvbnMKKyAqIHRoYXQgYXJlIG5vdCBpbiB0aGUgbGlzdCBv ZiBhbGxvd2FibGUgcmVnaW9ucy4KKyAqCisgKiBOb3RlOiB0aGUgQHd3IHBhcmFtZXRlciBpcyBu b3QgdXNlZCB5ZXQsIGJ1dCBpbmNsdWRlZCB0byBtYWtlIHN1cmUKKyAqIGNhbGxlcnMgcHV0IHNv bWUgZWZmb3J0IGludG8gb2J0YWluaW5nIGEgdmFsaWQgd3cgY3R4IGlmIG9uZSBpcworICogYXZh aWxhYmxlLgorICoKKyAqIFJldHVybjogMCBvbiBzdWNjZXNzLiBOZWdhdGl2ZSBlcnJvciBjb2Rl IG9uIGZhaWx1cmUuIEluIHBhcnRpY3VsYXIgbWF5CisgKiByZXR1cm4gLUVOWElPIG9uIGxhY2sg b2YgcmVnaW9uIHNwYWNlLCAtRURFQURMSyBmb3IgZGVhZGxvY2sgYXZvaWRhbmNlCisgKiBpZiBA d3cgaXMgc2V0LCAtRUlOVFIgb3IgLUVSRVNUQVJUU1lTIGlmIHNpZ25hbCBwZW5kaW5nLCBhbmQK KyAqIC1FQlVTWSBpZiB0aGUgb2JqZWN0IGlzIHBpbm5lZC4KKyAqLworaW50IGk5MTVfZ2VtX29i amVjdF9taWdyYXRlKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmosCisJCQkgICAgc3Ry dWN0IGk5MTVfZ2VtX3d3X2N0eCAqd3csCisJCQkgICAgZW51bSBpbnRlbF9yZWdpb25faWQgaWQp Cit7CisJc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmk5MTUgPSB0b19pOTE1KG9iai0+YmFzZS5k ZXYpOworCXN0cnVjdCBpbnRlbF9tZW1vcnlfcmVnaW9uICptcjsKKworCUdFTV9CVUdfT04oaWQg Pj0gSU5URUxfUkVHSU9OX1VOS05PV04pOworCUdFTV9CVUdfT04ob2JqLT5tbS5tYWR2ICE9IEk5 MTVfTUFEVl9XSUxMTkVFRCk7CisJYXNzZXJ0X29iamVjdF9oZWxkKG9iaik7CisKKwltciA9IGk5 MTUtPm1tLnJlZ2lvbnNbaWRdOworCUdFTV9CVUdfT04oIW1yKTsKKworCWlmIChvYmotPm1tLnJl Z2lvbiA9PSBtcikKKwkJcmV0dXJuIDA7CisKKwlpZiAoIWk5MTVfZ2VtX29iamVjdF9ldmljdGFi bGUob2JqKSkKKwkJcmV0dXJuIC1FQlVTWTsKKworCWlmICghb2JqLT5vcHMtPm1pZ3JhdGUpCisJ CXJldHVybiAtRU9QTk9UU1VQUDsKKworCXJldHVybiBvYmotPm9wcy0+bWlncmF0ZShvYmosIG1y KTsKK30KKwogdm9pZCBpOTE1X2dlbV9pbml0X19vYmplY3RzKHN0cnVjdCBkcm1faTkxNV9wcml2 YXRlICppOTE1KQogewogCUlOSVRfV09SSygmaTkxNS0+bW0uZnJlZV93b3JrLCBfX2k5MTVfZ2Vt X2ZyZWVfd29yayk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9n ZW1fb2JqZWN0LmggYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0LmgK aW5kZXggZWEzMjI0YTQ4MGM0Li44Y2JkN2E1MzM0ZTIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1 L2RybS9pOTE1L2dlbS9pOTE1X2dlbV9vYmplY3QuaAorKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkx NS9nZW0vaTkxNV9nZW1fb2JqZWN0LmgKQEAgLTE3LDYgKzE3LDggQEAKICNpbmNsdWRlICJpOTE1 X2dlbV93dy5oIgogI2luY2x1ZGUgImk5MTVfdm1hX3R5cGVzLmgiCiAKK2VudW0gaW50ZWxfcmVn aW9uX2lkOworCiAvKgogICogWFhYOiBUaGVyZSBpcyBhIHByZXZhbGVuY2Ugb2YgdGhlIGFzc3Vt cHRpb24gdGhhdCB3ZSBmaXQgdGhlCiAgKiBvYmplY3QncyBwYWdlIGNvdW50IGluc2lkZSBhIDMy Yml0IF9zaWduZWRfIHZhcmlhYmxlLiBMZXQncyBkb2N1bWVudApAQCAtNTk3LDYgKzU5OSwxNiBA QCBib29sIGk5MTVfZ2VtX29iamVjdF9taWdyYXRhYmxlKHN0cnVjdCBkcm1faTkxNV9nZW1fb2Jq ZWN0ICpvYmopOwogCiBib29sIGk5MTVfZ2VtX29iamVjdF92YWxpZGF0ZXNfdG9fbG1lbShzdHJ1 Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKTsKIAoraW50IGk5MTVfZ2VtX29iamVjdF9taWdy YXRlKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmosCisJCQkgICAgc3RydWN0IGk5MTVf Z2VtX3d3X2N0eCAqd3csCisJCQkgICAgZW51bSBpbnRlbF9yZWdpb25faWQgaWQpOworCitib29s IGk5MTVfZ2VtX29iamVjdF9jYW5fbWlncmF0ZShzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAq b2JqLAorCQkJCSBlbnVtIGludGVsX3JlZ2lvbl9pZCBpZCk7CisKK2ludCBpOTE1X2dlbV9vYmpl Y3Rfd2FpdF9taWdyYXRpb24oc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaiwKKwkJCQkg ICB1bnNpZ25lZCBpbnQgZmxhZ3MpOworCiAjaWZkZWYgQ09ORklHX01NVV9OT1RJRklFUgogc3Rh dGljIGlubGluZSBib29sCiBpOTE1X2dlbV9vYmplY3RfaXNfdXNlcnB0cihzdHJ1Y3QgZHJtX2k5 MTVfZ2VtX29iamVjdCAqb2JqKQpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2Vt L2k5MTVfZ2VtX29iamVjdF90eXBlcy5oIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVf Z2VtX29iamVjdF90eXBlcy5oCmluZGV4IDQ0MWY5MTNjODdlNi4uZWYzZGUyYWU5NzIzIDEwMDY0 NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fb2JqZWN0X3R5cGVzLmgK KysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ2VtL2k5MTVfZ2VtX29iamVjdF90eXBlcy5oCkBA IC0xOCw2ICsxOCw3IEBACiAKIHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0Owogc3RydWN0IGlu dGVsX2Zyb25idWZmZXI7CitzdHJ1Y3QgaW50ZWxfbWVtb3J5X3JlZ2lvbjsKIAogLyoKICAqIHN0 cnVjdCBpOTE1X2x1dF9oYW5kbGUgdHJhY2tzIHRoZSBmYXN0IGxvb2t1cHMgZnJvbSBoYW5kbGUg dG8gdm1hIHVzZWQKQEAgLTc3LDYgKzc4LDE0IEBAIHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0 X29wcyB7CiAJICogZGVsYXllZF9mcmVlIC0gT3ZlcnJpZGUgdGhlIGRlZmF1bHQgZGVsYXllZCBm cmVlIGltcGxlbWVudGF0aW9uCiAJICovCiAJdm9pZCAoKmRlbGF5ZWRfZnJlZSkoc3RydWN0IGRy bV9pOTE1X2dlbV9vYmplY3QgKm9iaik7CisKKwkvKioKKwkgKiBtaWdyYXRlIC0gTWlncmF0ZSBv YmplY3QgdG8gYSBkaWZmZXJlbnQgcmVnaW9uIGVpdGhlciBmb3IKKwkgKiBwaW5uaW5nIG9yIGZv ciBhcyBsb25nIGFzIHRoZSBvYmplY3QgbG9jayBpcyBoZWxkLgorCSAqLworCWludCAoKm1pZ3Jh dGUpKHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmosCisJCSAgICAgICBzdHJ1Y3QgaW50 ZWxfbWVtb3J5X3JlZ2lvbiAqbXIpOworCiAJdm9pZCAoKnJlbGVhc2UpKHN0cnVjdCBkcm1faTkx NV9nZW1fb2JqZWN0ICpvYmopOwogCiAJY29uc3Qgc3RydWN0IHZtX29wZXJhdGlvbnNfc3RydWN0 ICptbWFwX29wczsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dl bV90dG0uYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV90dG0uYwppbmRleCBj MzlkOTgyYzRmYTYuLjUyMWFiNzQwMDAxYSAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5 MTUvZ2VtL2k5MTVfZ2VtX3R0bS5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1 X2dlbV90dG0uYwpAQCAtNjE3LDcgKzYxNyw4IEBAIHN0cnVjdCB0dG1fZGV2aWNlX2Z1bmNzICpp OTE1X3R0bV9kcml2ZXIodm9pZCkKIAlyZXR1cm4gJmk5MTVfdHRtX2JvX2RyaXZlcjsKIH0KIAot c3RhdGljIGludCBpOTE1X3R0bV9nZXRfcGFnZXMoc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3Qg Km9iaikKK3N0YXRpYyBpbnQgX19pOTE1X3R0bV9nZXRfcGFnZXMoc3RydWN0IGRybV9pOTE1X2dl bV9vYmplY3QgKm9iaiwKKwkJCQlzdHJ1Y3QgdHRtX3BsYWNlbWVudCAqcGxhY2VtZW50KQogewog CXN0cnVjdCB0dG1fYnVmZmVyX29iamVjdCAqYm8gPSBpOTE1X2dlbV90b190dG0ob2JqKTsKIAlz dHJ1Y3QgdHRtX29wZXJhdGlvbl9jdHggY3R4ID0gewpAQCAtNjI1LDE5ICs2MjYsMTIgQEAgc3Rh dGljIGludCBpOTE1X3R0bV9nZXRfcGFnZXMoc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9i aikKIAkJLm5vX3dhaXRfZ3B1ID0gZmFsc2UsCiAJfTsKIAlzdHJ1Y3Qgc2dfdGFibGUgKnN0Owot CXN0cnVjdCB0dG1fcGxhY2UgcmVxdWVzdGVkLCBidXN5W0k5MTVfVFRNX01BWF9QTEFDRU1FTlRT XTsKLQlzdHJ1Y3QgdHRtX3BsYWNlbWVudCBwbGFjZW1lbnQ7CiAJaW50IHJlYWxfbnVtX2J1c3k7 CiAJaW50IHJldDsKIAotCUdFTV9CVUdfT04ob2JqLT5tbS5uX3BsYWNlbWVudHMgPiBJOTE1X1RU TV9NQVhfUExBQ0VNRU5UUyk7Ci0KLQkvKiBNb3ZlIHRvIHRoZSByZXF1ZXN0ZWQgcGxhY2VtZW50 LiAqLwotCWk5MTVfdHRtX3BsYWNlbWVudF9mcm9tX29iaihvYmosICZyZXF1ZXN0ZWQsIGJ1c3ks ICZwbGFjZW1lbnQpOwotCiAJLyogRmlyc3QgdHJ5IG9ubHkgdGhlIHJlcXVlc3RlZCBwbGFjZW1l bnQuIE5vIGV2aWN0aW9uLiAqLwotCXJlYWxfbnVtX2J1c3kgPSBmZXRjaF9hbmRfemVybygmcGxh Y2VtZW50Lm51bV9idXN5X3BsYWNlbWVudCk7Ci0JcmV0ID0gdHRtX2JvX3ZhbGlkYXRlKGJvLCAm cGxhY2VtZW50LCAmY3R4KTsKKwlyZWFsX251bV9idXN5ID0gZmV0Y2hfYW5kX3plcm8oJnBsYWNl bWVudC0+bnVtX2J1c3lfcGxhY2VtZW50KTsKKwlyZXQgPSB0dG1fYm9fdmFsaWRhdGUoYm8sIHBs YWNlbWVudCwgJmN0eCk7CiAJaWYgKHJldCkgewogCQlyZXQgPSBpOTE1X3R0bV9lcnJfdG9fZ2Vt KHJldCk7CiAJCS8qCkBAIC02NTIsOCArNjQ2LDggQEAgc3RhdGljIGludCBpOTE1X3R0bV9nZXRf cGFnZXMoc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaikKIAkJICogSWYgdGhlIGluaXRp YWwgYXR0ZW1wdCBmYWlscywgYWxsb3cgYWxsIGFjY2VwdGVkIHBsYWNlbWVudHMsCiAJCSAqIGV2 aWN0aW5nIGlmIG5lY2Vzc2FyeS4KIAkJICovCi0JCXBsYWNlbWVudC5udW1fYnVzeV9wbGFjZW1l bnQgPSByZWFsX251bV9idXN5OwotCQlyZXQgPSB0dG1fYm9fdmFsaWRhdGUoYm8sICZwbGFjZW1l bnQsICZjdHgpOworCQlwbGFjZW1lbnQtPm51bV9idXN5X3BsYWNlbWVudCA9IHJlYWxfbnVtX2J1 c3k7CisJCXJldCA9IHR0bV9ib192YWxpZGF0ZShibywgcGxhY2VtZW50LCAmY3R4KTsKIAkJaWYg KHJldCkKIAkJCXJldHVybiBpOTE1X3R0bV9lcnJfdG9fZ2VtKHJldCk7CiAJfQpAQCAtNjY4LDYg KzY2Miw3IEBAIHN0YXRpYyBpbnQgaTkxNV90dG1fZ2V0X3BhZ2VzKHN0cnVjdCBkcm1faTkxNV9n ZW1fb2JqZWN0ICpvYmopCiAJCWk5MTVfdHRtX2FkanVzdF9nZW1fYWZ0ZXJfbW92ZShvYmopOwog CX0KIAorCUdFTV9XQVJOX09OKG9iai0+bW0ucGFnZXMpOwogCS8qIE9iamVjdCBlaXRoZXIgaGFz IGEgcGFnZSB2ZWN0b3Igb3IgaXMgYW4gaW9tZW0gb2JqZWN0ICovCiAJc3QgPSBiby0+dHRtID8g aTkxNV90dG1fdHRfZ2V0X3N0KGJvLT50dG0pIDogb2JqLT50dG0uY2FjaGVkX2lvX3N0OwogCWlm IChJU19FUlIoc3QpKQpAQCAtNjc4LDYgKzY3Myw2MyBAQCBzdGF0aWMgaW50IGk5MTVfdHRtX2dl dF9wYWdlcyhzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAqb2JqKQogCXJldHVybiByZXQ7CiB9 CiAKK3N0YXRpYyBpbnQgaTkxNV90dG1fZ2V0X3BhZ2VzKHN0cnVjdCBkcm1faTkxNV9nZW1fb2Jq ZWN0ICpvYmopCit7CisJc3RydWN0IHR0bV9wbGFjZSByZXF1ZXN0ZWQsIGJ1c3lbSTkxNV9UVE1f TUFYX1BMQUNFTUVOVFNdOworCXN0cnVjdCB0dG1fcGxhY2VtZW50IHBsYWNlbWVudDsKKworCUdF TV9CVUdfT04ob2JqLT5tbS5uX3BsYWNlbWVudHMgPiBJOTE1X1RUTV9NQVhfUExBQ0VNRU5UUyk7 CisKKwkvKiBNb3ZlIHRvIHRoZSByZXF1ZXN0ZWQgcGxhY2VtZW50LiAqLworCWk5MTVfdHRtX3Bs YWNlbWVudF9mcm9tX29iaihvYmosICZyZXF1ZXN0ZWQsIGJ1c3ksICZwbGFjZW1lbnQpOworCisJ cmV0dXJuIF9faTkxNV90dG1fZ2V0X3BhZ2VzKG9iaiwgJnBsYWNlbWVudCk7Cit9CisKKy8qKgor ICogRE9DOiBNaWdyYXRpb24gdnMgZXZpY3Rpb24KKyAqCisgKiBHRU0gbWlncmF0aW9uIG1heSBu b3QgYmUgdGhlIHNhbWUgYXMgVFRNIG1pZ3JhdGlvbiAvIGV2aWN0aW9uLiBJZgorICogdGhlIFRU TSBjb3JlIGRlY2lkZXMgdG8gZXZpY3QgYW4gb2JqZWN0IGl0IG1heSBiZSBldmljdGVkIHRvIGEK KyAqIFRUTSBtZW1vcnkgdHlwZSB0aGF0IGlzIG5vdCBpbiB0aGUgb2JqZWN0J3MgYWxsb3dhYmxl IEdFTSByZWdpb25zLCBvcgorICogaW4gZmFjdCB0aGVvcmV0aWNhbGx5IHRvIGEgVFRNIG1lbW9y eSB0eXBlIHRoYXQgZG9lc24ndCBjb3JyZXNwb25kIHRvCisgKiBhIEdFTSBtZW1vcnkgcmVnaW9u LiBJbiB0aGF0IGNhc2UgdGhlIG9iamVjdCdzIEdFTSByZWdpb24gaXMgbm90CisgKiB1cGRhdGVk LCBhbmQgdGhlIGRhdGEgaXMgbWlncmF0ZWQgYmFjayB0byB0aGUgR0VNIHJlZ2lvbiBhdAorICog Z2V0X3BhZ2VzIHRpbWUuIFRUTSBtYXkgaG93ZXZlciBzZXQgdXAgQ1BVIHB0ZXMgdG8gdGhlIG9i amVjdCBldmVuCisgKiB3aGVuIGl0IGlzIGV2aWN0ZWQuCisgKiBHZW0gZm9yY2VkIG1pZ3JhdGlv biB1c2luZyB0aGUgaTkxNV90dG1fbWlncmF0ZSgpIG9wLCBpcyBhbGxvd2VkIGV2ZW4KKyAqIHRv IHJlZ2lvbnMgdGhhdCBhcmUgbm90IGluIHRoZSBvYmplY3QncyBsaXN0IG9mIGFsbG93YWJsZSBw bGFjZW1lbnRzLgorICovCitzdGF0aWMgaW50IGk5MTVfdHRtX21pZ3JhdGUoc3RydWN0IGRybV9p OTE1X2dlbV9vYmplY3QgKm9iaiwKKwkJCSAgICBzdHJ1Y3QgaW50ZWxfbWVtb3J5X3JlZ2lvbiAq bXIpCit7CisJc3RydWN0IHR0bV9wbGFjZSByZXF1ZXN0ZWQ7CisJc3RydWN0IHR0bV9wbGFjZW1l bnQgcGxhY2VtZW50OworCWludCByZXQ7CisKKwlpOTE1X3R0bV9wbGFjZV9mcm9tX3JlZ2lvbiht ciwgJnJlcXVlc3RlZCwgb2JqLT5mbGFncyk7CisJcGxhY2VtZW50Lm51bV9wbGFjZW1lbnQgPSAx OworCXBsYWNlbWVudC5udW1fYnVzeV9wbGFjZW1lbnQgPSAxOworCXBsYWNlbWVudC5wbGFjZW1l bnQgPSAmcmVxdWVzdGVkOworCXBsYWNlbWVudC5idXN5X3BsYWNlbWVudCA9ICZyZXF1ZXN0ZWQ7 CisKKwlyZXQgPSBfX2k5MTVfdHRtX2dldF9wYWdlcyhvYmosICZwbGFjZW1lbnQpOworCWlmIChy ZXQpCisJCXJldHVybiByZXQ7CisKKwkvKgorCSAqIFJlaW5pdGlhbGl6ZSB0aGUgcmVnaW9uIGJp bmRpbmdzLiBUaGlzIGlzIHByaW1hcmlseQorCSAqIHJlcXVpcmVkIGZvciBvYmplY3RzIHdoZXJl IHRoZSBuZXcgcmVnaW9uIGlzIG5vdCBpbgorCSAqIGl0cyBhbGxvd2FibGUgcGxhY2VtZW50cy4K KwkgKi8KKwlpZiAob2JqLT5tbS5yZWdpb24gIT0gbXIpIHsKKwkJaTkxNV9nZW1fb2JqZWN0X3Jl bGVhc2VfbWVtb3J5X3JlZ2lvbihvYmopOworCQlpOTE1X2dlbV9vYmplY3RfaW5pdF9tZW1vcnlf cmVnaW9uKG9iaiwgbXIpOworCX0KKworCXJldHVybiAwOworfQorCiBzdGF0aWMgdm9pZCBpOTE1 X3R0bV9wdXRfcGFnZXMoc3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaiwKIAkJCSAgICAg ICBzdHJ1Y3Qgc2dfdGFibGUgKnN0KQogewpAQCAtODE0LDYgKzg2Niw3IEBAIHN0YXRpYyBjb25z dCBzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdF9vcHMgaTkxNV9nZW1fdHRtX29ial9vcHMgPSB7 CiAJLnRydW5jYXRlID0gaTkxNV90dG1fcHVyZ2UsCiAJLmFkanVzdF9scnUgPSBpOTE1X3R0bV9h ZGp1c3RfbHJ1LAogCS5kZWxheWVkX2ZyZWUgPSBpOTE1X3R0bV9kZWxheWVkX2ZyZWUsCisJLm1p Z3JhdGUgPSBpOTE1X3R0bV9taWdyYXRlLAogCS5tbWFwX29mZnNldCA9IGk5MTVfdHRtX21tYXBf b2Zmc2V0LAogCS5tbWFwX29wcyA9ICZ2bV9vcHNfdHRtLAogfTsKZGlmZiAtLWdpdCBhL2RyaXZl cnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV93YWl0LmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkx NS9nZW0vaTkxNV9nZW1fd2FpdC5jCmluZGV4IDEwNzBkM2FmZGNlNy4uZjkwOWFhYTA5ZDljIDEw MDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9nZW0vaTkxNV9nZW1fd2FpdC5jCisrKyBi L2RyaXZlcnMvZ3B1L2RybS9pOTE1L2dlbS9pOTE1X2dlbV93YWl0LmMKQEAgLTI5MCwzICsyOTAs MjIgQEAgaTkxNV9nZW1fd2FpdF9pb2N0bChzdHJ1Y3QgZHJtX2RldmljZSAqZGV2LCB2b2lkICpk YXRhLCBzdHJ1Y3QgZHJtX2ZpbGUgKmZpbGUpCiAJaTkxNV9nZW1fb2JqZWN0X3B1dChvYmopOwog CXJldHVybiByZXQ7CiB9CisKKy8qKgorICogaTkxNV9nZW1fb2JqZWN0X3dhaXRfbWlncmF0aW9u IC0gU3luYyBhbiBhY2NlbGVyYXRlZCBtaWdyYXRpb24gb3BlcmF0aW9uCisgKiBAb2JqOiBUaGUg bWlncmF0aW5nIG9iamVjdC4KKyAqIEBmbGFnczogd2FpdGluZyBmbGFncy4gQ3VycmVudGx5IHN1 cHBvcnRzIG9ubHkgSTkxNV9XQUlUX0lOVEVSUlVQVElCTEUuCisgKgorICogV2FpdCBmb3IgYW55 IHBlbmRpbmcgYXN5bmMgbWlncmF0aW9uIG9wZXJhdGlvbiBvbiB0aGUgb2JqZWN0LAorICogd2hl dGhlciBpdCdzIGV4cGxpY2l0bHkgKGk5MTVfZ2VtX29iamVjdF9taWdyYXRlKCkpIG9yIGltcGxp Y2l0bHkKKyAqIChzd2FwaW4sIGluaXRpYWwgY2xlYXJpbmcpIGluaXRpYXRlZC4KKyAqCisgKiBS ZXR1cm46IDAgaWYgc3VjY2Vzc2Z1bCwgLUVSRVNUQVJUU1lTIGlmIGEgc2lnbmFsIHdhcyBoaXQg ZHVyaW5nIHdhaXRpbmcuCisgKi8KK2ludCBpOTE1X2dlbV9vYmplY3Rfd2FpdF9taWdyYXRpb24o c3RydWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iaiwKKwkJCQkgICB1bnNpZ25lZCBpbnQgZmxh Z3MpCit7CisJbWlnaHRfc2xlZXAoKTsKKwkvKiBOT1AgZm9yIG5vdy4gKi8KKwlyZXR1cm4gMDsK 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E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="408203406" Received: from ettammin-mobl1.ger.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.141]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2021 08:12:27 -0700 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH v5 1/3] drm/i915/gem: Implement object migration Date: Tue, 29 Jun 2021 17:12:01 +0200 Message-Id: <20210629151203.209465-2-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210629151203.209465-1-thomas.hellstrom@linux.intel.com> References: <20210629151203.209465-1-thomas.hellstrom@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , "Michael J . Ruhl" , matthew.auld@intel.com, kernel test robot Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Introduce an interface to migrate objects between regions. This is primarily intended to migrate objects to LMEM for display and to SYSTEM for dma-buf, but might be reused in one form or another for performance-based migration. v2: - Verify that the memory region given as an id really exists. (Reported by Matthew Auld) - Call i915_gem_object_{init,release}_memory_region() when switching region to handle also switching region lists. (Reported by Matthew Auld) v3: - Fix i915_gem_object_can_migrate() to return true if object is already in the correct region, even if the object ops doesn't have a migrate() callback. - Update typo in commit message. - Fix kerneldoc of i915_gem_object_wait_migration(). v4: - Improve documentation (Suggested by Mattew Auld and Michael Ruhl) - Always assume TTM migration hits a TTM move and unsets the pages through move_notify. (Reported by Matthew Auld) - Add a dma_fence_might_wait() annotation to i915_gem_object_wait_migration() (Suggested by Daniel Vetter) v5: - Re-add might_sleep() instead of __dma_fence_might_wait(), Sent v4 with the wrong version, didn't compile and __dma_fence_might_wait() is not exported. - Added an R-B. Reported-by: kernel test robot Signed-off-by: Thomas Hellström Reviewed-by: Michael J. Ruhl Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 112 ++++++++++++++++++ drivers/gpu/drm/i915/gem/i915_gem_object.h | 12 ++ .../gpu/drm/i915/gem/i915_gem_object_types.h | 9 ++ drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 77 ++++++++++-- drivers/gpu/drm/i915/gem/i915_gem_wait.c | 19 +++ 5 files changed, 217 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index 07e8ff9a8aae..225b77fb4314 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -513,6 +513,118 @@ bool i915_gem_object_has_iomem(const struct drm_i915_gem_object *obj) return obj->mem_flags & I915_BO_FLAG_IOMEM; } +/** + * i915_gem_object_can_migrate - Whether an object likely can be migrated + * + * @obj: The object to migrate + * @id: The region intended to migrate to + * + * Check whether the object backend supports migration to the + * given region. Note that pinning may affect the ability to migrate as + * returned by this function. + * + * This function is primarily intended as a helper for checking the + * possibility to migrate objects and might be slightly less permissive + * than i915_gem_object_migrate() when it comes to objects with the + * I915_BO_ALLOC_USER flag set. + * + * Return: true if migration is possible, false otherwise. + */ +bool i915_gem_object_can_migrate(struct drm_i915_gem_object *obj, + enum intel_region_id id) +{ + struct drm_i915_private *i915 = to_i915(obj->base.dev); + unsigned int num_allowed = obj->mm.n_placements; + struct intel_memory_region *mr; + unsigned int i; + + GEM_BUG_ON(id >= INTEL_REGION_UNKNOWN); + GEM_BUG_ON(obj->mm.madv != I915_MADV_WILLNEED); + + mr = i915->mm.regions[id]; + if (!mr) + return false; + + if (obj->mm.region == mr) + return true; + + if (!i915_gem_object_evictable(obj)) + return false; + + if (!obj->ops->migrate) + return false; + + if (!(obj->flags & I915_BO_ALLOC_USER)) + return true; + + if (num_allowed == 0) + return false; + + for (i = 0; i < num_allowed; ++i) { + if (mr == obj->mm.placements[i]) + return true; + } + + return false; +} + +/** + * i915_gem_object_migrate - Migrate an object to the desired region id + * @obj: The object to migrate. + * @ww: An optional struct i915_gem_ww_ctx. If NULL, the backend may + * not be successful in evicting other objects to make room for this object. + * @id: The region id to migrate to. + * + * Attempt to migrate the object to the desired memory region. The + * object backend must support migration and the object may not be + * pinned, (explicitly pinned pages or pinned vmas). The object must + * be locked. + * On successful completion, the object will have pages pointing to + * memory in the new region, but an async migration task may not have + * completed yet, and to accomplish that, i915_gem_object_wait_migration() + * must be called. + * + * This function is a bit more permissive than i915_gem_object_can_migrate() + * to allow for migrating objects where the caller knows exactly what is + * happening. For example within selftests. More specifically this + * function allows migrating I915_BO_ALLOC_USER objects to regions + * that are not in the list of allowable regions. + * + * Note: the @ww parameter is not used yet, but included to make sure + * callers put some effort into obtaining a valid ww ctx if one is + * available. + * + * Return: 0 on success. Negative error code on failure. In particular may + * return -ENXIO on lack of region space, -EDEADLK for deadlock avoidance + * if @ww is set, -EINTR or -ERESTARTSYS if signal pending, and + * -EBUSY if the object is pinned. + */ +int i915_gem_object_migrate(struct drm_i915_gem_object *obj, + struct i915_gem_ww_ctx *ww, + enum intel_region_id id) +{ + struct drm_i915_private *i915 = to_i915(obj->base.dev); + struct intel_memory_region *mr; + + GEM_BUG_ON(id >= INTEL_REGION_UNKNOWN); + GEM_BUG_ON(obj->mm.madv != I915_MADV_WILLNEED); + assert_object_held(obj); + + mr = i915->mm.regions[id]; + GEM_BUG_ON(!mr); + + if (obj->mm.region == mr) + return 0; + + if (!i915_gem_object_evictable(obj)) + return -EBUSY; + + if (!obj->ops->migrate) + return -EOPNOTSUPP; + + return obj->ops->migrate(obj, mr); +} + void i915_gem_init__objects(struct drm_i915_private *i915) { INIT_WORK(&i915->mm.free_work, __i915_gem_free_work); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h index ea3224a480c4..8cbd7a5334e2 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -17,6 +17,8 @@ #include "i915_gem_ww.h" #include "i915_vma_types.h" +enum intel_region_id; + /* * XXX: There is a prevalence of the assumption that we fit the * object's page count inside a 32bit _signed_ variable. Let's document @@ -597,6 +599,16 @@ bool i915_gem_object_migratable(struct drm_i915_gem_object *obj); bool i915_gem_object_validates_to_lmem(struct drm_i915_gem_object *obj); +int i915_gem_object_migrate(struct drm_i915_gem_object *obj, + struct i915_gem_ww_ctx *ww, + enum intel_region_id id); + +bool i915_gem_object_can_migrate(struct drm_i915_gem_object *obj, + enum intel_region_id id); + +int i915_gem_object_wait_migration(struct drm_i915_gem_object *obj, + unsigned int flags); + #ifdef CONFIG_MMU_NOTIFIER static inline bool i915_gem_object_is_userptr(struct drm_i915_gem_object *obj) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h index 441f913c87e6..ef3de2ae9723 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h @@ -18,6 +18,7 @@ struct drm_i915_gem_object; struct intel_fronbuffer; +struct intel_memory_region; /* * struct i915_lut_handle tracks the fast lookups from handle to vma used @@ -77,6 +78,14 @@ struct drm_i915_gem_object_ops { * delayed_free - Override the default delayed free implementation */ void (*delayed_free)(struct drm_i915_gem_object *obj); + + /** + * migrate - Migrate object to a different region either for + * pinning or for as long as the object lock is held. + */ + int (*migrate)(struct drm_i915_gem_object *obj, + struct intel_memory_region *mr); + void (*release)(struct drm_i915_gem_object *obj); const struct vm_operations_struct *mmap_ops; diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index c39d982c4fa6..521ab740001a 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -617,7 +617,8 @@ struct ttm_device_funcs *i915_ttm_driver(void) return &i915_ttm_bo_driver; } -static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) +static int __i915_ttm_get_pages(struct drm_i915_gem_object *obj, + struct ttm_placement *placement) { struct ttm_buffer_object *bo = i915_gem_to_ttm(obj); struct ttm_operation_ctx ctx = { @@ -625,19 +626,12 @@ static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) .no_wait_gpu = false, }; struct sg_table *st; - struct ttm_place requested, busy[I915_TTM_MAX_PLACEMENTS]; - struct ttm_placement placement; int real_num_busy; int ret; - GEM_BUG_ON(obj->mm.n_placements > I915_TTM_MAX_PLACEMENTS); - - /* Move to the requested placement. */ - i915_ttm_placement_from_obj(obj, &requested, busy, &placement); - /* First try only the requested placement. No eviction. */ - real_num_busy = fetch_and_zero(&placement.num_busy_placement); - ret = ttm_bo_validate(bo, &placement, &ctx); + real_num_busy = fetch_and_zero(&placement->num_busy_placement); + ret = ttm_bo_validate(bo, placement, &ctx); if (ret) { ret = i915_ttm_err_to_gem(ret); /* @@ -652,8 +646,8 @@ static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) * If the initial attempt fails, allow all accepted placements, * evicting if necessary. */ - placement.num_busy_placement = real_num_busy; - ret = ttm_bo_validate(bo, &placement, &ctx); + placement->num_busy_placement = real_num_busy; + ret = ttm_bo_validate(bo, placement, &ctx); if (ret) return i915_ttm_err_to_gem(ret); } @@ -668,6 +662,7 @@ static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) i915_ttm_adjust_gem_after_move(obj); } + GEM_WARN_ON(obj->mm.pages); /* Object either has a page vector or is an iomem object */ st = bo->ttm ? i915_ttm_tt_get_st(bo->ttm) : obj->ttm.cached_io_st; if (IS_ERR(st)) @@ -678,6 +673,63 @@ static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) return ret; } +static int i915_ttm_get_pages(struct drm_i915_gem_object *obj) +{ + struct ttm_place requested, busy[I915_TTM_MAX_PLACEMENTS]; + struct ttm_placement placement; + + GEM_BUG_ON(obj->mm.n_placements > I915_TTM_MAX_PLACEMENTS); + + /* Move to the requested placement. */ + i915_ttm_placement_from_obj(obj, &requested, busy, &placement); + + return __i915_ttm_get_pages(obj, &placement); +} + +/** + * DOC: Migration vs eviction + * + * GEM migration may not be the same as TTM migration / eviction. If + * the TTM core decides to evict an object it may be evicted to a + * TTM memory type that is not in the object's allowable GEM regions, or + * in fact theoretically to a TTM memory type that doesn't correspond to + * a GEM memory region. In that case the object's GEM region is not + * updated, and the data is migrated back to the GEM region at + * get_pages time. TTM may however set up CPU ptes to the object even + * when it is evicted. + * Gem forced migration using the i915_ttm_migrate() op, is allowed even + * to regions that are not in the object's list of allowable placements. + */ +static int i915_ttm_migrate(struct drm_i915_gem_object *obj, + struct intel_memory_region *mr) +{ + struct ttm_place requested; + struct ttm_placement placement; + int ret; + + i915_ttm_place_from_region(mr, &requested, obj->flags); + placement.num_placement = 1; + placement.num_busy_placement = 1; + placement.placement = &requested; + placement.busy_placement = &requested; + + ret = __i915_ttm_get_pages(obj, &placement); + if (ret) + return ret; + + /* + * Reinitialize the region bindings. This is primarily + * required for objects where the new region is not in + * its allowable placements. + */ + if (obj->mm.region != mr) { + i915_gem_object_release_memory_region(obj); + i915_gem_object_init_memory_region(obj, mr); + } + + return 0; +} + static void i915_ttm_put_pages(struct drm_i915_gem_object *obj, struct sg_table *st) { @@ -814,6 +866,7 @@ static const struct drm_i915_gem_object_ops i915_gem_ttm_obj_ops = { .truncate = i915_ttm_purge, .adjust_lru = i915_ttm_adjust_lru, .delayed_free = i915_ttm_delayed_free, + .migrate = i915_ttm_migrate, .mmap_offset = i915_ttm_mmap_offset, .mmap_ops = &vm_ops_ttm, }; diff --git a/drivers/gpu/drm/i915/gem/i915_gem_wait.c b/drivers/gpu/drm/i915/gem/i915_gem_wait.c index 1070d3afdce7..f909aaa09d9c 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_wait.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_wait.c @@ -290,3 +290,22 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file) i915_gem_object_put(obj); return ret; } + +/** + * i915_gem_object_wait_migration - Sync an accelerated migration operation + * @obj: The migrating object. + * @flags: waiting flags. Currently supports only I915_WAIT_INTERRUPTIBLE. + * + * Wait for any pending async migration operation on the object, + * whether it's explicitly (i915_gem_object_migrate()) or implicitly + * (swapin, initial clearing) initiated. + * + * Return: 0 if successful, -ERESTARTSYS if a signal was hit during waiting. + */ +int i915_gem_object_wait_migration(struct drm_i915_gem_object *obj, + unsigned int flags) +{ + might_sleep(); + /* NOP for now. */ + return 0; +} -- 2.31.1