From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FE35C11F64 for ; Thu, 1 Jul 2021 17:39:21 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC5CC6044F for ; Thu, 1 Jul 2021 17:39:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DC5CC6044F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=eqC2jVWAkyIlzXKg1GHSuy1bkuY4i2y/WFfNkYSyIM8=; b=t7vtO1cwAcux3N DCM+vyutd8ticM1LEmy7fk1AexrGfeAAAyydxwuQO72TpABJ7nzWZygGfKnR14LtXJ4VD2YgJ33H+ IPDOj6fp3wBODQ6sSAV9HgcRYT0cEV3dVYNumqvcpHqXrSJxMNvnh2GYYS7FNT8/qYJ/9PrYcF50d kAII2a0AdyhAX1/PFj/9ky4TpGPI/DmTKDpgzZJPO9U15a5o/wG/z5smEvb1GNdUqLBMeybjykjjG eBTHxFZluJJGhB2ZGVjANCB4Itd3yzMLQiNWtcAjx6ZHjiaFxj1zjXgSb5sGpKWZfngP7CgR1Gvac QvBZNuK4EMSjjCjkTOEQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lz0dH-000dlj-SJ; Thu, 01 Jul 2021 17:37:47 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lz0dD-000dl9-Kq for linux-arm-kernel@lists.infradead.org; Thu, 01 Jul 2021 17:37:45 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id E8A2A6138C; Thu, 1 Jul 2021 17:37:41 +0000 (UTC) Date: Thu, 1 Jul 2021 18:37:39 +0100 From: Catalin Marinas To: Peter Collingbourne Cc: Vincenzo Frascino , Will Deacon , Evgenii Stepanov , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] arm64: mte: avoid TFSR related operations unless in async mode Message-ID: <20210701173738.GI12484@arm.com> References: <20210701031448.2173-1-pcc@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210701031448.2173-1-pcc@google.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210701_103743_743441_03999415 X-CRM114-Status: GOOD ( 19.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jun 30, 2021 at 08:14:48PM -0700, Peter Collingbourne wrote: > There is no reason to touch TFSR nor issue a DSB unless our task is > in asynchronous mode. Since these operations (especially the DSB) > may be expensive on certain microarchitectures, only perform them > if necessary. Have you noticed any performance degradation in practice? > Signed-off-by: Peter Collingbourne > Link: https://linux-review.googlesource.com/id/Ib353a63e3d0abc2b0b008e96aa2d9692cfc1b815 > --- > arch/arm64/kernel/entry.S | 27 +++++++++++++++++++-------- > 1 file changed, 19 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S > index 863d44f73028..c2338414c558 100644 > --- a/arch/arm64/kernel/entry.S > +++ b/arch/arm64/kernel/entry.S > @@ -133,12 +133,18 @@ alternative_cb_end > .endm > > /* Check for MTE asynchronous tag check faults */ > - .macro check_mte_async_tcf, tmp, ti_flags > + .macro check_mte_async_tcf, tmp, ti_flags, thread_sctlr > #ifdef CONFIG_ARM64_MTE > .arch_extension lse > alternative_if_not ARM64_MTE > b 1f > alternative_else_nop_endif > + /* > + * Asynchronous tag check faults are only possible in ASYNC (2) or > + * ASYM (3) modes. In each of these modes bit 1 of SCTLR_EL1.TCF0 is > + * set, so skip the check if it is unset. > + */ > + tbz \thread_sctlr, #(SCTLR_EL1_TCF0_SHIFT + 1), 1f > mrs_s \tmp, SYS_TFSRE0_EL1 > tbz \tmp, #SYS_TFSR_EL1_TF0_SHIFT, 1f I don't think this one is that expensive. > /* Asynchronous TCF occurred for TTBR0 access, set the TI flag */ > @@ -151,11 +157,14 @@ alternative_else_nop_endif > .endm > > /* Clear the MTE asynchronous tag check faults */ > - .macro clear_mte_async_tcf > + .macro clear_mte_async_tcf thread_sctlr > #ifdef CONFIG_ARM64_MTE > alternative_if ARM64_MTE > + /* See comment in check_mte_async_tcf above. */ > + tbz \thread_sctlr, #(SCTLR_EL1_TCF0_SHIFT + 1), 1f > dsb ish > msr_s SYS_TFSRE0_EL1, xzr > +1: Here, maybe, as we have a DSB. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel