diff for duplicates of <20210706140513.GA26498@lst.de> diff --git a/a/1.txt b/N1/1.txt index 6ff82d9..57559f3 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -11,6 +11,6 @@ I don't really like it as it doesn't scale for adding multiple global pools, e.g. for the 64-bit addressable one for the various encrypted secure guest schemes. _______________________________________________ -Intel-gfx mailing list -Intel-gfx@lists.freedesktop.org -https://lists.freedesktop.org/mailman/listinfo/intel-gfx +iommu mailing list +iommu@lists.linux-foundation.org +https://lists.linuxfoundation.org/mailman/listinfo/iommu diff --git a/a/content_digest b/N1/content_digest index 8a9a2e2..5160d1d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -9,7 +9,7 @@ "ref\020210706132422.GA20327@willie-the-truck\0" "ref\0a59f771f-3289-62f0-ca50-8f3675d9b166@arm.com\0" "From\0Christoph Hellwig <hch@lst.de>\0" - "Subject\0Re: [Intel-gfx] [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing\0" + "Subject\0Re: [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing\0" "Date\0Tue, 6 Jul 2021 16:05:13 +0200\0" "To\0Robin Murphy <robin.murphy@arm.com>\0" "Cc\0Jim Quinlan <james.quinlan@broadcom.com>" @@ -17,6 +17,7 @@ linux-devicetree <devicetree@vger.kernel.org> peterz@infradead.org benh@kernel.crashing.org + joonas.lahtinen@linux.intel.com dri-devel@lists.freedesktop.org chris@chris-wilson.co.uk grant.likely@arm.com @@ -41,8 +42,11 @@ Will Deacon <will@kernel.org> Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> intel-gfx@lists.freedesktop.org + maarten.lankhorst@linux.intel.com + jani.nikula@linux.intel.com Nathan Chancellor <nathan@kernel.org> Rob Herring <robh+dt@kernel.org> + rodrigo.vivi@intel.com Bjorn Helgaas <bhelgaas@google.com> Claire Chang <tientzu@chromium.org> Dan Williams <dan.j.williams@intel.com> @@ -54,6 +58,7 @@ Qian Cai <quic_qiancai@quicinc.com> lkml <linux-kernel@vger.kernel.org> list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org> + Daniel Vetter <daniel@ffwll.ch> xypron.glpk@gmx.de Tom Lendacky <thomas.lendacky@amd.com> linuxppc-dev@lists.ozlabs.org @@ -73,8 +78,8 @@ "pools, e.g. for the 64-bit addressable one for the various encrypted\n" "secure guest schemes.\n" "_______________________________________________\n" - "Intel-gfx mailing list\n" - "Intel-gfx@lists.freedesktop.org\n" - https://lists.freedesktop.org/mailman/listinfo/intel-gfx + "iommu mailing list\n" + "iommu@lists.linux-foundation.org\n" + https://lists.linuxfoundation.org/mailman/listinfo/iommu -d6ce0daddcdc823487221817a8e484c0186ec01ea6d428bb190e6fd97b939f83 +531f69fb584b24f41d526e3669c15583bd79f706fafa3caf0d86546a68ce24b1
diff --git a/a/1.txt b/N2/1.txt index 6ff82d9..e27c0bb 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -10,7 +10,3 @@ Claire did implement something like your suggestion originally, but I don't really like it as it doesn't scale for adding multiple global pools, e.g. for the 64-bit addressable one for the various encrypted secure guest schemes. -_______________________________________________ -Intel-gfx mailing list -Intel-gfx@lists.freedesktop.org -https://lists.freedesktop.org/mailman/listinfo/intel-gfx diff --git a/a/content_digest b/N2/content_digest index 8a9a2e2..56c7b04 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -9,54 +9,59 @@ "ref\020210706132422.GA20327@willie-the-truck\0" "ref\0a59f771f-3289-62f0-ca50-8f3675d9b166@arm.com\0" "From\0Christoph Hellwig <hch@lst.de>\0" - "Subject\0Re: [Intel-gfx] [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing\0" + "Subject\0Re: [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing\0" "Date\0Tue, 6 Jul 2021 16:05:13 +0200\0" "To\0Robin Murphy <robin.murphy@arm.com>\0" - "Cc\0Jim Quinlan <james.quinlan@broadcom.com>" + "Cc\0Will Deacon <will@kernel.org>" + Christoph Hellwig <hch@lst.de> heikki.krogerus@linux.intel.com - linux-devicetree <devicetree@vger.kernel.org> + thomas.hellstrom@linux.intel.com peterz@infradead.org benh@kernel.crashing.org + joonas.lahtinen@linux.intel.com dri-devel@lists.freedesktop.org chris@chris-wilson.co.uk grant.likely@arm.com paulus@samba.org Frank Rowand <frowand.list@gmail.com> mingo@kernel.org - Jianxiong Gao <jxgao@google.com> Stefano Stabellini <sstabellini@kernel.org> Saravana Kannan <saravanak@google.com> mpe@ellerman.id.au Rafael J . Wysocki <rafael.j.wysocki@intel.com> - Christoph Hellwig <hch@lst.de> Bartosz Golaszewski <bgolaszewski@baylibre.com> bskeggs@redhat.com linux-pci@vger.kernel.org xen-devel@lists.xenproject.org Thierry Reding <treding@nvidia.com> + intel-gfx@lists.freedesktop.org matthew.auld@intel.com - Nicolas Boichat <drinkcat@chromium.org> - thomas.hellstrom@linux.intel.com - jgross@suse.com - Will Deacon <will@kernel.org> + linux-devicetree <devicetree@vger.kernel.org> + Jianxiong Gao <jxgao@google.com> + Daniel Vetter <daniel@ffwll.ch> Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> - intel-gfx@lists.freedesktop.org + maarten.lankhorst@linux.intel.com + airlied@linux.ie + Dan Williams <dan.j.williams@intel.com> + linuxppc-dev@lists.ozlabs.org + jani.nikula@linux.intel.com Nathan Chancellor <nathan@kernel.org> Rob Herring <robh+dt@kernel.org> + rodrigo.vivi@intel.com Bjorn Helgaas <bhelgaas@google.com> Claire Chang <tientzu@chromium.org> - Dan Williams <dan.j.williams@intel.com> - Andy Shevchenko <andriy.shevchenko@linux.intel.com> boris.ostrovsky@oracle.com - airlied@linux.ie + Andy Shevchenko <andriy.shevchenko@linux.intel.com> + jgross@suse.com + Nicolas Boichat <drinkcat@chromium.org> Greg KH <gregkh@linuxfoundation.org> Randy Dunlap <rdunlap@infradead.org> Qian Cai <quic_qiancai@quicinc.com> lkml <linux-kernel@vger.kernel.org> list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org> + Jim Quinlan <james.quinlan@broadcom.com> xypron.glpk@gmx.de Tom Lendacky <thomas.lendacky@amd.com> - linuxppc-dev@lists.ozlabs.org " bauerman@linux.ibm.com\0" "\00:1\0" "b\0" @@ -71,10 +76,6 @@ "Claire did implement something like your suggestion originally, but\n" "I don't really like it as it doesn't scale for adding multiple global\n" "pools, e.g. for the 64-bit addressable one for the various encrypted\n" - "secure guest schemes.\n" - "_______________________________________________\n" - "Intel-gfx mailing list\n" - "Intel-gfx@lists.freedesktop.org\n" - https://lists.freedesktop.org/mailman/listinfo/intel-gfx + secure guest schemes. -d6ce0daddcdc823487221817a8e484c0186ec01ea6d428bb190e6fd97b939f83 +1e741c845f5f80dc2d2793202006eaba460cb6efbd4a246427ced64eb3b23e2a
diff --git a/a/1.txt b/N3/1.txt index 6ff82d9..e27c0bb 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -10,7 +10,3 @@ Claire did implement something like your suggestion originally, but I don't really like it as it doesn't scale for adding multiple global pools, e.g. for the 64-bit addressable one for the various encrypted secure guest schemes. -_______________________________________________ -Intel-gfx mailing list -Intel-gfx@lists.freedesktop.org -https://lists.freedesktop.org/mailman/listinfo/intel-gfx diff --git a/a/content_digest b/N3/content_digest index 8a9a2e2..7d5c470 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -9,14 +9,14 @@ "ref\020210706132422.GA20327@willie-the-truck\0" "ref\0a59f771f-3289-62f0-ca50-8f3675d9b166@arm.com\0" "From\0Christoph Hellwig <hch@lst.de>\0" - "Subject\0Re: [Intel-gfx] [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing\0" + "Subject\0Re: [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing\0" "Date\0Tue, 6 Jul 2021 16:05:13 +0200\0" "To\0Robin Murphy <robin.murphy@arm.com>\0" "Cc\0Jim Quinlan <james.quinlan@broadcom.com>" heikki.krogerus@linux.intel.com linux-devicetree <devicetree@vger.kernel.org> peterz@infradead.org - benh@kernel.crashing.org + joonas.lahtinen@linux.intel.com dri-devel@lists.freedesktop.org chris@chris-wilson.co.uk grant.likely@arm.com @@ -26,7 +26,6 @@ Jianxiong Gao <jxgao@google.com> Stefano Stabellini <sstabellini@kernel.org> Saravana Kannan <saravanak@google.com> - mpe@ellerman.id.au Rafael J . Wysocki <rafael.j.wysocki@intel.com> Christoph Hellwig <hch@lst.de> Bartosz Golaszewski <bgolaszewski@baylibre.com> @@ -41,8 +40,11 @@ Will Deacon <will@kernel.org> Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> intel-gfx@lists.freedesktop.org + maarten.lankhorst@linux.intel.com + jani.nikula@linux.intel.com Nathan Chancellor <nathan@kernel.org> Rob Herring <robh+dt@kernel.org> + rodrigo.vivi@intel.com Bjorn Helgaas <bhelgaas@google.com> Claire Chang <tientzu@chromium.org> Dan Williams <dan.j.williams@intel.com> @@ -54,6 +56,7 @@ Qian Cai <quic_qiancai@quicinc.com> lkml <linux-kernel@vger.kernel.org> list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org> + Daniel Vetter <daniel@ffwll.ch> xypron.glpk@gmx.de Tom Lendacky <thomas.lendacky@amd.com> linuxppc-dev@lists.ozlabs.org @@ -71,10 +74,6 @@ "Claire did implement something like your suggestion originally, but\n" "I don't really like it as it doesn't scale for adding multiple global\n" "pools, e.g. for the 64-bit addressable one for the various encrypted\n" - "secure guest schemes.\n" - "_______________________________________________\n" - "Intel-gfx mailing list\n" - "Intel-gfx@lists.freedesktop.org\n" - https://lists.freedesktop.org/mailman/listinfo/intel-gfx + secure guest schemes. -d6ce0daddcdc823487221817a8e484c0186ec01ea6d428bb190e6fd97b939f83 +a2118df3964c39b702ebb0c654855fca574596a9a62fdfb8298f47bef60349e7
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