From: Roy Sun <Roy.Sun@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Roy Sun <Roy.Sun@amd.com>
Subject: [PATCH] drm/amdgpu: Change the imprecise output
Date: Thu, 22 Jul 2021 15:13:45 +0800 [thread overview]
Message-ID: <20210722071345.752-1-Roy.Sun@amd.com> (raw)
The fail reason is that the vfgate is disabled
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 9f3d82dfb79c..f94ef15b3166 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -56,7 +56,7 @@
#define GFX10_NUM_GFX_RINGS_Sienna_Cichlid 1
#define GFX10_MEC_HPD_SIZE 2048
-#define RLCG_INTERFACE_NOT_ENABLED 0x4000000
+#define RLCG_VFGATE_DISABLED 0x4000000
#define RLCG_WRONG_OPERATION_TYPE 0x2000000
#define RLCG_NOT_IN_RANGE 0x1000000
@@ -1571,8 +1571,8 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev, u32 offset, u32 v, uint32
if (i >= retries) {
if (RLCG_ERROR_REPORT_ENABLED(adev)) {
- if (tmp & RLCG_INTERFACE_NOT_ENABLED)
- pr_err("The interface is not enabled, program reg:0x%05x failed!\n", offset);
+ if (tmp & RLCG_VFGATE_DISABLED)
+ pr_err("The vfgate is disabled, program reg:0x%05x failed!\n", offset);
else if (tmp & RLCG_WRONG_OPERATION_TYPE)
pr_err("Wrong operation type, program reg:0x%05x failed!\n", offset);
else if (tmp & RLCG_NOT_IN_RANGE)
--
2.32.0
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next reply other threads:[~2021-07-22 7:13 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-22 7:13 Roy Sun [this message]
2021-07-22 8:48 ` [PATCH] drm/amdgpu: Change the imprecise output Zhou, Peng Ju
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