[PATCH] drm/amdgpu: Change the imprecise output

[PATCH] drm/amdgpu: Change the imprecise output

[Roy Sun]

The fail reason is that the vfgate is disabled

Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 9f3d82dfb79c..f94ef15b3166 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -56,7 +56,7 @@
 #define GFX10_NUM_GFX_RINGS_Sienna_Cichlid	1
 #define GFX10_MEC_HPD_SIZE	2048
 
-#define RLCG_INTERFACE_NOT_ENABLED	0x4000000
+#define RLCG_VFGATE_DISABLED	0x4000000
 #define RLCG_WRONG_OPERATION_TYPE	0x2000000
 #define RLCG_NOT_IN_RANGE	0x1000000
 
@@ -1571,8 +1571,8 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev, u32 offset, u32 v, uint32
 
 		if (i >= retries) {
 			if (RLCG_ERROR_REPORT_ENABLED(adev)) {
-				if (tmp & RLCG_INTERFACE_NOT_ENABLED)
-					pr_err("The interface is not enabled, program reg:0x%05x failed!\n", offset);
+				if (tmp & RLCG_VFGATE_DISABLED)
+					pr_err("The vfgate is disabled, program reg:0x%05x failed!\n", offset);
 				else if (tmp & RLCG_WRONG_OPERATION_TYPE)
 					pr_err("Wrong operation type, program reg:0x%05x failed!\n", offset);
 				else if (tmp & RLCG_NOT_IN_RANGE)
-- 
2.32.0

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RE: [PATCH] drm/amdgpu: Change the imprecise output

[Zhou, Peng Ju]

[AMD Official Use Only]

Reviewed-by: Peng Ju Zhou <PengJu.Zhou@amd.com>

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Roy Sun
> Sent: Thursday, July 22, 2021 3:14 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Sun, Roy <Roy.Sun@amd.com>
> Subject: [PATCH] drm/amdgpu: Change the imprecise output
> 
> The fail reason is that the vfgate is disabled
> 
> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 9f3d82dfb79c..f94ef15b3166 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -56,7 +56,7 @@
>  #define GFX10_NUM_GFX_RINGS_Sienna_Cichlid	1
>  #define GFX10_MEC_HPD_SIZE	2048
> 
> -#define RLCG_INTERFACE_NOT_ENABLED	0x4000000
> +#define RLCG_VFGATE_DISABLED	0x4000000
>  #define RLCG_WRONG_OPERATION_TYPE	0x2000000
>  #define RLCG_NOT_IN_RANGE	0x1000000
> 
> @@ -1571,8 +1571,8 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device
> *adev, u32 offset, u32 v, uint32
> 
>  		if (i >= retries) {
>  			if (RLCG_ERROR_REPORT_ENABLED(adev)) {
> -				if (tmp & RLCG_INTERFACE_NOT_ENABLED)
> -					pr_err("The interface is not enabled,
> program reg:0x%05x failed!\n", offset);
> +				if (tmp & RLCG_VFGATE_DISABLED)
> +					pr_err("The vfgate is disabled,
> program reg:0x%05x failed!\n", offset);
>  				else if (tmp &
> RLCG_WRONG_OPERATION_TYPE)
>  					pr_err("Wrong operation type,
> program reg:0x%05x failed!\n", offset);
>  				else if (tmp & RLCG_NOT_IN_RANGE)
> --
> 2.32.0
> 
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