From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [Intel-gfx] [RFC PATCH 01/42] drm/i915/guc: GuC submission squashed into single patch
Date: Wed, 28 Jul 2021 20:57:15 +0800 [thread overview]
Message-ID: <202107282027.EKRSgp6P-lkp@intel.com> (raw)
In-Reply-To: <20210720205802.39610-2-matthew.brost@intel.com>
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Hi Matthew,
[FYI, it's a private test report for your RFC patch.]
[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next drm/drm-next v5.14-rc3 next-20210727]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Matthew-Brost/Parallel-submission-aka-multi-bb-execbuf/20210721-044431
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a004-20210721 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project c781eb153bfbd1b52b03efe34f56bbeccbb8aba6)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/b0216b025067b85590916d67e9ea1311f6f068c1
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Matthew-Brost/Parallel-submission-aka-multi-bb-execbuf/20210721-044431
git checkout b0216b025067b85590916d67e9ea1311f6f068c1
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/gt/intel_reset.c:1508:
>> drivers/gpu/drm/i915/gt/selftest_hangcheck.c:464:62: error: variable 'err' is uninitialized when used here [-Werror,-Wuninitialized]
pr_err("[%s] Create context failed: %d!\n", engine->name, err);
^~~
include/linux/printk.h:390:33: note: expanded from macro 'pr_err'
printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~~~
drivers/gpu/drm/i915/gt/selftest_hangcheck.c:452:10: note: initialize the variable 'err' to silence this warning
int err;
^
= 0
drivers/gpu/drm/i915/gt/selftest_hangcheck.c:579:62: error: variable 'err' is uninitialized when used here [-Werror,-Wuninitialized]
pr_err("[%s] Create context failed: %d!\n", engine->name, err);
^~~
include/linux/printk.h:390:33: note: expanded from macro 'pr_err'
printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~~~
drivers/gpu/drm/i915/gt/selftest_hangcheck.c:571:10: note: initialize the variable 'err' to silence this warning
int err;
^
= 0
2 errors generated.
vim +/err +464 drivers/gpu/drm/i915/gt/selftest_hangcheck.c
435
436 static int igt_reset_nop_engine(void *arg)
437 {
438 struct intel_gt *gt = arg;
439 struct i915_gpu_error *global = >->i915->gpu_error;
440 struct intel_engine_cs *engine;
441 enum intel_engine_id id;
442
443 /* Check that we can engine-reset during non-user portions */
444
445 if (!intel_has_reset_engine(gt))
446 return 0;
447
448 for_each_engine(engine, gt, id) {
449 unsigned int reset_count, reset_engine_count, count;
450 struct intel_context *ce;
451 IGT_TIMEOUT(end_time);
452 int err;
453
454 if (intel_engine_uses_guc(engine)) {
455 /* Engine level resets are triggered by GuC when a hang
456 * is detected. They can't be triggered by the KMD any
457 * more. Thus a nop batch cannot be used as a reset test
458 */
459 continue;
460 }
461
462 ce = intel_context_create(engine);
463 if (IS_ERR(ce)) {
> 464 pr_err("[%s] Create context failed: %d!\n", engine->name, err);
465 return PTR_ERR(ce);
466 }
467
468 reset_count = i915_reset_count(global);
469 reset_engine_count = i915_reset_engine_count(global, engine);
470 count = 0;
471
472 st_engine_heartbeat_disable(engine);
473 set_bit(I915_RESET_ENGINE + id, >->reset.flags);
474 do {
475 int i;
476
477 if (!wait_for_idle(engine)) {
478 pr_err("%s failed to idle before reset\n",
479 engine->name);
480 err = -EIO;
481 break;
482 }
483
484 for (i = 0; i < 16; i++) {
485 struct i915_request *rq;
486
487 rq = intel_context_create_request(ce);
488 if (IS_ERR(rq)) {
489 struct drm_printer p =
490 drm_info_printer(gt->i915->drm.dev);
491 intel_engine_dump(engine, &p,
492 "%s(%s): failed to submit request\n",
493 __func__,
494 engine->name);
495
496 GEM_TRACE("%s(%s): failed to submit request\n",
497 __func__,
498 engine->name);
499 GEM_TRACE_DUMP();
500
501 intel_gt_set_wedged(gt);
502
503 err = PTR_ERR(rq);
504 break;
505 }
506
507 i915_request_add(rq);
508 }
509 err = intel_engine_reset(engine, NULL);
510 if (err) {
511 pr_err("intel_engine_reset(%s) failed, err:%d\n",
512 engine->name, err);
513 break;
514 }
515
516 if (i915_reset_count(global) != reset_count) {
517 pr_err("Full GPU reset recorded! (engine reset expected)\n");
518 err = -EINVAL;
519 break;
520 }
521
522 if (i915_reset_engine_count(global, engine) !=
523 reset_engine_count + ++count) {
524 pr_err("%s engine reset not recorded!\n",
525 engine->name);
526 err = -EINVAL;
527 break;
528 }
529 } while (time_before(jiffies, end_time));
530 clear_bit(I915_RESET_ENGINE + id, >->reset.flags);
531 st_engine_heartbeat_enable(engine);
532
533 pr_info("%s(%s): %d resets\n", __func__, engine->name, count);
534
535 intel_context_put(ce);
536 if (igt_flush_test(gt->i915))
537 err = -EIO;
538 if (err)
539 return err;
540 }
541
542 return 0;
543 }
544
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
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next prev parent reply other threads:[~2021-07-28 12:57 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-20 20:57 [Intel-gfx] [RFC PATCH 00/42] Parallel submission aka multi-bb execbuf Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 01/42] drm/i915/guc: GuC submission squashed into single patch Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-28 12:57 ` kernel test robot [this message]
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 02/42] drm/i915/guc: Allow flexible number of context ids Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 03/42] drm/i915/guc: Connect the number of guc_ids to debugfs Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 04/42] drm/i915/guc: Don't return -EAGAIN to user when guc_ids exhausted Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 05/42] drm/i915/guc: Don't allow requests not ready to consume all guc_ids Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 06/42] drm/i915/guc: Introduce guc_submit_engine object Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 07/42] drm/i915/guc: Check return of __xa_store when registering a context Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 08/42] drm/i915/guc: Non-static lrc descriptor registration buffer Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 09/42] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 10/42] drm/i915: Add GT PM unpark worker Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 11/42] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 12/42] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 13/42] drm/i915/guc: Selftest for GuC flow control Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 14/42] drm/i915: Add logical engine mapping Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 15/42] drm/i915: Expose logical engine instance to user Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 16/42] drm/i915/guc: Introduce context parent-child relationship Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 17/42] drm/i915/guc: Implement GuC parent-child context pin / unpin functions Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 18/42] drm/i915/guc: Add multi-lrc context registration Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 19/42] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 20/42] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 21/42] drm/i915/guc: Add hang check to GuC submit engine Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 22/42] drm/i915/guc: Add guc_child_context_destroy Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 23/42] drm/i915/guc: Implement multi-lrc submission Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 24/42] drm/i915/guc: Insert submit fences between requests in parent-child relationship Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 25/42] drm/i915/guc: Implement multi-lrc reset Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 26/42] drm/i915/guc: Update debugfs for GuC multi-lrc Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 27/42] drm/i915: Connect UAPI to GuC multi-lrc interface Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 28/42] drm/i915/guc: Add basic GuC multi-lrc selftest Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 29/42] drm/i915/guc: Implement BB boundary preemption for multi-lrc Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 30/42] i915/drm: Move secure execbuf check to execbuf2 Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 31/42] drm/i915: Move input/exec fence handling to i915_gem_execbuffer2 Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 32/42] drm/i915: Move output " Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 33/42] drm/i915: Return output fence from i915_gem_do_execbuffer Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 34/42] drm/i915: Store batch index in struct i915_execbuffer Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 35/42] drm/i915: Allow callers of i915_gem_do_execbuffer to override the batch index Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 36/42] drm/i915: Teach execbuf there can be more than one batch in the objects list Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 37/42] drm/i915: Only track object dependencies on first request Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 38/42] drm/i915: Force parallel contexts to use copy engine for reloc Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:57 ` [Intel-gfx] [RFC PATCH 39/42] drm/i915: Multi-batch execbuffer2 Matthew Brost
2021-07-20 20:57 ` Matthew Brost
2021-07-20 20:58 ` [Intel-gfx] [RFC PATCH 40/42] drm/i915: Eliminate unnecessary VMA calls for multi-BB submission Matthew Brost
2021-07-20 20:58 ` Matthew Brost
2021-07-20 20:58 ` [Intel-gfx] [RFC PATCH 41/42] drm/i915: Enable multi-bb execbuf Matthew Brost
2021-07-20 20:58 ` Matthew Brost
2021-07-20 20:58 ` [Intel-gfx] [RFC PATCH 42/42] drm/i915/execlists: Parallel submission support for execlists Matthew Brost
2021-07-20 20:58 ` Matthew Brost
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