From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74979C4338F for ; Mon, 16 Aug 2021 07:00:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0B2D261A81 for ; Mon, 16 Aug 2021 07:00:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 0B2D261A81 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<20210809063645.2289988-1-xiaoning.wang@nxp.com> <20210809063645.2289988-7-xiaoning.wang@nxp.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210815_235956_255446_979FDFC3 X-CRM114-Status: GOOD ( 29.13 ) X-BeenThere: linux-i3c@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-i3c" Errors-To: linux-i3c-bounces+linux-i3c=archiver.kernel.org@lists.infradead.org SGkgQ2xhcmssCgpDbGFyayBXYW5nIDx4aWFvbmluZy53YW5nQG54cC5jb20+IHdyb3RlIG9uIE1v biwgIDkgQXVnIDIwMjEgMTQ6MzY6NDMKKzA4MDA6Cgo+IEFkZCBydW50aW1lIHBtIHN1cHBvcnQg dG8gZHluYW1pY2FsbHkgbWFuYWdlIHRoZSBjbG9jay4KPiAKPiBTaWduZWQtb2ZmLWJ5OiBDbGFy ayBXYW5nIDx4aWFvbmluZy53YW5nQG54cC5jb20+Cj4gUmV2aWV3ZWQtYnk6IEp1biBMaSA8anVu LmxpQG54cC5jb20+Cj4gLS0tCj4gVjQ6Cj4gIC0gZXJyb3IgcGF0aCBlbWl0X3N0b3Agb25seSB1 c2VkIGluIHN2Y19pM2NfbWFzdGVyX2RvX2RhYSgpIGZvciBvbmUgdGltZSwgc28KPiAgICByZW1v dmUgaXQuIE9yIGl0IG5lZWRzIGFub3RoZXIgZ290byBjb21tYW5kIGF0IHRoZSBlbmQgb2YgdGhl IGZ1bmN0aW9uIHRvCj4gICAgc2tpcCBpdCBhbmQgdG8gZ28gdG8gcnBtX291dC4KPiBWMzoKPiAg LSByZXN0b3JlIHRoZSBlcnJvciBwYXRoIG9mIHByb2JlIGZ1bmN0aW9uCj4gIC0gZW5hYmxlIHJ1 bnRpbWUgcG0ganVzdCBiZWZvcmUgaTNjIG1vZHVsZSByZXNldAo+IFYyOiBOZXcgcGF0Y2ggaW4g VjIuCj4gLS0tCj4gIGRyaXZlcnMvaTNjL21hc3Rlci9zdmMtaTNjLW1hc3Rlci5jIHwgMTU0ICsr KysrKysrKysrKysrKysrKysrKysrKy0tLS0KPiAgMSBmaWxlIGNoYW5nZWQsIDEzNSBpbnNlcnRp b25zKCspLCAxOSBkZWxldGlvbnMoLSkKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9pM2MvbWFz dGVyL3N2Yy1pM2MtbWFzdGVyLmMgYi9kcml2ZXJzL2kzYy9tYXN0ZXIvc3ZjLWkzYy1tYXN0ZXIu Ywo+IGluZGV4IDJhOTZiMjE3Y2M3OC4uNTkzOWUwOTM2Njk3IDEwMDY0NAo+IC0tLSBhL2RyaXZl cnMvaTNjL21hc3Rlci9zdmMtaTNjLW1hc3Rlci5jCj4gKysrIGIvZHJpdmVycy9pM2MvbWFzdGVy L3N2Yy1pM2MtbWFzdGVyLmMKPiBAQCAtMTcsNyArMTcsOSBAQAo+ICAjaW5jbHVkZSA8bGludXgv bGlzdC5oPgo+ICAjaW5jbHVkZSA8bGludXgvbW9kdWxlLmg+Cj4gICNpbmNsdWRlIDxsaW51eC9v Zi5oPgo+ICsjaW5jbHVkZSA8bGludXgvcGluY3RybC9jb25zdW1lci5oPgo+ICAjaW5jbHVkZSA8 bGludXgvcGxhdGZvcm1fZGV2aWNlLmg+Cj4gKyNpbmNsdWRlIDxsaW51eC9wbV9ydW50aW1lLmg+ Cj4gIAo+ICAvKiBNYXN0ZXIgTW9kZSBSZWdpc3RlcnMgKi8KPiAgI2RlZmluZSBTVkNfSTNDX01D T05GSUcgICAgICAweDAwMAo+IEBAIC0xMTksNiArMTIxLDcgQEAKPiAgI2RlZmluZSAgIFNWQ19N RFlOQUREUl9BRERSKHgpIEZJRUxEX1BSRVAoR0VOTUFTSyg3LCAxKSwgKHgpKQo+ICAKPiAgI2Rl ZmluZSBTVkNfSTNDX01BWF9ERVZTIDMyCj4gKyNkZWZpbmUgU1ZDX0kzQ19QTV9USU1FT1VUX01T IDEwMDAKPiAgCj4gIC8qIFRoaXMgcGFyYW1ldGVyIGRlcGVuZHMgb24gdGhlIGltcGxlbWVudGF0 aW9uIGFuZCBtYXkgYmUgdHVuZWQgKi8KPiAgI2RlZmluZSBTVkNfSTNDX0ZJRk9fU0laRSAxNgo+ IEBAIC00ODAsMTAgKzQ4MywyMCBAQCBzdGF0aWMgaW50IHN2Y19pM2NfbWFzdGVyX2J1c19pbml0 KHN0cnVjdCBpM2NfbWFzdGVyX2NvbnRyb2xsZXIgKm0pCj4gIAl1MzIgcHBiYXVkLCBwcGxvdywg b2RocHAsIG9kYmF1ZCwgb2RzdG9wLCBpMmNiYXVkLCByZWc7Cj4gIAlpbnQgcmV0Owo+ICAKPiAr CXJldCA9IHBtX3J1bnRpbWVfcmVzdW1lX2FuZF9nZXQobWFzdGVyLT5kZXYpOwo+ICsJaWYgKHJl dCA8IDApIHsKPiArCQlkZXZfZXJyKG1hc3Rlci0+ZGV2LAo+ICsJCQkiPCVzPiBjYW5ub3QgcmVz dW1lIGkzYyBidXMgbWFzdGVyLCBlcnI6ICVkXG4iLAo+ICsJCQlfX2Z1bmNfXywgcmV0KTsKPiAr CQlyZXR1cm4gcmV0Owo+ICsJfQo+ICsKPiAgCS8qIFRpbWluZ3MgZGVyaXZhdGlvbiAqLwo+ICAJ ZmNsa19yYXRlID0gY2xrX2dldF9yYXRlKG1hc3Rlci0+ZmNsayk7Cj4gLQlpZiAoIWZjbGtfcmF0 ZSkKPiAtCQlyZXR1cm4gLUVJTlZBTDsKPiArCWlmICghZmNsa19yYXRlKSB7Cj4gKwkJcmV0ID0g LUVJTlZBTDsKPiArCQlnb3RvIHJwbV9vdXQ7Cj4gKwl9Cj4gIAo+ICAJZmNsa19wZXJpb2RfbnMg PSBESVZfUk9VTkRfVVAoMTAwMDAwMDAwMCwgZmNsa19yYXRlKTsKPiAgCj4gQEAgLTUyNyw3ICs1 NDAsNyBAQCBzdGF0aWMgaW50IHN2Y19pM2NfbWFzdGVyX2J1c19pbml0KHN0cnVjdCBpM2NfbWFz dGVyX2NvbnRyb2xsZXIgKm0pCj4gIAkJb2RzdG9wID0gMTsKPiAgCQlicmVhazsKPiAgCWRlZmF1 bHQ6Cj4gLQkJcmV0dXJuIC1FSU5WQUw7Cj4gKwkJZ290byBycG1fb3V0Owo+ICAJfQo+ICAKPiAg CXJlZyA9IFNWQ19JM0NfTUNPTkZJR19NQVNURVJfRU4gfAo+IEBAIC01NDUsNyArNTU4LDcgQEAg c3RhdGljIGludCBzdmNfaTNjX21hc3Rlcl9idXNfaW5pdChzdHJ1Y3QgaTNjX21hc3Rlcl9jb250 cm9sbGVyICptKQo+ICAJLyogTWFzdGVyIGNvcmUncyByZWdpc3RyYXRpb24gKi8KPiAgCXJldCA9 IGkzY19tYXN0ZXJfZ2V0X2ZyZWVfYWRkcihtLCAwKTsKPiAgCWlmIChyZXQgPCAwKQo+IC0JCXJl dHVybiByZXQ7Cj4gKwkJZ290byBycG1fb3V0Owo+ICAKPiAgCWluZm8uZHluX2FkZHIgPSByZXQ7 Cj4gIAo+IEBAIC01NTQsMjEgKzU2NywzNSBAQCBzdGF0aWMgaW50IHN2Y19pM2NfbWFzdGVyX2J1 c19pbml0KHN0cnVjdCBpM2NfbWFzdGVyX2NvbnRyb2xsZXIgKm0pCj4gIAo+ICAJcmV0ID0gaTNj X21hc3Rlcl9zZXRfaW5mbygmbWFzdGVyLT5iYXNlLCAmaW5mbyk7Cj4gIAlpZiAocmV0KQo+IC0J CXJldHVybiByZXQ7Cj4gKwkJZ290byBycG1fb3V0Owo+ICAKPiAgCXN2Y19pM2NfbWFzdGVyX2Vu YWJsZV9pbnRlcnJ1cHRzKG1hc3RlciwgU1ZDX0kzQ19NSU5UX1NMVlNUQVJUKTsKPiAgCj4gLQly ZXR1cm4gMDsKPiArcnBtX291dDoKPiArCXBtX3J1bnRpbWVfbWFya19sYXN0X2J1c3kobWFzdGVy LT5kZXYpOwo+ICsJcG1fcnVudGltZV9wdXRfYXV0b3N1c3BlbmQobWFzdGVyLT5kZXYpOwo+ICsK PiArCXJldHVybiByZXQ7Cj4gIH0KPiAgCj4gIHN0YXRpYyB2b2lkIHN2Y19pM2NfbWFzdGVyX2J1 c19jbGVhbnVwKHN0cnVjdCBpM2NfbWFzdGVyX2NvbnRyb2xsZXIgKm0pCj4gIHsKPiAgCXN0cnVj dCBzdmNfaTNjX21hc3RlciAqbWFzdGVyID0gdG9fc3ZjX2kzY19tYXN0ZXIobSk7Cj4gKwlpbnQg cmV0Owo+ICsKPiArCXJldCA9IHBtX3J1bnRpbWVfcmVzdW1lX2FuZF9nZXQobWFzdGVyLT5kZXYp Owo+ICsJaWYgKHJldCA8IDApIHsKPiArCQlkZXZfZXJyKG1hc3Rlci0+ZGV2LCAiPCVzPiBDYW5u b3QgZ2V0IHJ1bnRpbWUgUE0uXG4iLCBfX2Z1bmNfXyk7Cj4gKwkJcmV0dXJuOwo+ICsJfQo+ICAK PiAgCXN2Y19pM2NfbWFzdGVyX2Rpc2FibGVfaW50ZXJydXB0cyhtYXN0ZXIpOwo+ICAKPiAgCS8q IERpc2FibGUgbWFzdGVyICovCj4gIAl3cml0ZWwoMCwgbWFzdGVyLT5yZWdzICsgU1ZDX0kzQ19N Q09ORklHKTsKPiArCj4gKwlwbV9ydW50aW1lX21hcmtfbGFzdF9idXN5KG1hc3Rlci0+ZGV2KTsK PiArCXBtX3J1bnRpbWVfcHV0X2F1dG9zdXNwZW5kKG1hc3Rlci0+ZGV2KTsKPiAgfQo+ICAKPiAg c3RhdGljIGludCBzdmNfaTNjX21hc3Rlcl9yZXNlcnZlX3Nsb3Qoc3RydWN0IHN2Y19pM2NfbWFz dGVyICptYXN0ZXIpCj4gQEAgLTg2NywzMSArODk0LDM2IEBAIHN0YXRpYyBpbnQgc3ZjX2kzY19t YXN0ZXJfZG9fZGFhKHN0cnVjdCBpM2NfbWFzdGVyX2NvbnRyb2xsZXIgKm0pCj4gIAl1bnNpZ25l ZCBpbnQgZGV2X25iOwo+ICAJaW50IHJldCwgaTsKPiAgCj4gKwlyZXQgPSBwbV9ydW50aW1lX3Jl c3VtZV9hbmRfZ2V0KG1hc3Rlci0+ZGV2KTsKPiArCWlmIChyZXQgPCAwKSB7Cj4gKwkJZGV2X2Vy cihtYXN0ZXItPmRldiwgIjwlcz4gQ2Fubm90IGdldCBydW50aW1lIFBNLlxuIiwgX19mdW5jX18p Owo+ICsJCXJldHVybiByZXQ7Cj4gKwl9Cj4gKwo+ICAJc3Bpbl9sb2NrX2lycXNhdmUoJm1hc3Rl ci0+eGZlcnF1ZXVlLmxvY2ssIGZsYWdzKTsKPiAgCXJldCA9IHN2Y19pM2NfbWFzdGVyX2RvX2Rh YV9sb2NrZWQobWFzdGVyLCBhZGRycywgJmRldl9uYik7Cj4gIAlzcGluX3VubG9ja19pcnFyZXN0 b3JlKCZtYXN0ZXItPnhmZXJxdWV1ZS5sb2NrLCBmbGFncyk7Cj4gLQlpZiAocmV0KQo+IC0JCWdv dG8gZW1pdF9zdG9wOwo+ICsJaWYgKHJldCkgewo+ICsJCXN2Y19pM2NfbWFzdGVyX2VtaXRfc3Rv cChtYXN0ZXIpOwo+ICsJCXN2Y19pM2NfbWFzdGVyX2NsZWFyX21lcnJ3YXJuKG1hc3Rlcik7Cj4g KwkJZ290byBycG1fb3V0Owo+ICsJfQo+ICAKPiAgCS8qIFJlZ2lzdGVyIGFsbCBkZXZpY2VzIHdo byBwYXJ0aWNpcGF0ZWQgdG8gdGhlIGNvcmUgKi8KPiAgCWZvciAoaSA9IDA7IGkgPCBkZXZfbmI7 IGkrKykgewo+ICAJCXJldCA9IGkzY19tYXN0ZXJfYWRkX2kzY19kZXZfbG9ja2VkKG0sIGFkZHJz W2ldKTsKPiAgCQlpZiAocmV0KQo+IC0JCQlyZXR1cm4gcmV0Owo+ICsJCQlnb3RvIHJwbV9vdXQ7 Cj4gIAl9Cj4gIAo+ICAJLyogQ29uZmlndXJlIElCSSBhdXRvLXJ1bGVzICovCj4gIAlyZXQgPSBz dmNfaTNjX3VwZGF0ZV9pYmlydWxlcyhtYXN0ZXIpOwo+IC0JaWYgKHJldCkgewo+ICsJaWYgKHJl dCkKPiAgCQlkZXZfZXJyKG1hc3Rlci0+ZGV2LCAiQ2Fubm90IGhhbmRsZSBzdWNoIGEgbGlzdCBv ZiBkZXZpY2VzIik7Cj4gLQkJcmV0dXJuIHJldDsKPiAtCX0KPiAgCj4gLQlyZXR1cm4gMDsKPiAt Cj4gLWVtaXRfc3RvcDoKPiAtCXN2Y19pM2NfbWFzdGVyX2VtaXRfc3RvcChtYXN0ZXIpOwo+IC0J c3ZjX2kzY19tYXN0ZXJfY2xlYXJfbWVycndhcm4obWFzdGVyKTsKPiArcnBtX291dDoKPiArCXBt X3J1bnRpbWVfbWFya19sYXN0X2J1c3kobWFzdGVyLT5kZXYpOwo+ICsJcG1fcnVudGltZV9wdXRf YXV0b3N1c3BlbmQobWFzdGVyLT5kZXYpOwo+ICAKPiAgCXJldHVybiByZXQ7Cj4gIH0KPiBAQCAt MTA1OCw2ICsxMDkwLDEyIEBAIHN0YXRpYyB2b2lkIHN2Y19pM2NfbWFzdGVyX3N0YXJ0X3hmZXJf bG9ja2VkKHN0cnVjdCBzdmNfaTNjX21hc3RlciAqbWFzdGVyKQo+ICAJaWYgKCF4ZmVyKQo+ICAJ CXJldHVybjsKPiAgCj4gKwlyZXQgPSBwbV9ydW50aW1lX3Jlc3VtZV9hbmRfZ2V0KG1hc3Rlci0+ ZGV2KTsKPiArCWlmIChyZXQgPCAwKSB7Cj4gKwkJZGV2X2VycihtYXN0ZXItPmRldiwgIjwlcz4g Q2Fubm90IGdldCBydW50aW1lIFBNLlxuIiwgX19mdW5jX18pOwo+ICsJCXJldHVybjsKPiArCX0K PiArCj4gIAlzdmNfaTNjX21hc3Rlcl9jbGVhcl9tZXJyd2FybihtYXN0ZXIpOwo+ICAJc3ZjX2kz Y19tYXN0ZXJfZmx1c2hfZmlmbyhtYXN0ZXIpOwo+ICAKPiBAQCAtMTA3Miw2ICsxMTEwLDkgQEAg c3RhdGljIHZvaWQgc3ZjX2kzY19tYXN0ZXJfc3RhcnRfeGZlcl9sb2NrZWQoc3RydWN0IHN2Y19p M2NfbWFzdGVyICptYXN0ZXIpCj4gIAkJCWJyZWFrOwo+ICAJfQo+ICAKPiArCXBtX3J1bnRpbWVf bWFya19sYXN0X2J1c3kobWFzdGVyLT5kZXYpOwo+ICsJcG1fcnVudGltZV9wdXRfYXV0b3N1c3Bl bmQobWFzdGVyLT5kZXYpOwo+ICsKPiAgCXhmZXItPnJldCA9IHJldDsKPiAgCWNvbXBsZXRlKCZ4 ZmVyLT5jb21wKTsKPiAgCj4gQEAgLTEzNDgsNiArMTM4OSwxNCBAQCBzdGF0aWMgdm9pZCBzdmNf aTNjX21hc3Rlcl9mcmVlX2liaShzdHJ1Y3QgaTNjX2Rldl9kZXNjICpkZXYpCj4gIHN0YXRpYyBp bnQgc3ZjX2kzY19tYXN0ZXJfZW5hYmxlX2liaShzdHJ1Y3QgaTNjX2Rldl9kZXNjICpkZXYpCj4g IHsKPiAgCXN0cnVjdCBpM2NfbWFzdGVyX2NvbnRyb2xsZXIgKm0gPSBpM2NfZGV2X2dldF9tYXN0 ZXIoZGV2KTsKPiArCXN0cnVjdCBzdmNfaTNjX21hc3RlciAqbWFzdGVyID0gdG9fc3ZjX2kzY19t YXN0ZXIobSk7Cj4gKwlpbnQgcmV0Owo+ICsKPiArCXJldCA9IHBtX3J1bnRpbWVfcmVzdW1lX2Fu ZF9nZXQobWFzdGVyLT5kZXYpOwo+ICsJaWYgKHJldCA8IDApIHsKPiArCQlkZXZfZXJyKG1hc3Rl ci0+ZGV2LCAiPCVzPiBDYW5ub3QgZ2V0IHJ1bnRpbWUgUE0uXG4iLCBfX2Z1bmNfXyk7Cj4gKwkJ cmV0dXJuIHJldDsKPiArCX0KPiAgCj4gIAlyZXR1cm4gaTNjX21hc3Rlcl9lbmVjX2xvY2tlZCht LCBkZXYtPmluZm8uZHluX2FkZHIsIEkzQ19DQ0NfRVZFTlRfU0lSKTsKPiAgfQo+IEBAIC0xMzU1 LDggKzE0MDQsMTUgQEAgc3RhdGljIGludCBzdmNfaTNjX21hc3Rlcl9lbmFibGVfaWJpKHN0cnVj dCBpM2NfZGV2X2Rlc2MgKmRldikKPiAgc3RhdGljIGludCBzdmNfaTNjX21hc3Rlcl9kaXNhYmxl X2liaShzdHJ1Y3QgaTNjX2Rldl9kZXNjICpkZXYpCj4gIHsKPiAgCXN0cnVjdCBpM2NfbWFzdGVy X2NvbnRyb2xsZXIgKm0gPSBpM2NfZGV2X2dldF9tYXN0ZXIoZGV2KTsKPiArCXN0cnVjdCBzdmNf aTNjX21hc3RlciAqbWFzdGVyID0gdG9fc3ZjX2kzY19tYXN0ZXIobSk7Cj4gKwlpbnQgcmV0Owo+ ICAKPiAtCXJldHVybiBpM2NfbWFzdGVyX2Rpc2VjX2xvY2tlZChtLCBkZXYtPmluZm8uZHluX2Fk ZHIsIEkzQ19DQ0NfRVZFTlRfU0lSKTsKPiArCXJldCA9IGkzY19tYXN0ZXJfZGlzZWNfbG9ja2Vk KG0sIGRldi0+aW5mby5keW5fYWRkciwgSTNDX0NDQ19FVkVOVF9TSVIpOwo+ICsKPiArCXBtX3J1 bnRpbWVfbWFya19sYXN0X2J1c3kobWFzdGVyLT5kZXYpOwo+ICsJcG1fcnVudGltZV9wdXRfYXV0 b3N1c3BlbmQobWFzdGVyLT5kZXYpOwo+ICsKPiArCXJldHVybiByZXQ7Cj4gIH0KPiAgCj4gIHN0 YXRpYyB2b2lkIHN2Y19pM2NfbWFzdGVyX3JlY3ljbGVfaWJpX3Nsb3Qoc3RydWN0IGkzY19kZXZf ZGVzYyAqZGV2LAo+IEBAIC0xNDU1LDE2ICsxNTExLDMxIEBAIHN0YXRpYyBpbnQgc3ZjX2kzY19t YXN0ZXJfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAgCj4gIAlwbGF0Zm9y bV9zZXRfZHJ2ZGF0YShwZGV2LCBtYXN0ZXIpOwo+ICAKPiArCXBtX3J1bnRpbWVfc2V0X2F1dG9z dXNwZW5kX2RlbGF5KCZwZGV2LT5kZXYsIFNWQ19JM0NfUE1fVElNRU9VVF9NUyk7Cj4gKwlwbV9y dW50aW1lX3VzZV9hdXRvc3VzcGVuZCgmcGRldi0+ZGV2KTsKPiArCXBtX3J1bnRpbWVfZ2V0X25v cmVzdW1lKCZwZGV2LT5kZXYpOwo+ICsJcG1fcnVudGltZV9zZXRfYWN0aXZlKCZwZGV2LT5kZXYp Owo+ICsJcG1fcnVudGltZV9lbmFibGUoJnBkZXYtPmRldik7Cj4gKwo+ICAJc3ZjX2kzY19tYXN0 ZXJfcmVzZXQobWFzdGVyKTsKPiAgCj4gIAkvKiBSZWdpc3RlciB0aGUgbWFzdGVyICovCj4gIAly ZXQgPSBpM2NfbWFzdGVyX3JlZ2lzdGVyKCZtYXN0ZXItPmJhc2UsICZwZGV2LT5kZXYsCj4gIAkJ CQkgICZzdmNfaTNjX21hc3Rlcl9vcHMsIGZhbHNlKTsKPiAgCWlmIChyZXQpCj4gLQkJZ290byBl cnJfZGlzYWJsZV9zY2xrOwo+ICsJCWdvdG8gcnBtX2Rpc2FibGU7Cj4gKwo+ICsJcG1fcnVudGlt ZV9tYXJrX2xhc3RfYnVzeSgmcGRldi0+ZGV2KTsKPiArCXBtX3J1bnRpbWVfcHV0X2F1dG9zdXNw ZW5kKCZwZGV2LT5kZXYpOwo+ICAKPiAgCXJldHVybiAwOwo+ICAKPiArcnBtX2Rpc2FibGU6Cj4g KwlwbV9ydW50aW1lX2RvbnRfdXNlX2F1dG9zdXNwZW5kKCZwZGV2LT5kZXYpOwo+ICsJcG1fcnVu dGltZV9wdXRfbm9pZGxlKCZwZGV2LT5kZXYpOwo+ICsJcG1fcnVudGltZV9zZXRfc3VzcGVuZGVk KCZwZGV2LT5kZXYpOwo+ICsJcG1fcnVudGltZV9kaXNhYmxlKCZwZGV2LT5kZXYpOwo+ICsKPiAg ZXJyX2Rpc2FibGVfc2NsazoKPiAgCWNsa19kaXNhYmxlX3VucHJlcGFyZShtYXN0ZXItPnNjbGsp Owo+ICAKPiBAQCAtMTQ4NiwxMyArMTU1Nyw1NyBAQCBzdGF0aWMgaW50IHN2Y19pM2NfbWFzdGVy X3JlbW92ZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQo+ICAJaWYgKHJldCkKPiAgCQly ZXR1cm4gcmV0Owo+ICAKPiArCXBtX3J1bnRpbWVfZG9udF91c2VfYXV0b3N1c3BlbmQoJnBkZXYt PmRldik7Cj4gKwlwbV9ydW50aW1lX2Rpc2FibGUoJnBkZXYtPmRldik7Cj4gKwo+ICsJcmV0dXJu IDA7Cj4gK30KPiArCj4gK3N0YXRpYyBpbnQgX19tYXliZV91bnVzZWQgc3ZjX2kzY19ydW50aW1l X3N1c3BlbmQoc3RydWN0IGRldmljZSAqZGV2KQo+ICt7Cj4gKwlzdHJ1Y3Qgc3ZjX2kzY19tYXN0 ZXIgKm1hc3RlciA9IGRldl9nZXRfZHJ2ZGF0YShkZXYpOwo+ICsKPiAgCWNsa19kaXNhYmxlX3Vu cHJlcGFyZShtYXN0ZXItPnBjbGspOwo+ICAJY2xrX2Rpc2FibGVfdW5wcmVwYXJlKG1hc3Rlci0+ ZmNsayk7Cj4gIAljbGtfZGlzYWJsZV91bnByZXBhcmUobWFzdGVyLT5zY2xrKTsKPiArCXBpbmN0 cmxfcG1fc2VsZWN0X3NsZWVwX3N0YXRlKGRldik7Cj4gIAo+ICAJcmV0dXJuIDA7Cj4gIH0KPiAg Cj4gK3N0YXRpYyBpbnQgX19tYXliZV91bnVzZWQgc3ZjX2kzY19ydW50aW1lX3Jlc3VtZShzdHJ1 Y3QgZGV2aWNlICpkZXYpCj4gK3sKPiArCXN0cnVjdCBzdmNfaTNjX21hc3RlciAqbWFzdGVyID0g ZGV2X2dldF9kcnZkYXRhKGRldik7Cj4gKwlpbnQgcmV0ID0gMDsKPiArCj4gKwlwaW5jdHJsX3Bt X3NlbGVjdF9kZWZhdWx0X3N0YXRlKGRldik7Cj4gKwlyZXQgPSBjbGtfcHJlcGFyZV9lbmFibGUo bWFzdGVyLT5wY2xrKTsKPiArCWlmIChyZXQpCj4gKwkJcmV0dXJuIHJldDsKPiArCj4gKwlyZXQg PSBjbGtfcHJlcGFyZV9lbmFibGUobWFzdGVyLT5mY2xrKTsKPiArCWlmIChyZXQpIHsKPiArCQlj bGtfZGlzYWJsZV91bnByZXBhcmUobWFzdGVyLT5wY2xrKTsKPiArCQlyZXR1cm4gcmV0Owo+ICsJ fQo+ICsKPiArCXJldCA9IGNsa19wcmVwYXJlX2VuYWJsZShtYXN0ZXItPnNjbGspOwo+ICsJaWYg KHJldCkgewo+ICsJCWNsa19kaXNhYmxlX3VucHJlcGFyZShtYXN0ZXItPnBjbGspOwo+ICsJCWNs a19kaXNhYmxlX3VucHJlcGFyZShtYXN0ZXItPmZjbGspOwo+ICsJCXJldHVybiByZXQ7Cj4gKwl9 Cj4gKwo+ICsJcmV0dXJuIHJldDsKPiArfQoKQ2FuIHlvdSBjcmVhdGUgc3ZjX2kzY19tYXN0ZXJf cHJlcGFyZV9jbGtzKCkgd2l0aCB0aGUgY3VycmVudCBjb250ZW50Cm9mIHRoZSBhYm92ZSBoZWxw ZXIsIHRoZW4sIHVzZSB0aGF0IGZyb20gX3J1bnRpbWVfcmVzdW1lKCkgYW5kIF9wcm9iZSgpCnRv IGF2b2lkIGNvcHlpbmcgdGhlc2UgbGluZXM/CgpXaXRoIHRoaXMgY2hhbmdlIHlvdSBjYW4gYWRk IG15IAoKUmV2aWV3ZWQtYnk6IE1pcXVlbCBSYXluYWwgPG1pcXVlbC5yYXluYWxAYm9vdGxpbi5j b20+Cgo+ICsKPiArc3RhdGljIGNvbnN0IHN0cnVjdCBkZXZfcG1fb3BzIHN2Y19pM2NfcG1fb3Bz ID0gewo+ICsJU0VUX05PSVJRX1NZU1RFTV9TTEVFUF9QTV9PUFMocG1fcnVudGltZV9mb3JjZV9z dXNwZW5kLAo+ICsJCQkJICAgICAgcG1fcnVudGltZV9mb3JjZV9yZXN1bWUpCj4gKwlTRVRfUlVO VElNRV9QTV9PUFMoc3ZjX2kzY19ydW50aW1lX3N1c3BlbmQsCj4gKwkJCSAgIHN2Y19pM2NfcnVu dGltZV9yZXN1bWUsIE5VTEwpCj4gK307Cj4gKwo+ICBzdGF0aWMgY29uc3Qgc3RydWN0IG9mX2Rl dmljZV9pZCBzdmNfaTNjX21hc3Rlcl9vZl9tYXRjaF90YmxbXSA9IHsKPiAgCXsgLmNvbXBhdGli bGUgPSAic2lsdmFjbyxpM2MtbWFzdGVyIiB9LAo+ICAJeyAvKiBzZW50aW5lbCAqLyB9LAo+IEBA IC0xNTA0LDYgKzE2MTksNyBAQCBzdGF0aWMgc3RydWN0IHBsYXRmb3JtX2RyaXZlciBzdmNfaTNj X21hc3RlciA9IHsKPiAgCS5kcml2ZXIgPSB7Cj4gIAkJLm5hbWUgPSAic2lsdmFjby1pM2MtbWFz dGVyIiwKPiAgCQkub2ZfbWF0Y2hfdGFibGUgPSBzdmNfaTNjX21hc3Rlcl9vZl9tYXRjaF90Ymws Cj4gKwkJLnBtID0gJnN2Y19pM2NfcG1fb3BzLAo+ICAJfSwKPiAgfTsKPiAgbW9kdWxlX3BsYXRm b3JtX2RyaXZlcihzdmNfaTNjX21hc3Rlcik7CgoKVGhhbmtzLApNaXF1w6hsCgotLSAKbGludXgt aTNjIG1haWxpbmcgbGlzdApsaW51eC1pM2NAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlz dHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWkzYwo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4FB4C4338F for ; Mon, 16 Aug 2021 06:59:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CED6361A86 for ; Mon, 16 Aug 2021 06:59:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233660AbhHPHAZ convert rfc822-to-8bit (ORCPT ); Mon, 16 Aug 2021 03:00:25 -0400 Received: from relay2-d.mail.gandi.net ([217.70.183.194]:38637 "EHLO relay2-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233349AbhHPHAY (ORCPT ); Mon, 16 Aug 2021 03:00:24 -0400 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay2-d.mail.gandi.net (Postfix) with ESMTPSA id 320F84000B; Mon, 16 Aug 2021 06:59:52 +0000 (UTC) Date: Mon, 16 Aug 2021 08:59:50 +0200 From: Miquel Raynal To: Clark Wang Cc: conor.culhane@silvaco.com, alexandre.belloni@bootlin.com, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com Subject: Re: [PATCH V4 6/8] i3c: master: svc: add runtime pm support Message-ID: <20210816085950.014401a7@xps13> In-Reply-To: <20210809063645.2289988-7-xiaoning.wang@nxp.com> References: <20210809063645.2289988-1-xiaoning.wang@nxp.com> <20210809063645.2289988-7-xiaoning.wang@nxp.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Clark, Clark Wang wrote on Mon, 9 Aug 2021 14:36:43 +0800: > Add runtime pm support to dynamically manage the clock. > > Signed-off-by: Clark Wang > Reviewed-by: Jun Li > --- > V4: > - error path emit_stop only used in svc_i3c_master_do_daa() for one time, so > remove it. Or it needs another goto command at the end of the function to > skip it and to go to rpm_out. > V3: > - restore the error path of probe function > - enable runtime pm just before i3c module reset > V2: New patch in V2. > --- > drivers/i3c/master/svc-i3c-master.c | 154 ++++++++++++++++++++++++---- > 1 file changed, 135 insertions(+), 19 deletions(-) > > diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c > index 2a96b217cc78..5939e0936697 100644 > --- a/drivers/i3c/master/svc-i3c-master.c > +++ b/drivers/i3c/master/svc-i3c-master.c > @@ -17,7 +17,9 @@ > #include > #include > #include > +#include > #include > +#include > > /* Master Mode Registers */ > #define SVC_I3C_MCONFIG 0x000 > @@ -119,6 +121,7 @@ > #define SVC_MDYNADDR_ADDR(x) FIELD_PREP(GENMASK(7, 1), (x)) > > #define SVC_I3C_MAX_DEVS 32 > +#define SVC_I3C_PM_TIMEOUT_MS 1000 > > /* This parameter depends on the implementation and may be tuned */ > #define SVC_I3C_FIFO_SIZE 16 > @@ -480,10 +483,20 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) > u32 ppbaud, pplow, odhpp, odbaud, odstop, i2cbaud, reg; > int ret; > > + ret = pm_runtime_resume_and_get(master->dev); > + if (ret < 0) { > + dev_err(master->dev, > + "<%s> cannot resume i3c bus master, err: %d\n", > + __func__, ret); > + return ret; > + } > + > /* Timings derivation */ > fclk_rate = clk_get_rate(master->fclk); > - if (!fclk_rate) > - return -EINVAL; > + if (!fclk_rate) { > + ret = -EINVAL; > + goto rpm_out; > + } > > fclk_period_ns = DIV_ROUND_UP(1000000000, fclk_rate); > > @@ -527,7 +540,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) > odstop = 1; > break; > default: > - return -EINVAL; > + goto rpm_out; > } > > reg = SVC_I3C_MCONFIG_MASTER_EN | > @@ -545,7 +558,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) > /* Master core's registration */ > ret = i3c_master_get_free_addr(m, 0); > if (ret < 0) > - return ret; > + goto rpm_out; > > info.dyn_addr = ret; > > @@ -554,21 +567,35 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) > > ret = i3c_master_set_info(&master->base, &info); > if (ret) > - return ret; > + goto rpm_out; > > svc_i3c_master_enable_interrupts(master, SVC_I3C_MINT_SLVSTART); > > - return 0; > +rpm_out: > + pm_runtime_mark_last_busy(master->dev); > + pm_runtime_put_autosuspend(master->dev); > + > + return ret; > } > > static void svc_i3c_master_bus_cleanup(struct i3c_master_controller *m) > { > struct svc_i3c_master *master = to_svc_i3c_master(m); > + int ret; > + > + ret = pm_runtime_resume_and_get(master->dev); > + if (ret < 0) { > + dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); > + return; > + } > > svc_i3c_master_disable_interrupts(master); > > /* Disable master */ > writel(0, master->regs + SVC_I3C_MCONFIG); > + > + pm_runtime_mark_last_busy(master->dev); > + pm_runtime_put_autosuspend(master->dev); > } > > static int svc_i3c_master_reserve_slot(struct svc_i3c_master *master) > @@ -867,31 +894,36 @@ static int svc_i3c_master_do_daa(struct i3c_master_controller *m) > unsigned int dev_nb; > int ret, i; > > + ret = pm_runtime_resume_and_get(master->dev); > + if (ret < 0) { > + dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); > + return ret; > + } > + > spin_lock_irqsave(&master->xferqueue.lock, flags); > ret = svc_i3c_master_do_daa_locked(master, addrs, &dev_nb); > spin_unlock_irqrestore(&master->xferqueue.lock, flags); > - if (ret) > - goto emit_stop; > + if (ret) { > + svc_i3c_master_emit_stop(master); > + svc_i3c_master_clear_merrwarn(master); > + goto rpm_out; > + } > > /* Register all devices who participated to the core */ > for (i = 0; i < dev_nb; i++) { > ret = i3c_master_add_i3c_dev_locked(m, addrs[i]); > if (ret) > - return ret; > + goto rpm_out; > } > > /* Configure IBI auto-rules */ > ret = svc_i3c_update_ibirules(master); > - if (ret) { > + if (ret) > dev_err(master->dev, "Cannot handle such a list of devices"); > - return ret; > - } > > - return 0; > - > -emit_stop: > - svc_i3c_master_emit_stop(master); > - svc_i3c_master_clear_merrwarn(master); > +rpm_out: > + pm_runtime_mark_last_busy(master->dev); > + pm_runtime_put_autosuspend(master->dev); > > return ret; > } > @@ -1058,6 +1090,12 @@ static void svc_i3c_master_start_xfer_locked(struct svc_i3c_master *master) > if (!xfer) > return; > > + ret = pm_runtime_resume_and_get(master->dev); > + if (ret < 0) { > + dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); > + return; > + } > + > svc_i3c_master_clear_merrwarn(master); > svc_i3c_master_flush_fifo(master); > > @@ -1072,6 +1110,9 @@ static void svc_i3c_master_start_xfer_locked(struct svc_i3c_master *master) > break; > } > > + pm_runtime_mark_last_busy(master->dev); > + pm_runtime_put_autosuspend(master->dev); > + > xfer->ret = ret; > complete(&xfer->comp); > > @@ -1348,6 +1389,14 @@ static void svc_i3c_master_free_ibi(struct i3c_dev_desc *dev) > static int svc_i3c_master_enable_ibi(struct i3c_dev_desc *dev) > { > struct i3c_master_controller *m = i3c_dev_get_master(dev); > + struct svc_i3c_master *master = to_svc_i3c_master(m); > + int ret; > + > + ret = pm_runtime_resume_and_get(master->dev); > + if (ret < 0) { > + dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); > + return ret; > + } > > return i3c_master_enec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR); > } > @@ -1355,8 +1404,15 @@ static int svc_i3c_master_enable_ibi(struct i3c_dev_desc *dev) > static int svc_i3c_master_disable_ibi(struct i3c_dev_desc *dev) > { > struct i3c_master_controller *m = i3c_dev_get_master(dev); > + struct svc_i3c_master *master = to_svc_i3c_master(m); > + int ret; > > - return i3c_master_disec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR); > + ret = i3c_master_disec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR); > + > + pm_runtime_mark_last_busy(master->dev); > + pm_runtime_put_autosuspend(master->dev); > + > + return ret; > } > > static void svc_i3c_master_recycle_ibi_slot(struct i3c_dev_desc *dev, > @@ -1455,16 +1511,31 @@ static int svc_i3c_master_probe(struct platform_device *pdev) > > platform_set_drvdata(pdev, master); > > + pm_runtime_set_autosuspend_delay(&pdev->dev, SVC_I3C_PM_TIMEOUT_MS); > + pm_runtime_use_autosuspend(&pdev->dev); > + pm_runtime_get_noresume(&pdev->dev); > + pm_runtime_set_active(&pdev->dev); > + pm_runtime_enable(&pdev->dev); > + > svc_i3c_master_reset(master); > > /* Register the master */ > ret = i3c_master_register(&master->base, &pdev->dev, > &svc_i3c_master_ops, false); > if (ret) > - goto err_disable_sclk; > + goto rpm_disable; > + > + pm_runtime_mark_last_busy(&pdev->dev); > + pm_runtime_put_autosuspend(&pdev->dev); > > return 0; > > +rpm_disable: > + pm_runtime_dont_use_autosuspend(&pdev->dev); > + pm_runtime_put_noidle(&pdev->dev); > + pm_runtime_set_suspended(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > + > err_disable_sclk: > clk_disable_unprepare(master->sclk); > > @@ -1486,13 +1557,57 @@ static int svc_i3c_master_remove(struct platform_device *pdev) > if (ret) > return ret; > > + pm_runtime_dont_use_autosuspend(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > + > + return 0; > +} > + > +static int __maybe_unused svc_i3c_runtime_suspend(struct device *dev) > +{ > + struct svc_i3c_master *master = dev_get_drvdata(dev); > + > clk_disable_unprepare(master->pclk); > clk_disable_unprepare(master->fclk); > clk_disable_unprepare(master->sclk); > + pinctrl_pm_select_sleep_state(dev); > > return 0; > } > > +static int __maybe_unused svc_i3c_runtime_resume(struct device *dev) > +{ > + struct svc_i3c_master *master = dev_get_drvdata(dev); > + int ret = 0; > + > + pinctrl_pm_select_default_state(dev); > + ret = clk_prepare_enable(master->pclk); > + if (ret) > + return ret; > + > + ret = clk_prepare_enable(master->fclk); > + if (ret) { > + clk_disable_unprepare(master->pclk); > + return ret; > + } > + > + ret = clk_prepare_enable(master->sclk); > + if (ret) { > + clk_disable_unprepare(master->pclk); > + clk_disable_unprepare(master->fclk); > + return ret; > + } > + > + return ret; > +} Can you create svc_i3c_master_prepare_clks() with the current content of the above helper, then, use that from _runtime_resume() and _probe() to avoid copying these lines? With this change you can add my Reviewed-by: Miquel Raynal > + > +static const struct dev_pm_ops svc_i3c_pm_ops = { > + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, > + pm_runtime_force_resume) > + SET_RUNTIME_PM_OPS(svc_i3c_runtime_suspend, > + svc_i3c_runtime_resume, NULL) > +}; > + > static const struct of_device_id svc_i3c_master_of_match_tbl[] = { > { .compatible = "silvaco,i3c-master" }, > { /* sentinel */ }, > @@ -1504,6 +1619,7 @@ static struct platform_driver svc_i3c_master = { > .driver = { > .name = "silvaco-i3c-master", > .of_match_table = svc_i3c_master_of_match_tbl, > + .pm = &svc_i3c_pm_ops, > }, > }; > module_platform_driver(svc_i3c_master); Thanks, Miquèl