From: Jason Gunthorpe <jgg@nvidia.com>
To: Tatyana Nikolova <tatyana.e.nikolova@intel.com>
Cc: dledford@redhat.com, leon@kernel.org, linux-rdma@vger.kernel.org
Subject: Re: [PATCH rdma-core] irdma: Restore full memory barrier for doorbell optimization
Date: Wed, 18 Aug 2021 13:49:31 -0300 [thread overview]
Message-ID: <20210818164931.GC5673@nvidia.com> (raw)
In-Reply-To: <20210813222549.739-1-tatyana.e.nikolova@intel.com>
On Fri, Aug 13, 2021 at 05:25:49PM -0500, Tatyana Nikolova wrote:
> >> 1. Software writing the valid bit in the WQE.
> >> 2. Software reading shadow memory (hw_tail) value.
>
> > You are missing an ordered atomic on this read it looks like
>
> Hi Jason,
>
> Why do you think we need atomic ops in this case? We aren't trying
> to protect from multiple threads but CPU re-ordering of a write and
> a read.
Which is what the atomics will do.
Barriers are only appropriate when you can't add atomic markers to the
actual data that needs ordering.
Jason
next prev parent reply other threads:[~2021-08-18 16:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-05 16:11 [PATCH rdma-core] irdma: Restore full memory barrier for doorbell optimization Tatyana Nikolova
2021-08-06 1:28 ` Jason Gunthorpe
2021-08-09 20:07 ` Nikolova, Tatyana E
2021-08-10 11:59 ` Jason Gunthorpe
2021-08-13 22:25 ` Tatyana Nikolova
2021-08-18 16:49 ` Jason Gunthorpe [this message]
2021-08-19 22:01 ` Nikolova, Tatyana E
2021-08-19 22:44 ` Jason Gunthorpe
2021-09-02 16:27 ` Nikolova, Tatyana E
2021-09-02 17:09 ` Jason Gunthorpe
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