From: Dave Airlie <airlied@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@linux.intel.com, Dave Airlie <airlied@redhat.com>
Subject: [Intel-gfx] [PATCH 16/21] drm/i915: constify the dpll clock vtable
Date: Wed, 8 Sep 2021 10:39:39 +1000 [thread overview]
Message-ID: <20210908003944.2972024-17-airlied@gmail.com> (raw)
In-Reply-To: <20210908003944.2972024-1-airlied@gmail.com>
From: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +--
drivers/gpu/drm/i915/display/intel_dpll.c | 49 ++++++++++++++++----
drivers/gpu/drm/i915/i915_drv.h | 2 +-
3 files changed, 45 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0ad577aceb9d..d8a576d1435e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6768,10 +6768,10 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
crtc_state->update_wm_post = true;
if (mode_changed && crtc_state->hw.enable &&
- dev_priv->dpll_funcs.crtc_compute_clock &&
+ dev_priv->dpll_funcs &&
!crtc_state->bigjoiner_slave &&
!drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) {
- ret = dev_priv->dpll_funcs.crtc_compute_clock(crtc_state);
+ ret = dev_priv->dpll_funcs->crtc_compute_clock(crtc_state);
if (ret)
return ret;
}
@@ -8807,7 +8807,7 @@ static void intel_modeset_clear_plls(struct intel_atomic_state *state)
struct intel_crtc *crtc;
int i;
- if (!dev_priv->dpll_funcs.crtc_compute_clock)
+ if (!dev_priv->dpll_funcs)
return;
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index 9326c7cbb05c..3df10b88e69f 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1363,25 +1363,58 @@ static int i8xx_crtc_compute_clock(struct intel_crtc_state *crtc_state)
return 0;
}
+static const struct drm_i915_dpll_funcs hsw_dpll_funcs = {
+ .crtc_compute_clock = hsw_crtc_compute_clock
+};
+
+static const struct drm_i915_dpll_funcs ilk_dpll_funcs = {
+ .crtc_compute_clock = ilk_crtc_compute_clock
+};
+
+static const struct drm_i915_dpll_funcs chv_dpll_funcs = {
+ .crtc_compute_clock = chv_crtc_compute_clock
+};
+
+static const struct drm_i915_dpll_funcs vlv_dpll_funcs = {
+ .crtc_compute_clock = vlv_crtc_compute_clock
+};
+
+static const struct drm_i915_dpll_funcs g4x_dpll_funcs = {
+ .crtc_compute_clock = g4x_crtc_compute_clock
+};
+
+static const struct drm_i915_dpll_funcs pnv_dpll_funcs = {
+ .crtc_compute_clock = pnv_crtc_compute_clock
+};
+
+static const struct drm_i915_dpll_funcs i9xx_dpll_funcs = {
+ .crtc_compute_clock = i9xx_crtc_compute_clock
+};
+
+static const struct drm_i915_dpll_funcs i8xx_dpll_funcs = {
+ .crtc_compute_clock = i8xx_crtc_compute_clock
+};
+
+
void
intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv)
{
if (DISPLAY_VER(dev_priv) >= 9 || HAS_DDI(dev_priv))
- dev_priv->dpll_funcs.crtc_compute_clock = hsw_crtc_compute_clock;
+ dev_priv->dpll_funcs = &hsw_dpll_funcs;
else if (HAS_PCH_SPLIT(dev_priv))
- dev_priv->dpll_funcs.crtc_compute_clock = ilk_crtc_compute_clock;
+ dev_priv->dpll_funcs = &ilk_dpll_funcs;
else if (IS_CHERRYVIEW(dev_priv))
- dev_priv->dpll_funcs.crtc_compute_clock = chv_crtc_compute_clock;
+ dev_priv->dpll_funcs = &chv_dpll_funcs;
else if (IS_VALLEYVIEW(dev_priv))
- dev_priv->dpll_funcs.crtc_compute_clock = vlv_crtc_compute_clock;
+ dev_priv->dpll_funcs = &vlv_dpll_funcs;
else if (IS_G4X(dev_priv))
- dev_priv->dpll_funcs.crtc_compute_clock = g4x_crtc_compute_clock;
+ dev_priv->dpll_funcs = &g4x_dpll_funcs;
else if (IS_PINEVIEW(dev_priv))
- dev_priv->dpll_funcs.crtc_compute_clock = pnv_crtc_compute_clock;
+ dev_priv->dpll_funcs = &pnv_dpll_funcs;
else if (DISPLAY_VER(dev_priv) != 2)
- dev_priv->dpll_funcs.crtc_compute_clock = i9xx_crtc_compute_clock;
+ dev_priv->dpll_funcs = &i9xx_dpll_funcs;
else
- dev_priv->dpll_funcs.crtc_compute_clock = i8xx_crtc_compute_clock;
+ dev_priv->dpll_funcs = &i8xx_dpll_funcs;
}
static bool i9xx_has_pps(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8d14318c5708..a9563730aad5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1009,7 +1009,7 @@ struct drm_i915_private {
const struct drm_i915_fdi_link_train_funcs *fdi_funcs;
/* display pll funcs */
- struct drm_i915_dpll_funcs dpll_funcs;
+ const struct drm_i915_dpll_funcs *dpll_funcs;
/* Display functions */
struct drm_i915_display_funcs display;
--
2.31.1
next prev parent reply other threads:[~2021-09-08 0:40 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-08 0:39 [Intel-gfx] [PATCH 00/21] i915/display: split and constify vtable Dave Airlie
2021-09-08 0:39 ` [Intel-gfx] [PATCH 01/21] drm/i915/pm: drop get_fifo_size vfunc Dave Airlie
2021-09-08 11:30 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 02/21] drm/i915: make update_wm take a dev_priv Dave Airlie
2021-09-08 1:17 ` David Airlie
2021-09-08 11:31 ` Jani Nikula
2021-09-08 11:32 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 03/21] drm/i915/wm: move the update watermark wrapper to display side Dave Airlie
2021-09-08 9:33 ` Jani Nikula
2021-09-08 20:40 ` Dave Airlie
2021-09-09 14:26 ` Ville Syrjälä
2021-09-08 0:39 ` [Intel-gfx] [PATCH 04/21] drm/i915: split clock gating init from display vtable Dave Airlie
2021-09-08 11:34 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 05/21] drm/i915: split watermark vfuncs " Dave Airlie
2021-09-08 9:40 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 06/21] drm/i915: split color functions " Dave Airlie
2021-09-08 9:46 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 07/21] drm/i915: split audio " Dave Airlie
2021-09-08 9:48 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 08/21] drm/i915: split cdclk " Dave Airlie
2021-09-08 9:52 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 09/21] drm/i915: split irq hotplug function " Dave Airlie
2021-09-08 10:00 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 10/21] drm/i915: split fdi link training " Dave Airlie
2021-09-08 10:02 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 11/21] drm/i915: split the dpll clock compute out " Dave Airlie
2021-09-08 10:09 ` Jani Nikula
2021-09-09 0:34 ` Dave Airlie
2021-09-08 0:39 ` [Intel-gfx] [PATCH 12/21] drm/i915: constify fdi link training vtable Dave Airlie
2021-09-08 10:10 ` Jani Nikula
2021-09-08 12:03 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 13/21] drm/i915: constify irq function vtable Dave Airlie
2021-09-08 10:12 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 14/21] drm/i915: constify color " Dave Airlie
2021-09-08 10:30 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 15/21] drm/i915: constify the audio " Dave Airlie
2021-09-08 10:37 ` Jani Nikula
2021-09-08 0:39 ` Dave Airlie [this message]
2021-09-08 10:38 ` [Intel-gfx] [PATCH 16/21] drm/i915: constify the dpll clock vtable Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 17/21] drm/i915: constify the cdclk vtable Dave Airlie
2021-09-08 11:56 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 18/21] drm/i915: drop unused function ptr and comments Dave Airlie
2021-09-08 11:36 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 19/21] drm/i915: constify display function vtable Dave Airlie
2021-09-08 11:58 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 20/21] drm/i915: constify clock gating init vtable Dave Airlie
2021-09-08 12:00 ` Jani Nikula
2021-09-08 12:00 ` Jani Nikula
2021-09-08 0:39 ` [Intel-gfx] [PATCH 21/21] drm/i915: constify display wm vtable Dave Airlie
2021-09-08 12:13 ` Jani Nikula
2021-09-08 1:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915/display: split and constify vtable Patchwork
2021-09-08 1:24 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-09-08 12:04 ` Jani Nikula
2021-09-08 1:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-08 7:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-08 12:19 ` [Intel-gfx] [PATCH 00/21] " Jani Nikula
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