From: Bjorn Helgaas <helgaas@kernel.org>
To: Hemant Kumar <hemantk@codeaurora.org>
Cc: linux-pci@vger.kernel.org, manivannan.sadhasivam@linaro.org
Subject: Re: Revert "PCI/ASPM: Save/restore L1SS Capability for suspend/resume"
Date: Mon, 20 Sep 2021 17:26:29 -0500 [thread overview]
Message-ID: <20210920222629.GA45557@bhelgaas> (raw)
In-Reply-To: <06838361-0d2c-4a18-da04-6fb586ecd730@codeaurora.org>
On Mon, Sep 20, 2021 at 03:11:30PM -0700, Hemant Kumar wrote:
> Hi Bjorn,
>
> Is there any plan to revisit the fix to allow L1SS CTRL1 and CTRL2 save and
> restore to work with suspend and resume.
>
> Referring to the lkml discussion https://lore.kernel.org/linux-pci/20201228040513.GA611645@bjorn-Precision-5520/
>
> A patch was shared, described as :-
> "4257f7e008ea restores PCI_L1SS_CTL1, then PCI_L1SS_CTL2. I think it
> should do those in the reverse order, since the Enable bits are in
> PCI_L1SS_CTL1. It also restores L1SS state (potentially enabling
> L1.x) before we restore the PCIe Capability (potentially enabling ASPM
> as a whole). Those probably should also be in the other order."
>
> We are planning to enable aspm driver, but without L1SS control register
> save and restore, it gets disabled after resume.
I don't remember the state of that, but if somebody posts a patch to
do the save/restore, and it fixes the problems we saw the first time,
I'm open to merging it.
Bjorn
prev parent reply other threads:[~2021-09-20 22:28 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-20 22:11 Revert "PCI/ASPM: Save/restore L1SS Capability for suspend/resume" Hemant Kumar
2021-09-20 22:26 ` Bjorn Helgaas [this message]
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