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From: Saeed Mahameed <saeed@kernel.org>
To: "David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>
Cc: netdev@vger.kernel.org, Shay Drory <shayd@nvidia.com>,
	Parav Pandit <parav@nvidia.com>,
	Saeed Mahameed <saeedm@nvidia.com>
Subject: [net 07/10] net/mlx5: Fix length of irq_index in chars
Date: Thu, 30 Sep 2021 16:14:58 -0700	[thread overview]
Message-ID: <20210930231501.39062-8-saeed@kernel.org> (raw)
In-Reply-To: <20210930231501.39062-1-saeed@kernel.org>

From: Shay Drory <shayd@nvidia.com>

The maximum irq_index can be 2047, This means irq_name should have 4
characters reserve for the irq_index. Hence, increase it to 4.

Fixes: 3af26495a247 ("net/mlx5: Enlarge interrupt field in CREATE_EQ")
Signed-off-by: Shay Drory <shayd@nvidia.com>
Reviewed-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
 drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
index c79a10b3454d..df54f62a38ac 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
@@ -13,8 +13,8 @@
 #endif
 
 #define MLX5_MAX_IRQ_NAME (32)
-/* max irq_index is 255. three chars */
-#define MLX5_MAX_IRQ_IDX_CHARS (3)
+/* max irq_index is 2047, so four chars */
+#define MLX5_MAX_IRQ_IDX_CHARS (4)
 
 #define MLX5_SFS_PER_CTRL_IRQ 64
 #define MLX5_IRQ_CTRL_SF_MAX 8
-- 
2.31.1


  parent reply	other threads:[~2021-09-30 23:15 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-30 23:14 [pull request][net 00/10] mlx5 fixes 2021-09-30 Saeed Mahameed
2021-09-30 23:14 ` [net 01/10] net/mlx5e: IPSEC RX, enable checksum complete Saeed Mahameed
2021-10-01 13:10   ` patchwork-bot+netdevbpf
2021-10-01 18:27     ` Saeed Mahameed
2021-10-02 11:21       ` David Miller
2021-09-30 23:14 ` [net 02/10] net/mlx5e: Keep the value for maximum number of channels in-sync Saeed Mahameed
2021-09-30 23:14 ` [net 03/10] net/mlx5e: Improve MQPRIO resiliency Saeed Mahameed
2021-09-30 23:14 ` [net 04/10] net/mlx5: E-Switch, Fix double allocation of acl flow counter Saeed Mahameed
2021-09-30 23:14 ` [net 05/10] net/mlx5: Force round second at 1PPS out start time Saeed Mahameed
2021-09-30 23:14 ` [net 06/10] net/mlx5: Avoid generating event after PPS out in Real time mode Saeed Mahameed
2021-09-30 23:14 ` Saeed Mahameed [this message]
2021-09-30 23:14 ` [net 08/10] net/mlx5: Fix setting number of EQs of SFs Saeed Mahameed
2021-09-30 23:15 ` [net 09/10] net/mlx5e: Fix the presented RQ index in PTP stats Saeed Mahameed
2021-09-30 23:15 ` [net 10/10] net/mlx5e: Mutually exclude setting of TX-port-TS and MQPRIO in channel mode Saeed Mahameed

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