From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-tegra@vger.kernel.org
Subject: [PATCH v3 0/4] tegra20-emc: Identify memory chip by LPDDR configuration
Date: Sun, 3 Oct 2021 04:32:31 +0300 [thread overview]
Message-ID: <20211003013235.2357-1-digetx@gmail.com> (raw)
Support memory chip identification by LPDDR2 configuration, which is
needed by ASUS Transformer TF101 tablet device that doesn't store RAMCODE
in Tegra's NVMEM.
Changelog:
v3: - Corrected sub-node name in tegra20-emc.yaml.
v2: - Added separate binding for standard LPDDR2 properties, like it
was suggested by Krzysztof Kozlowski.
- Switched Tegra binding to use new lpddr2-configuration sub-node
that contains the standard properties.
- Extended commit message of the "emc: Document new LPDDR2 sub-node"
patch, telling how the properties are supposed to be used, which
was requested by Krzysztof Kozlowski.
- Added new common helpers for parsing LPDDR2 properties and made
tegra20-emc driver to use these helpers.
Dmitry Osipenko (4):
dt-bindings: memory: Add LPDDR2 binding
dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
memory: Add LPDDR2 configuration helpers
memory: tegra20-emc: Support matching timings by LPDDR2 configuration
.../memory-controllers/jedec,lpddr2.yaml | 80 ++++++++
.../nvidia,tegra20-emc.yaml | 17 +-
drivers/memory/jedec_ddr.h | 21 ++
drivers/memory/jedec_ddr_data.c | 42 ++++
drivers/memory/of_memory.c | 34 ++++
drivers/memory/of_memory.h | 9 +
drivers/memory/tegra/Kconfig | 1 +
drivers/memory/tegra/tegra20-emc.c | 191 ++++++++++++++++--
include/dt-bindings/memory/lpddr2.h | 25 +++
9 files changed, 404 insertions(+), 16 deletions(-)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/jedec,lpddr2.yaml
create mode 100644 include/dt-bindings/memory/lpddr2.h
--
2.32.0
next reply other threads:[~2021-10-03 1:32 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-03 1:32 Dmitry Osipenko [this message]
2021-10-03 1:32 ` [PATCH v3 1/4] dt-bindings: memory: Add LPDDR2 binding Dmitry Osipenko
2021-10-04 7:42 ` Krzysztof Kozlowski
2021-10-04 16:53 ` Dmitry Osipenko
2021-10-03 1:32 ` [PATCH v3 2/4] dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node Dmitry Osipenko
2021-10-04 8:37 ` Krzysztof Kozlowski
2021-10-04 16:56 ` Dmitry Osipenko
2021-10-03 1:32 ` [PATCH v3 3/4] memory: Add LPDDR2 configuration helpers Dmitry Osipenko
2021-10-04 8:53 ` Krzysztof Kozlowski
2021-10-03 1:32 ` [PATCH v3 4/4] memory: tegra20-emc: Support matching timings by LPDDR2 configuration Dmitry Osipenko
2021-10-04 9:09 ` Krzysztof Kozlowski
2021-10-04 17:05 ` Dmitry Osipenko
2021-10-05 15:51 ` Dmitry Osipenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211003013235.2357-1-digetx@gmail.com \
--to=digetx@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.