From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9067C433EF for ; Wed, 6 Oct 2021 16:43:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9D73F61131 for ; Wed, 6 Oct 2021 16:43:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233666AbhJFQpa (ORCPT ); Wed, 6 Oct 2021 12:45:30 -0400 Received: from mail-oi1-f175.google.com ([209.85.167.175]:42793 "EHLO mail-oi1-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231484AbhJFQp2 (ORCPT ); Wed, 6 Oct 2021 12:45:28 -0400 Received: by mail-oi1-f175.google.com with SMTP id x187so2464276oix.9; Wed, 06 Oct 2021 09:43:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jBzMvIMgnR7M/3yhI7B+vslrQk5E3C0Pdi0d+USOXmM=; b=lKAeLC9r17NMcHj0W2tJAF27RAB1XfMR5afeQawc9v55LcLokP8Q3ou8GzO7qSBm0y cM4kwUZOwBsCnieLBo0vkzBSQYa2saturs8bXxE2benYdciWglT7e2IG0nwB2PHUyVU/ YnIIpJYDQbFIDOQivrp+skZmgZnpVY4CTW8pvYKNLy25LuKJHidKSgNEPx7goAn4OGLo 1tq48eaytUxxezZd2xCzMahOly8TEYixkecUZAORcIrv1PGVX1osBBA5psSxReGyFJt2 YqLI+8nc4zfyDYt1XEykLqsFIYICT6Szq9iph7gpp/3z1dEP48qEp0ZsCrrEvDLFGaiD H78w== X-Gm-Message-State: AOAM532najdQMh0/57fxxP1ii9hOgyyftOHITSqh8tILxG1UFe+ejvJ/ FDu4pNeAg80YxkqOX+vjTg== X-Google-Smtp-Source: ABdhPJx7CXhXT5M1W0CAhtBp2h8eMcQ5I0cRndKVwy8olo5SejcUQh3JemHdw8Jrz5VsbxC5vFcqCA== X-Received: by 2002:a05:6808:2221:: with SMTP id bd33mr8117373oib.64.1633538615382; Wed, 06 Oct 2021 09:43:35 -0700 (PDT) Received: from xps15.herring.priv (66-90-148-213.dyn.grandenetworks.net. [66.90.148.213]) by smtp.googlemail.com with ESMTPSA id s29sm4236628otg.60.2021.10.06.09.43.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 09:43:34 -0700 (PDT) From: Rob Herring To: Russell King , James Morse , Catalin Marinas , Will Deacon , Guo Ren , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Michael Ellerman , Paul Walmsley , Palmer Dabbelt , Albert Ou , Yoshinori Sato , Rich Felker , x86@kernel.org, Greg Kroah-Hartman Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Benjamin Herrenschmidt , Paul Mackerras , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Rafael J. Wysocki" , Frank Rowand , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Date: Wed, 6 Oct 2021 11:43:20 -0500 Message-Id: <20211006164332.1981454-1-robh@kernel.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-csky@vger.kernel.org The first 10 patches add a new function, of_get_cpu_hwid(), which parses CPU DT node 'reg' property, and then use it to replace all the open coded versions of parsing CPU node 'reg' properties. The last 2 patches add support for populating the cacheinfo 'id' on DT platforms. The minimum associated CPU hwid is used for the id. The id is optional, but necessary for resctrl which is being adapted for Arm MPAM. Tested on arm64. Compile tested on arm, x86 and powerpc. Rob Rob Herring (12): of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes ARM: Use of_get_cpu_hwid() ARM: broadcom: Use of_get_cpu_hwid() arm64: Use of_get_cpu_hwid() csky: Use of_get_cpu_hwid() openrisc: Use of_get_cpu_hwid() powerpc: Use of_get_cpu_hwid() riscv: Use of_get_cpu_hwid() sh: Use of_get_cpu_hwid() x86: dt: Use of_get_cpu_hwid() cacheinfo: Allow for >32-bit cache 'id' cacheinfo: Set cache 'id' based on DT data arch/arm/kernel/devtree.c | 22 ++------------------- arch/arm/mach-bcm/bcm63xx_pmb.c | 6 +++--- arch/arm64/kernel/smp.c | 31 ++---------------------------- arch/csky/kernel/smp.c | 6 ++---- arch/openrisc/kernel/smp.c | 6 +----- arch/powerpc/kernel/smp.c | 7 +------ arch/riscv/kernel/cpu.c | 3 ++- arch/sh/boards/of-generic.c | 5 ++--- arch/x86/kernel/devicetree.c | 5 ++--- drivers/base/cacheinfo.c | 34 ++++++++++++++++++++++++++++++++- drivers/of/base.c | 22 +++++++++++++++++++++ include/linux/cacheinfo.h | 2 +- include/linux/of.h | 1 + 13 files changed, 74 insertions(+), 76 deletions(-) -- 2.30.2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 802B6C433F5 for ; Wed, 6 Oct 2021 16:44:13 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 25EA561130 for ; Wed, 6 Oct 2021 16:44:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 25EA561130 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=SFAohPFLq7ACxXPTBPjaH2wLQL/NUjc7wloM+qt79C4=; b=DEBF1ex1om6opq i9+EYDGyVPqHrlmmJdG4+fYS5VZreE4dLa6DtY0CDhJedlMcRTLxRroAkcqot6bxET9pIOpR7xxYA 1Fu8oes7DdcdBKh2jxeK5FIQ1d8mZZod6OiLVSM+KcT9JjW4VLzGumK75AyO/X6YS6hcbDBcn8F8u PjvMqQzwim09rsxQ2sSZjg4SAn+IgO1cDAJTq6mtqKq8z9aSKLLA9RaW3hjThOx2ddik6u1TjMDtP x9auySul6cXJSSehr6jqjJCS7g1W1vhM9R1o2ObkjYCP1VrMDAaQDjEGQ+22tDXXx6lgiBwKhfzen iQ4TJ7IeTBkCerM8iabA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mYA1H-00F29J-1j; Wed, 06 Oct 2021 16:43:51 +0000 Received: from mail-oi1-f175.google.com ([209.85.167.175]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mYA12-00F22K-RB; Wed, 06 Oct 2021 16:43:38 +0000 Received: by mail-oi1-f175.google.com with SMTP id w206so4861979oiw.4; Wed, 06 Oct 2021 09:43:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jBzMvIMgnR7M/3yhI7B+vslrQk5E3C0Pdi0d+USOXmM=; b=xJMk1bk/aCcVIpqjZaE2PiEvy7B0NLjCuoNeZ3SI/bsr1pQy00NlymlC3l/6/zLzlY neVnj3Ea5yYzyy+lpkWDCZHUO/AqDSsbby9in1wk18RncvNGubG+fpgHVZTGIia+o0cu JjtGeXxxS7egnOtrUmMva4kIKeu1qYkBZMYOi0h/a7ltNnLi6AopOCBwobHRDGsbtgw0 taLbOX2FF2Lkri9dSdYo8rI0QQW31y9Dl8XQKNzX3nEqiqy+k+AGR7v0RWhgM8OGUce6 fbMmPt/E0b4cm7kahr4q+OlHWSG/Pl7V0m+NKXvqakgfuGwm8Vge4yNWfT6zjQcXb1P6 o6mA== X-Gm-Message-State: AOAM530wbUpUwDH1+UsY5Dn1YGux1wCGyGj1eZNJfNg7U06z0yCSt4Ep LTQrQMPobqVizJ5vtwvhfA== X-Google-Smtp-Source: ABdhPJx7CXhXT5M1W0CAhtBp2h8eMcQ5I0cRndKVwy8olo5SejcUQh3JemHdw8Jrz5VsbxC5vFcqCA== X-Received: by 2002:a05:6808:2221:: with SMTP id bd33mr8117373oib.64.1633538615382; Wed, 06 Oct 2021 09:43:35 -0700 (PDT) Received: from xps15.herring.priv (66-90-148-213.dyn.grandenetworks.net. [66.90.148.213]) by smtp.googlemail.com with ESMTPSA id s29sm4236628otg.60.2021.10.06.09.43.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 09:43:34 -0700 (PDT) From: Rob Herring To: Russell King , James Morse , Catalin Marinas , Will Deacon , Guo Ren , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Michael Ellerman , Paul Walmsley , Palmer Dabbelt , Albert Ou , Yoshinori Sato , Rich Felker , x86@kernel.org, Greg Kroah-Hartman Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Benjamin Herrenschmidt , Paul Mackerras , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Rafael J. Wysocki" , Frank Rowand , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Date: Wed, 6 Oct 2021 11:43:20 -0500 Message-Id: <20211006164332.1981454-1-robh@kernel.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211006_094336_904544_8D64FB76 X-CRM114-Status: GOOD ( 12.64 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The first 10 patches add a new function, of_get_cpu_hwid(), which parses CPU DT node 'reg' property, and then use it to replace all the open coded versions of parsing CPU node 'reg' properties. The last 2 patches add support for populating the cacheinfo 'id' on DT platforms. The minimum associated CPU hwid is used for the id. The id is optional, but necessary for resctrl which is being adapted for Arm MPAM. Tested on arm64. Compile tested on arm, x86 and powerpc. Rob Rob Herring (12): of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes ARM: Use of_get_cpu_hwid() ARM: broadcom: Use of_get_cpu_hwid() arm64: Use of_get_cpu_hwid() csky: Use of_get_cpu_hwid() openrisc: Use of_get_cpu_hwid() powerpc: Use of_get_cpu_hwid() riscv: Use of_get_cpu_hwid() sh: Use of_get_cpu_hwid() x86: dt: Use of_get_cpu_hwid() cacheinfo: Allow for >32-bit cache 'id' cacheinfo: Set cache 'id' based on DT data arch/arm/kernel/devtree.c | 22 ++------------------- arch/arm/mach-bcm/bcm63xx_pmb.c | 6 +++--- arch/arm64/kernel/smp.c | 31 ++---------------------------- arch/csky/kernel/smp.c | 6 ++---- arch/openrisc/kernel/smp.c | 6 +----- arch/powerpc/kernel/smp.c | 7 +------ arch/riscv/kernel/cpu.c | 3 ++- arch/sh/boards/of-generic.c | 5 ++--- arch/x86/kernel/devicetree.c | 5 ++--- drivers/base/cacheinfo.c | 34 ++++++++++++++++++++++++++++++++- drivers/of/base.c | 22 +++++++++++++++++++++ include/linux/cacheinfo.h | 2 +- include/linux/of.h | 1 + 13 files changed, 74 insertions(+), 76 deletions(-) -- 2.30.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Date: Wed, 6 Oct 2021 11:43:20 -0500 Subject: [OpenRISC] [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Message-ID: <20211006164332.1981454-1-robh@kernel.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: openrisc@lists.librecores.org The first 10 patches add a new function, of_get_cpu_hwid(), which parses CPU DT node 'reg' property, and then use it to replace all the open coded versions of parsing CPU node 'reg' properties. The last 2 patches add support for populating the cacheinfo 'id' on DT platforms. The minimum associated CPU hwid is used for the id. The id is optional, but necessary for resctrl which is being adapted for Arm MPAM. Tested on arm64. Compile tested on arm, x86 and powerpc. Rob Rob Herring (12): of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes ARM: Use of_get_cpu_hwid() ARM: broadcom: Use of_get_cpu_hwid() arm64: Use of_get_cpu_hwid() csky: Use of_get_cpu_hwid() openrisc: Use of_get_cpu_hwid() powerpc: Use of_get_cpu_hwid() riscv: Use of_get_cpu_hwid() sh: Use of_get_cpu_hwid() x86: dt: Use of_get_cpu_hwid() cacheinfo: Allow for >32-bit cache 'id' cacheinfo: Set cache 'id' based on DT data arch/arm/kernel/devtree.c | 22 ++------------------- arch/arm/mach-bcm/bcm63xx_pmb.c | 6 +++--- arch/arm64/kernel/smp.c | 31 ++---------------------------- arch/csky/kernel/smp.c | 6 ++---- arch/openrisc/kernel/smp.c | 6 +----- arch/powerpc/kernel/smp.c | 7 +------ arch/riscv/kernel/cpu.c | 3 ++- arch/sh/boards/of-generic.c | 5 ++--- arch/x86/kernel/devicetree.c | 5 ++--- drivers/base/cacheinfo.c | 34 ++++++++++++++++++++++++++++++++- drivers/of/base.c | 22 +++++++++++++++++++++ include/linux/cacheinfo.h | 2 +- include/linux/of.h | 1 + 13 files changed, 74 insertions(+), 76 deletions(-) -- 2.30.2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FC6AC4332F for ; Wed, 6 Oct 2021 16:44:14 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 07BE861154 for ; Wed, 6 Oct 2021 16:44:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 07BE861154 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HPgJr4wy0z3c4y for ; Thu, 7 Oct 2021 03:44:12 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=209.85.167.177; helo=mail-oi1-f177.google.com; envelope-from=robherring2@gmail.com; receiver=) Received: from mail-oi1-f177.google.com (mail-oi1-f177.google.com [209.85.167.177]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4HPgJL71Rdz2xtc for ; Thu, 7 Oct 2021 03:43:45 +1100 (AEDT) Received: by mail-oi1-f177.google.com with SMTP id s69so4785397oie.13 for ; Wed, 06 Oct 2021 09:43:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jBzMvIMgnR7M/3yhI7B+vslrQk5E3C0Pdi0d+USOXmM=; b=ojCTUGSChOzH+WzmCcVchXTEvnBnl6ULsHWfmLIt56kWLxGtbVbGjuGCFgK4MnhTsf Y4nPBg2RAuiLp1UEcjgSLwa9pFxKw180KjbbDjUJvQ5DMIbLlJFJ1FYYiWobx566dCSK Xq9B2inhklihGlTXEJoZrZaWGoS31LrpUOF/iFmCRll6s1i9+h4veiV/InlHiRy3tkxF ywsZskntO87eh24br+sc9s8xU03LzSMR560u/W9rl9CND2n6WFpSZWULg6FDdwl8UvZI vfs63gW2OODIJ5NxXkP4EeVdfug0ECF/NzYgLXvrXehbRykeNfvSa7tdxYRhMmBxkA9u +FsQ== X-Gm-Message-State: AOAM5325cOz8XO+mVz8+235tBWU6ITJeUVVAaNWjcmfQ1hKn1VV1/L86 SLtKfYDztT59MZM4VwzWAg== X-Google-Smtp-Source: ABdhPJx7CXhXT5M1W0CAhtBp2h8eMcQ5I0cRndKVwy8olo5SejcUQh3JemHdw8Jrz5VsbxC5vFcqCA== X-Received: by 2002:a05:6808:2221:: with SMTP id bd33mr8117373oib.64.1633538615382; Wed, 06 Oct 2021 09:43:35 -0700 (PDT) Received: from xps15.herring.priv (66-90-148-213.dyn.grandenetworks.net. [66.90.148.213]) by smtp.googlemail.com with ESMTPSA id s29sm4236628otg.60.2021.10.06.09.43.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 09:43:34 -0700 (PDT) From: Rob Herring To: Russell King , James Morse , Catalin Marinas , Will Deacon , Guo Ren , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Michael Ellerman , Paul Walmsley , Palmer Dabbelt , Albert Ou , Yoshinori Sato , Rich Felker , x86@kernel.org, Greg Kroah-Hartman Subject: [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Date: Wed, 6 Oct 2021 11:43:20 -0500 Message-Id: <20211006164332.1981454-1-robh@kernel.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Florian Fainelli , Scott Branden , "Rafael J. Wysocki" , linux-sh@vger.kernel.org, Ray Jui , "H. Peter Anvin" , linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, Ingo Molnar , Paul Mackerras , Borislav Petkov , bcm-kernel-feedback-list@broadcom.com, Thomas Gleixner , Frank Rowand , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" The first 10 patches add a new function, of_get_cpu_hwid(), which parses CPU DT node 'reg' property, and then use it to replace all the open coded versions of parsing CPU node 'reg' properties. The last 2 patches add support for populating the cacheinfo 'id' on DT platforms. The minimum associated CPU hwid is used for the id. The id is optional, but necessary for resctrl which is being adapted for Arm MPAM. Tested on arm64. Compile tested on arm, x86 and powerpc. Rob Rob Herring (12): of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes ARM: Use of_get_cpu_hwid() ARM: broadcom: Use of_get_cpu_hwid() arm64: Use of_get_cpu_hwid() csky: Use of_get_cpu_hwid() openrisc: Use of_get_cpu_hwid() powerpc: Use of_get_cpu_hwid() riscv: Use of_get_cpu_hwid() sh: Use of_get_cpu_hwid() x86: dt: Use of_get_cpu_hwid() cacheinfo: Allow for >32-bit cache 'id' cacheinfo: Set cache 'id' based on DT data arch/arm/kernel/devtree.c | 22 ++------------------- arch/arm/mach-bcm/bcm63xx_pmb.c | 6 +++--- arch/arm64/kernel/smp.c | 31 ++---------------------------- arch/csky/kernel/smp.c | 6 ++---- arch/openrisc/kernel/smp.c | 6 +----- arch/powerpc/kernel/smp.c | 7 +------ arch/riscv/kernel/cpu.c | 3 ++- arch/sh/boards/of-generic.c | 5 ++--- arch/x86/kernel/devicetree.c | 5 ++--- drivers/base/cacheinfo.c | 34 ++++++++++++++++++++++++++++++++- drivers/of/base.c | 22 +++++++++++++++++++++ include/linux/cacheinfo.h | 2 +- include/linux/of.h | 1 + 13 files changed, 74 insertions(+), 76 deletions(-) -- 2.30.2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1177C433F5 for ; Wed, 6 Oct 2021 16:45:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8D4366113E for ; Wed, 6 Oct 2021 16:45:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 8D4366113E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Pdwy3ZipEDleBA3sKen9VBqgqeZIkIuvUlPiVvphD3k=; b=h05+bMlsNmXsxv cWIx5I3TTWKDu6v3WPQb+irnXzw49X3PFoExaikbL/EjeOEnm7x7NA/B4vnB19QLlYlv93Mplq300 QJM+FWwSMRyjb4cFZyMzhUGdo33/s4htTqKz8jYtHVf0n/O4UfaPeCwro1BUYCUmQGT9GtjV8puD8 LDcgqHD9w3LLQt2UMZRWrKusCu4USlxhfsEJurPvJbxT8EyEUNO6ezS9/4IOFS4KXd9y80A3BiFDC DP+iYabIihtI3GzaCt9x45yWWBFk2Azm1VXIIH/iDmDR1V0MFk65ABRjKsxBH8FNF4xRrW8hwyGxI 2zzYeTQrypbto6vUDoPQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mYA16-00F23E-Vz; Wed, 06 Oct 2021 16:43:41 +0000 Received: from mail-oi1-f175.google.com ([209.85.167.175]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mYA12-00F22K-RB; Wed, 06 Oct 2021 16:43:38 +0000 Received: by mail-oi1-f175.google.com with SMTP id w206so4861979oiw.4; Wed, 06 Oct 2021 09:43:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jBzMvIMgnR7M/3yhI7B+vslrQk5E3C0Pdi0d+USOXmM=; b=xJMk1bk/aCcVIpqjZaE2PiEvy7B0NLjCuoNeZ3SI/bsr1pQy00NlymlC3l/6/zLzlY neVnj3Ea5yYzyy+lpkWDCZHUO/AqDSsbby9in1wk18RncvNGubG+fpgHVZTGIia+o0cu JjtGeXxxS7egnOtrUmMva4kIKeu1qYkBZMYOi0h/a7ltNnLi6AopOCBwobHRDGsbtgw0 taLbOX2FF2Lkri9dSdYo8rI0QQW31y9Dl8XQKNzX3nEqiqy+k+AGR7v0RWhgM8OGUce6 fbMmPt/E0b4cm7kahr4q+OlHWSG/Pl7V0m+NKXvqakgfuGwm8Vge4yNWfT6zjQcXb1P6 o6mA== X-Gm-Message-State: AOAM530wbUpUwDH1+UsY5Dn1YGux1wCGyGj1eZNJfNg7U06z0yCSt4Ep LTQrQMPobqVizJ5vtwvhfA== X-Google-Smtp-Source: ABdhPJx7CXhXT5M1W0CAhtBp2h8eMcQ5I0cRndKVwy8olo5SejcUQh3JemHdw8Jrz5VsbxC5vFcqCA== X-Received: by 2002:a05:6808:2221:: with SMTP id bd33mr8117373oib.64.1633538615382; Wed, 06 Oct 2021 09:43:35 -0700 (PDT) Received: from xps15.herring.priv (66-90-148-213.dyn.grandenetworks.net. [66.90.148.213]) by smtp.googlemail.com with ESMTPSA id s29sm4236628otg.60.2021.10.06.09.43.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 09:43:34 -0700 (PDT) From: Rob Herring To: Russell King , James Morse , Catalin Marinas , Will Deacon , Guo Ren , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Michael Ellerman , Paul Walmsley , Palmer Dabbelt , Albert Ou , Yoshinori Sato , Rich Felker , x86@kernel.org, Greg Kroah-Hartman Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Benjamin Herrenschmidt , Paul Mackerras , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Rafael J. Wysocki" , Frank Rowand , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Date: Wed, 6 Oct 2021 11:43:20 -0500 Message-Id: <20211006164332.1981454-1-robh@kernel.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211006_094336_904544_8D64FB76 X-CRM114-Status: GOOD ( 12.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The first 10 patches add a new function, of_get_cpu_hwid(), which parses CPU DT node 'reg' property, and then use it to replace all the open coded versions of parsing CPU node 'reg' properties. The last 2 patches add support for populating the cacheinfo 'id' on DT platforms. The minimum associated CPU hwid is used for the id. The id is optional, but necessary for resctrl which is being adapted for Arm MPAM. Tested on arm64. Compile tested on arm, x86 and powerpc. Rob Rob Herring (12): of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes ARM: Use of_get_cpu_hwid() ARM: broadcom: Use of_get_cpu_hwid() arm64: Use of_get_cpu_hwid() csky: Use of_get_cpu_hwid() openrisc: Use of_get_cpu_hwid() powerpc: Use of_get_cpu_hwid() riscv: Use of_get_cpu_hwid() sh: Use of_get_cpu_hwid() x86: dt: Use of_get_cpu_hwid() cacheinfo: Allow for >32-bit cache 'id' cacheinfo: Set cache 'id' based on DT data arch/arm/kernel/devtree.c | 22 ++------------------- arch/arm/mach-bcm/bcm63xx_pmb.c | 6 +++--- arch/arm64/kernel/smp.c | 31 ++---------------------------- arch/csky/kernel/smp.c | 6 ++---- arch/openrisc/kernel/smp.c | 6 +----- arch/powerpc/kernel/smp.c | 7 +------ arch/riscv/kernel/cpu.c | 3 ++- arch/sh/boards/of-generic.c | 5 ++--- arch/x86/kernel/devicetree.c | 5 ++--- drivers/base/cacheinfo.c | 34 ++++++++++++++++++++++++++++++++- drivers/of/base.c | 22 +++++++++++++++++++++ include/linux/cacheinfo.h | 2 +- include/linux/of.h | 1 + 13 files changed, 74 insertions(+), 76 deletions(-) -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel