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From: Matthew Brost <matthew.brost@intel.com>
To: John Harrison <john.c.harrison@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Patchwork <patchwork@emeril.freedesktop.org>
Subject: Re: [Intel-gfx]  ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev4)
Date: Tue, 12 Oct 2021 17:15:54 -0700	[thread overview]
Message-ID: <20211013001554.GB4739@jons-linux-dev-box> (raw)
In-Reply-To: <9f423dd2-f083-ad8e-1f60-ceb5d53799fc@intel.com>

On Tue, Oct 12, 2021 at 03:15:00PM -0700, John Harrison wrote:
> On 10/4/2021 15:21, Patchwork wrote:
> > == Series Details ==
> > 
> > Series: Parallel submission aka multi-bb execbuf (rev4)
> > URL   : https://patchwork.freedesktop.org/series/92789/
> > State : warning
> > 
> > == Summary ==
> > 
> > $ dim checkpatch origin/drm-tip
> > e2a47a99bf9d drm/i915/guc: Move GuC guc_id allocation under submission state sub-struct
> > f83d8f1539fa drm/i915/guc: Take GT PM ref when deregistering context
> > -:79: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'gt' - possible side-effects?
> > #79: FILE: drivers/gpu/drm/i915/gt/intel_gt_pm.h:44:
> > +#define with_intel_gt_pm(gt, tmp) \
> > +	for (tmp = 1, intel_gt_pm_get(gt); tmp; \
> > +	     intel_gt_pm_put(gt), tmp = 0)
> > 
> > -:79: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'tmp' - possible side-effects?
> > #79: FILE: drivers/gpu/drm/i915/gt/intel_gt_pm.h:44:
> > +#define with_intel_gt_pm(gt, tmp) \
> > +	for (tmp = 1, intel_gt_pm_get(gt); tmp; \
> > +	     intel_gt_pm_put(gt), tmp = 0)
> Not sure what these two are complaining about? But 'gt' and 'tmp' should be
> wrapped with parentheses when used?
> 

Not, sure but I think this one is fine.

> > 
> > total: 0 errors, 0 warnings, 2 checks, 290 lines checked
> > 93e5284929b3 drm/i915/guc: Take engine PM when a context is pinned with GuC submission
> > 4dd6554d994d drm/i915/guc: Don't call switch_to_kernel_context with GuC submission
> > 8629b55f536c drm/i915: Add logical engine mapping
> > 8117ec0a1ca7 drm/i915: Expose logical engine instance to user
> > aa8e1eb4dd4e drm/i915/guc: Introduce context parent-child relationship
> > aaf50eacc2fd drm/i915/guc: Add multi-lrc context registration
> > e5f6f50e66d1 drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts
> > adf21ba138f3 drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids
> > 40ef33318b81 drm/i915/guc: Implement parallel context pin / unpin functions
> > 1ad560c70346 drm/i915/guc: Implement multi-lrc submission
> > -:364: CHECK:SPACING: spaces preferred around that '*' (ctx:ExV)
> > #364: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:771:
> > +		*wqi++ = child->ring->tail / sizeof(u64);
> >   		^
> This seems like a bogus warning.
> 

Agree.

> > 
> > total: 0 errors, 0 warnings, 1 checks, 570 lines checked
> > 466c01457dec drm/i915/guc: Insert submit fences between requests in parent-child relationship
> > 2ece815c1f18 drm/i915/guc: Implement multi-lrc reset
> > 7add5784199f drm/i915/guc: Update debugfs for GuC multi-lrc
> > -:23: CHECK:LINE_SPACING: Please don't use multiple blank lines
> > #23: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3707:
> > +
> This should be fixed.
>

Done.
 
> > 
> > total: 0 errors, 0 warnings, 1 checks, 67 lines checked
> > 966991d7bbed drm/i915: Fix bug in user proto-context creation that leaked contexts
> > 0eb3d3bf0c84 drm/i915/guc: Connect UAPI to GuC multi-lrc interface
> > 68c6596b649a drm/i915/doc: Update parallel submit doc to point to i915_drm.h
> > -:13: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
> > #13:
> > deleted file mode 100644
> > 
> > total: 0 errors, 1 warnings, 0 checks, 10 lines checked
> > 8290f5d15ca2 drm/i915/guc: Add basic GuC multi-lrc selftest
> > -:22: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
> > #22:
> > new file mode 100644
> These two can be ignored.

Agree.

> 
> > total: 0 errors, 1 warnings, 0 checks, 190 lines checked
> > ade3768c42d5 drm/i915/guc: Implement no mid batch preemption for multi-lrc
> > 57882939d788 drm/i915: Multi-BB execbuf
> > -:369: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_i' - possible side-effects?
> > #369: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1854:
> > +#define for_each_batch_create_order(_eb, _i) \
> > +	for (_i = 0; _i < (_eb)->num_batches; ++_i)
> Again, not sure the 'reuse' comment means but should also use '(_i)'?
>

I haven't been able to figure out how to fix these ones. I think you
only need () if you dref the variable.
 
> > 
> > -:371: ERROR:MULTISTATEMENT_MACRO_USE_DO_WHILE: Macros with multiple statements should be enclosed in a do - while loop
> > #371: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1856:
> > +#define for_each_batch_add_order(_eb, _i) \
> > +	BUILD_BUG_ON(!typecheck(int, _i)); \
> > +	for (_i = (_eb)->num_batches - 1; _i >= 0; --_i)
> This seems bogus. Wrapping it in a do/while will break the purpose!
> 

Right. Added the BUILD_BUG_ON here because I did have a bug where I used
an unsigned with this macro and that breaks the macro. 

Matt

> > 
> > -:371: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_i' - possible side-effects?
> > #371: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1856:
> > +#define for_each_batch_add_order(_eb, _i) \
> > +	BUILD_BUG_ON(!typecheck(int, _i)); \
> > +	for (_i = (_eb)->num_batches - 1; _i >= 0; --_i)
> As above.
> 
> > 
> > total: 1 errors, 0 warnings, 2 checks, 1298 lines checked
> > 28b699ece289 drm/i915/guc: Handle errors in multi-lrc requests
> > 962e6b3dce59 drm/i915: Make request conflict tracking understand parallel submits
> > 368ab12f5205 drm/i915: Update I915_GEM_BUSY IOCTL to understand composite fences
> > b52570f01859 drm/i915: Enable multi-bb execbuf
> > 8766155832d7 drm/i915/execlists: Weak parallel submission support for execlists
> > 
> > 
> 

  reply	other threads:[~2021-10-13  0:20 UTC|newest]

Thread overview: 165+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-04 22:06 [Intel-gfx] [PATCH 00/26] Parallel submission aka multi-bb execbuf Matthew Brost
2021-10-04 22:06 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 01/26] drm/i915/guc: Move GuC guc_id allocation under submission state sub-struct Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07  3:06   ` [Intel-gfx] " John Harrison
2021-10-07  3:06     ` John Harrison
2021-10-07 15:05     ` [Intel-gfx] " Matthew Brost
2021-10-07 15:05       ` Matthew Brost
2021-10-07 18:13       ` [Intel-gfx] " John Harrison
2021-10-07 18:13         ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 02/26] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07  3:37   ` [Intel-gfx] " John Harrison
2021-10-07  3:37     ` John Harrison
2021-10-08  1:28     ` [Intel-gfx] " Matthew Brost
2021-10-08  1:28       ` Matthew Brost
2021-10-08 18:23     ` [Intel-gfx] " Matthew Brost
2021-10-08 18:23       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 03/26] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07  3:45   ` [Intel-gfx] " John Harrison
2021-10-07  3:45     ` John Harrison
2021-10-07 15:19     ` [Intel-gfx] " Matthew Brost
2021-10-07 15:19       ` Matthew Brost
2021-10-07 18:15       ` [Intel-gfx] " John Harrison
2021-10-07 18:15         ` John Harrison
2021-10-08  1:23         ` [Intel-gfx] " Matthew Brost
2021-10-08  1:23           ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 04/26] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07  3:49   ` [Intel-gfx] " John Harrison
2021-10-07  3:49     ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 05/26] drm/i915: Add logical engine mapping Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07 19:03   ` [Intel-gfx] " John Harrison
2021-10-07 19:03     ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 06/26] drm/i915: Expose logical engine instance to user Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 07/26] drm/i915/guc: Introduce context parent-child relationship Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07 19:35   ` [Intel-gfx] " John Harrison
2021-10-07 19:35     ` John Harrison
2021-10-08 18:33     ` [Intel-gfx] " Matthew Brost
2021-10-08 18:33       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 08/26] drm/i915/guc: Add multi-lrc context registration Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07 19:50   ` [Intel-gfx] " John Harrison
2021-10-07 19:50     ` John Harrison
2021-10-08  1:31     ` [Intel-gfx] " Matthew Brost
2021-10-08  1:31       ` Matthew Brost
2021-10-08 17:20     ` [Intel-gfx] " John Harrison
2021-10-08 17:29       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 09/26] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07 20:23   ` [Intel-gfx] " John Harrison
2021-10-07 20:23     ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 10/26] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-07 22:03   ` [Intel-gfx] " John Harrison
2021-10-07 22:03     ` John Harrison
2021-10-08  1:21     ` [Intel-gfx] " Matthew Brost
2021-10-08  1:21       ` Matthew Brost
2021-10-08 16:40       ` [Intel-gfx] " John Harrison
2021-10-08 16:40         ` John Harrison
2021-10-13 18:03         ` [Intel-gfx] " Matthew Brost
2021-10-13 18:03           ` Matthew Brost
2021-10-13 19:11           ` [Intel-gfx] " John Harrison
2021-10-13 19:11             ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 11/26] drm/i915/guc: Implement parallel context pin / unpin functions Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 12/26] drm/i915/guc: Implement multi-lrc submission Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-05  7:55   ` [Intel-gfx] " kernel test robot
2021-10-05  7:55     ` kernel test robot
2021-10-05 10:37   ` kernel test robot
2021-10-05 10:37     ` kernel test robot
2021-10-08 17:20   ` John Harrison
2021-10-08 17:20     ` John Harrison
2021-10-13 18:24     ` [Intel-gfx] " Matthew Brost
2021-10-13 18:24       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 13/26] drm/i915/guc: Insert submit fences between requests in parent-child relationship Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 14/26] drm/i915/guc: Implement multi-lrc reset Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-08 17:39   ` [Intel-gfx] " John Harrison
2021-10-08 17:39     ` John Harrison
2021-10-08 17:56     ` [Intel-gfx] " Matthew Brost
2021-10-08 17:56       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 15/26] drm/i915/guc: Update debugfs for GuC multi-lrc Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-08 17:46   ` [Intel-gfx] " John Harrison
2021-10-08 17:46     ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 16/26] drm/i915: Fix bug in user proto-context creation that leaked contexts Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-08 17:49   ` [Intel-gfx] " John Harrison
2021-10-08 17:49     ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 17/26] drm/i915/guc: Connect UAPI to GuC multi-lrc interface Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-11 22:09   ` [Intel-gfx] " John Harrison
2021-10-11 22:09     ` John Harrison
2021-10-11 22:59     ` [Intel-gfx] " Matthew Brost
2021-10-11 22:59       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 18/26] drm/i915/doc: Update parallel submit doc to point to i915_drm.h Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 19/26] drm/i915/guc: Add basic GuC multi-lrc selftest Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 20/26] drm/i915/guc: Implement no mid batch preemption for multi-lrc Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-11 23:32   ` [Intel-gfx] " John Harrison
2021-10-11 23:32     ` John Harrison
2021-10-13  1:52     ` [Intel-gfx] " Matthew Brost
2021-10-13  1:52       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 21/26] drm/i915: Multi-BB execbuf Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-05  8:31   ` [Intel-gfx] " kernel test robot
2021-10-05  8:31     ` kernel test robot
2021-10-05 17:02   ` Matthew Brost
2021-10-06 20:46   ` Matthew Brost
2021-10-12 21:22   ` John Harrison
2021-10-12 21:22     ` John Harrison
2021-10-13  0:37     ` [Intel-gfx] " Matthew Brost
2021-10-13  0:37       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 22/26] drm/i915/guc: Handle errors in multi-lrc requests Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-12 21:56   ` [Intel-gfx] " John Harrison
2021-10-12 21:56     ` John Harrison
2021-10-13  0:18     ` [Intel-gfx] " Matthew Brost
2021-10-13  0:18       ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 23/26] drm/i915: Make request conflict tracking understand parallel submits Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-12 22:08   ` [Intel-gfx] " John Harrison
2021-10-12 22:08     ` John Harrison
2021-10-13  0:32     ` [Intel-gfx] " Matthew Brost
2021-10-13  0:32       ` Matthew Brost
2021-10-13 19:35       ` [Intel-gfx] " John Harrison
2021-10-13 19:35         ` John Harrison
2021-10-13 17:51     ` [Intel-gfx] " Matthew Brost
2021-10-13 17:51       ` Matthew Brost
2021-10-13 19:25       ` [Intel-gfx] " John Harrison
2021-10-13 19:25         ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 24/26] drm/i915: Update I915_GEM_BUSY IOCTL to understand composite fences Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-11 22:15   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-10-11 22:15     ` Daniele Ceraolo Spurio
2021-10-12  7:53   ` [Intel-gfx] " Tvrtko Ursulin
2021-10-12 18:31     ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 25/26] drm/i915: Enable multi-bb execbuf Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 26/26] drm/i915/execlists: Weak parallel submission support for execlists Matthew Brost
2021-10-04 22:06   ` Matthew Brost
2021-10-04 22:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev4) Patchwork
2021-10-12 22:15   ` John Harrison
2021-10-13  0:15     ` Matthew Brost [this message]
2021-10-13 19:24       ` John Harrison
2021-10-04 22:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-04 22:26 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-10-12 22:15   ` John Harrison
2021-10-13  0:12     ` Matthew Brost
2021-10-04 22:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-05  1:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev5) Patchwork
2021-10-05  1:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-05  1:54 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-10-05  2:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-12 18:11 ` [Intel-gfx] [PATCH 02/26] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-10-12 18:11   ` Matthew Brost

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