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[2001:470:b8f6:1b::1]) by smtp.gmail.com with ESMTPSA id x16sm2798761qtp.56.2021.10.21.11.50.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 11:50:19 -0700 (PDT) Received: from minyard.net (unknown [IPv6:2001:470:b8f6:1b:b816:2692:1867:c58b]) by serve.minyard.net (Postfix) with ESMTPSA id 6772118000C; Thu, 21 Oct 2021 18:50:18 +0000 (UTC) Date: Thu, 21 Oct 2021 13:50:17 -0500 From: Corey Minyard To: Hao Wu Subject: Re: [PATCH v2 2/7] hw/i2c: Read FIFO during RXF_CTL change in NPCM7XX SMBus Message-ID: <20211021185017.GA66936@minyard.net> References: <20211021183956.920822-1-wuhaotsh@google.com> <20211021183956.920822-3-wuhaotsh@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211021183956.920822-3-wuhaotsh@google.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::82c; envelope-from=tcminyard@gmail.com; helo=mail-qt1-x82c.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: minyard@acm.org Cc: peter.maydell@linaro.org, Titus Rwantare , venture@google.com, qemu-devel@nongnu.org, hskinnemoen@google.com, kfting@nuvoton.com, qemu-arm@nongnu.org, Avi.Fishman@nuvoton.com Errors-To: qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-devel" X-TUID: grfGhVDPlJY2 On Thu, Oct 21, 2021 at 11:39:51AM -0700, Hao Wu wrote: > Originally we read in from SMBus when RXF_STS is cleared. However, > the driver clears RXF_STS before setting RXF_CTL, causing the SM bus > module to read incorrect amount of bytes in FIFO mode when the number > of bytes read changed. This patch fixes this issue. > > Signed-off-by: Hao Wu > Reviewed-by: Titus Rwantare This looks ok. I assume you can take this in with the rest of the patches. Acked-by: Corey Minyard > --- > hw/i2c/npcm7xx_smbus.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/hw/i2c/npcm7xx_smbus.c b/hw/i2c/npcm7xx_smbus.c > index f18e311556..1435daea94 100644 > --- a/hw/i2c/npcm7xx_smbus.c > +++ b/hw/i2c/npcm7xx_smbus.c > @@ -637,9 +637,6 @@ static void npcm7xx_smbus_write_rxf_sts(NPCM7xxSMBusState *s, uint8_t value) > { > if (value & NPCM7XX_SMBRXF_STS_RX_THST) { > s->rxf_sts &= ~NPCM7XX_SMBRXF_STS_RX_THST; > - if (s->status == NPCM7XX_SMBUS_STATUS_RECEIVING) { > - npcm7xx_smbus_recv_fifo(s); > - } > } > } > > @@ -651,6 +648,9 @@ static void npcm7xx_smbus_write_rxf_ctl(NPCM7xxSMBusState *s, uint8_t value) > new_ctl = KEEP_OLD_BIT(s->rxf_ctl, new_ctl, NPCM7XX_SMBRXF_CTL_LAST); > } > s->rxf_ctl = new_ctl; > + if (s->status == NPCM7XX_SMBUS_STATUS_RECEIVING) { > + npcm7xx_smbus_recv_fifo(s); > + } > } > > static uint64_t npcm7xx_smbus_read(void *opaque, hwaddr offset, unsigned size) > -- > 2.33.0.1079.g6e70778dc9-goog > >