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From: Lai Jiangshan <jiangshanlai@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, Lai Jiangshan <laijs@linux.alibaba.com>,
	Andy Lutomirski <luto@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>
Subject: [PATCH V4 48/50] x86/entry: Remove the unused ASM macros
Date: Tue, 26 Oct 2021 22:38:46 +0800	[thread overview]
Message-ID: <20211026143851.19481-4-jiangshanlai@gmail.com> (raw)
In-Reply-To: <20211026141420.17138-1-jiangshanlai@gmail.com>

From: Lai Jiangshan <laijs@linux.alibaba.com>

They are implemented and used in C code.  The ASM version is not needed
any more.

FENCE_SWAPGS_USER_ENTRY is not removed because it is still being used
in the nmi userspace path.  It could be possible to be removed in
future entry code enhancement.

Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
---
 arch/x86/entry/calling.h | 99 ----------------------------------------
 1 file changed, 99 deletions(-)

diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h
index 9065c31d2875..d42012fc694d 100644
--- a/arch/x86/entry/calling.h
+++ b/arch/x86/entry/calling.h
@@ -210,53 +210,6 @@ For 32-bit we have the following conventions - kernel is built with
 	popq	%rax
 .endm
 
-.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req
-	ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI
-	movq	%cr3, \scratch_reg
-	movq	\scratch_reg, \save_reg
-	/*
-	 * Test the user pagetable bit. If set, then the user page tables
-	 * are active. If clear CR3 already has the kernel page table
-	 * active.
-	 */
-	bt	$PTI_USER_PGTABLE_BIT, \scratch_reg
-	jnc	.Ldone_\@
-
-	ADJUST_KERNEL_CR3 \scratch_reg
-	movq	\scratch_reg, %cr3
-
-.Ldone_\@:
-.endm
-
-.macro RESTORE_CR3 scratch_reg:req save_reg:req
-	ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
-
-	/* No need to restore when the saved CR3 is kernel CR3. */
-	bt	$PTI_USER_PGTABLE_BIT, \save_reg
-	jnc	.Lend_\@
-
-	ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
-
-	/*
-	 * Check if there's a pending flush for the user ASID we're
-	 * about to set.
-	 */
-	movq	\save_reg, \scratch_reg
-	andq	$(0x7FF), \scratch_reg
-	bt	\scratch_reg, THIS_CPU_user_pcid_flush_mask
-	jnc	.Lnoflush_\@
-
-	btr	\scratch_reg, THIS_CPU_user_pcid_flush_mask
-	jmp	.Lwrcr3_\@
-
-.Lnoflush_\@:
-	SET_NOFLUSH_BIT \save_reg
-
-.Lwrcr3_\@:
-	movq	\save_reg, %cr3
-.Lend_\@:
-.endm
-
 #else /* CONFIG_PAGE_TABLE_ISOLATION=n: */
 
 .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
@@ -265,10 +218,6 @@ For 32-bit we have the following conventions - kernel is built with
 .endm
 .macro SWITCH_TO_USER_CR3_STACK scratch_reg:req
 .endm
-.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req
-.endm
-.macro RESTORE_CR3 scratch_reg:req save_reg:req
-.endm
 
 #endif
 
@@ -277,17 +226,10 @@ For 32-bit we have the following conventions - kernel is built with
  *
  * FENCE_SWAPGS_USER_ENTRY is used in the user entry swapgs code path, to
  * prevent a speculative swapgs when coming from kernel space.
- *
- * FENCE_SWAPGS_KERNEL_ENTRY is used in the kernel entry non-swapgs code path,
- * to prevent the swapgs from getting speculatively skipped when coming from
- * user space.
  */
 .macro FENCE_SWAPGS_USER_ENTRY
 	ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_USER
 .endm
-.macro FENCE_SWAPGS_KERNEL_ENTRY
-	ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_KERNEL
-.endm
 
 .macro STACKLEAK_ERASE_NOCLOBBER
 #ifdef CONFIG_GCC_PLUGIN_STACKLEAK
@@ -297,12 +239,6 @@ For 32-bit we have the following conventions - kernel is built with
 #endif
 .endm
 
-.macro SAVE_AND_SET_GSBASE scratch_reg:req save_reg:req
-	rdgsbase \save_reg
-	GET_PERCPU_BASE \scratch_reg
-	wrgsbase \scratch_reg
-.endm
-
 #else /* CONFIG_X86_64 */
 # undef		UNWIND_HINT_IRET_REGS
 # define	UNWIND_HINT_IRET_REGS
@@ -313,38 +249,3 @@ For 32-bit we have the following conventions - kernel is built with
 	call stackleak_erase
 #endif
 .endm
-
-#ifdef CONFIG_SMP
-
-/*
- * CPU/node NR is loaded from the limit (size) field of a special segment
- * descriptor entry in GDT.
- */
-.macro LOAD_CPU_AND_NODE_SEG_LIMIT reg:req
-	movq	$__CPUNODE_SEG, \reg
-	lsl	\reg, \reg
-.endm
-
-/*
- * Fetch the per-CPU GSBASE value for this processor and put it in @reg.
- * We normally use %gs for accessing per-CPU data, but we are setting up
- * %gs here and obviously can not use %gs itself to access per-CPU data.
- *
- * Do not use RDPID, because KVM loads guest's TSC_AUX on vm-entry and
- * may not restore the host's value until the CPU returns to userspace.
- * Thus the kernel would consume a guest's TSC_AUX if an NMI arrives
- * while running KVM's run loop.
- */
-.macro GET_PERCPU_BASE reg:req
-	LOAD_CPU_AND_NODE_SEG_LIMIT \reg
-	andq	$VDSO_CPUNODE_MASK, \reg
-	movq	__per_cpu_offset(, \reg, 8), \reg
-.endm
-
-#else
-
-.macro GET_PERCPU_BASE reg:req
-	movq	pcpu_unit_offsets(%rip), \reg
-.endm
-
-#endif /* CONFIG_SMP */
-- 
2.19.1.6.gb485710b


  parent reply	other threads:[~2021-10-26 14:39 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-26 14:13 [PATCH V4 00/50] x86/entry/64: Convert a bunch of ASM entry code into C code Lai Jiangshan
2021-10-26 14:13 ` [PATCH V4 01/50] x86/entry: Add fence for kernel entry swapgs in paranoid_entry() Lai Jiangshan
2021-10-27 12:19   ` Borislav Petkov
2021-10-28  0:51     ` Lai Jiangshan
2021-10-26 14:13 ` [PATCH V4 02/50] x86/entry: Use the correct fence macro after swapgs in kernel CR3 Lai Jiangshan
2021-10-26 14:13 ` [PATCH V4 03/50] x86/traps: Remove stack-protector from traps.c Lai Jiangshan
2021-10-26 14:13 ` [PATCH V4 04/50] x86/xen: Add xenpv_restore_regs_and_return_to_usermode() Lai Jiangshan
2021-11-02  8:58   ` Borislav Petkov
2021-11-02  9:19     ` Lai Jiangshan
2021-11-02  9:49       ` Borislav Petkov
2021-11-02 11:22         ` H. Peter Anvin
2021-11-02 14:27           ` Borislav Petkov
2021-10-26 14:20 ` [PATCH V4 05/50] x86/entry: Use swapgs and native_iret directly in swapgs_restore_regs_and_return_to_usermode Lai Jiangshan
2021-10-26 14:20 ` [PATCH V4 06/50] compiler_types.h: Add __noinstr_section() for noinstr Lai Jiangshan
2021-10-26 14:24   ` Miguel Ojeda
2021-10-26 14:20 ` [PATCH V4 07/50] x86/entry: Introduce __entry_text for entry code written in C Lai Jiangshan
2021-10-26 14:20 ` [PATCH V4 08/50] x86/entry: Move PTI_USER_* to arch/x86/include/asm/processor-flags.h Lai Jiangshan
2021-10-26 14:20 ` [PATCH V4 09/50] x86: Remove unused kernel_to_user_p4dp() and user_to_kernel_p4dp() Lai Jiangshan
2021-10-26 14:20 ` [PATCH V4 10/50] x86: Replace PTI_PGTABLE_SWITCH_BIT with PTI_USER_PGTABLE_BIT Lai Jiangshan
2021-10-26 14:27 ` [PATCH V4 11/50] x86: Mark __native_read_cr3() & native_write_cr3() as __always_inline Lai Jiangshan
2021-10-26 14:27 ` [PATCH V4 12/50] x86/traps: Move the declaration of native_irq_return_iret into proto.h Lai Jiangshan
2021-10-26 14:27 ` [PATCH V4 13/50] x86/entry: Add arch/x86/entry/entry64.c for C entry code Lai Jiangshan
2021-10-26 14:27 ` [PATCH V4 14/50] x86/entry: Expose the address of .Lgs_change to entry64.c Lai Jiangshan
2021-10-26 14:27 ` [PATCH V4 15/50] x86/entry: Add C verion of SWITCH_TO_KERNEL_CR3 as switch_to_kernel_cr3() Lai Jiangshan
2021-10-26 14:27 ` [PATCH V4 16/50] x86/traps: Add fence_swapgs_{user,kernel}_entry() Lai Jiangshan
2021-10-26 14:27 ` [PATCH V4 17/50] x86/entry: Add C {user,kernel}_entry_swapgs_and_fence() Lai Jiangshan
2021-10-26 14:27 ` [PATCH V4 18/50] x86/traps: Move pt_regs only in fixup_bad_iret() Lai Jiangshan
2021-10-26 14:30 ` [PATCH V4 19/50] x86/entry: Switch the stack after error_entry() returns Lai Jiangshan
2021-10-26 14:30 ` [PATCH V4 20/50] x86/entry: move PUSH_AND_CLEAR_REGS out of error_entry Lai Jiangshan
2021-10-26 14:30 ` [PATCH V4 21/50] x86/entry: Move cld to the start of idtentry Lai Jiangshan
2021-10-26 14:30 ` [PATCH V4 22/50] x86/entry: Don't call error_entry for XENPV Lai Jiangshan
2021-10-26 14:30 ` [PATCH V4 23/50] x86/entry: Convert SWAPGS to swapgs in error_entry() Lai Jiangshan
2021-10-26 14:32 ` [PATCH V4 24/50] x86/entry: Implement the whole error_entry() as C code Lai Jiangshan
2021-10-26 14:32 ` [PATCH V4 25/50] x86/entry: Use idtentry macro for entry_INT80_compat Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 26/50] x86/entry: Convert SWAPGS to swapgs in entry_SYSENTER_compat() Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 27/50] x86: Remove the definition of SWAPGS Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 28/50] x86/entry: Make paranoid_exit() callable Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 29/50] x86/entry: Call paranoid_exit() in asm_exc_nmi() Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 30/50] x86/entry: move PUSH_AND_CLEAR_REGS out of paranoid_entry Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 31/50] x86/entry: Add the C version ist_switch_to_kernel_cr3() Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 32/50] x86/entry: Skip CR3 write when the saved CR3 is kernel CR3 in RESTORE_CR3 Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 33/50] x86/entry: Add the C version ist_restore_cr3() Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 34/50] x86/entry: Add the C version get_percpu_base() Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 35/50] x86/entry: Add the C version ist_switch_to_kernel_gsbase() Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 36/50] x86/entry: Implement the C version ist_paranoid_entry() Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 37/50] x86/entry: Implement the C version ist_paranoid_exit() Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 38/50] x86/entry: Add a C macro to define the function body for IST in .entry.text Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 39/50] x86/debug, mce: Use C entry code Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 40/50] x86/idtentry.h: Move the definitions *IDTENTRY_{MCE|DEBUG}* up Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 41/50] x86/nmi: Use DEFINE_IDTENTRY_NMI for nmi Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 42/50] x86/nmi: Use C entry code Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 43/50] x86/entry: Add a C macro to define the function body for IST in .entry.text with an error code Lai Jiangshan
2021-10-26 14:34 ` [PATCH V4 44/50] x86/doublefault: Use C entry code Lai Jiangshan
2021-10-26 14:38 ` [PATCH V4 45/50] x86/sev: Add and use ist_vc_switch_off_ist() Lai Jiangshan
2021-10-26 14:38 ` [PATCH V4 46/50] x86/sev: Use C entry code Lai Jiangshan
2021-10-26 14:38 ` [PATCH V4 47/50] x86/entry: Remove ASM function paranoid_entry() and paranoid_exit() Lai Jiangshan
2021-10-26 14:38 ` Lai Jiangshan [this message]
2021-10-26 14:38 ` [PATCH V4 49/50] x86/entry: Remove save_ret from PUSH_AND_CLEAR_REGS Lai Jiangshan
2021-10-26 14:38 ` [PATCH V4 50/50] x86/syscall/64: Move the checking for sysret to C code Lai Jiangshan

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