From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: [sashal-stable:pending-5.4 19/48] drivers/mmc/host/sdhci-esdhc-imx.c:1041:31: error: implicit declaration of function 'readl_poll_timeout'
Date: Sun, 31 Oct 2021 16:02:51 +0800 [thread overview]
Message-ID: <202110311642.laIyxHyw-lkp@intel.com> (raw)
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git pending-5.4
head: 2ff2c6176c71e0d8101ee70fd6a45d5192c4761f
commit: 6eea2c3e97d08a6658bad110ab7956c4c6d87135 [19/48] mmc: sdhci-esdhc-imx: clear the buffer_read_ready to reset standard tuning circuit
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git/commit/?id=6eea2c3e97d08a6658bad110ab7956c4c6d87135
git remote add sashal-stable https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git
git fetch --no-tags sashal-stable pending-5.4
git checkout 6eea2c3e97d08a6658bad110ab7956c4c6d87135
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/mmc/host/sdhci-esdhc-imx.c: In function 'esdhc_reset_tuning':
>> drivers/mmc/host/sdhci-esdhc-imx.c:1041:31: error: implicit declaration of function 'readl_poll_timeout' [-Werror=implicit-function-declaration]
1041 | ret = readl_poll_timeout(host->ioaddr + SDHCI_AUTO_CMD_STATUS,
| ^~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +/readl_poll_timeout +1041 drivers/mmc/host/sdhci-esdhc-imx.c
1019
1020 static void esdhc_reset_tuning(struct sdhci_host *host)
1021 {
1022 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
1023 struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
1024 u32 ctrl;
1025 int ret;
1026
1027 /* Reset the tuning circuit */
1028 if (esdhc_is_usdhc(imx_data)) {
1029 if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) {
1030 ctrl = readl(host->ioaddr + ESDHC_MIX_CTRL);
1031 ctrl &= ~ESDHC_MIX_CTRL_SMPCLK_SEL;
1032 ctrl &= ~ESDHC_MIX_CTRL_FBCLK_SEL;
1033 writel(ctrl, host->ioaddr + ESDHC_MIX_CTRL);
1034 writel(0, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
1035 } else if (imx_data->socdata->flags & ESDHC_FLAG_STD_TUNING) {
1036 ctrl = readl(host->ioaddr + SDHCI_AUTO_CMD_STATUS);
1037 ctrl &= ~ESDHC_MIX_CTRL_SMPCLK_SEL;
1038 ctrl &= ~ESDHC_MIX_CTRL_EXE_TUNE;
1039 writel(ctrl, host->ioaddr + SDHCI_AUTO_CMD_STATUS);
1040 /* Make sure ESDHC_MIX_CTRL_EXE_TUNE cleared */
> 1041 ret = readl_poll_timeout(host->ioaddr + SDHCI_AUTO_CMD_STATUS,
1042 ctrl, !(ctrl & ESDHC_MIX_CTRL_EXE_TUNE), 1, 50);
1043 if (ret == -ETIMEDOUT)
1044 dev_warn(mmc_dev(host->mmc),
1045 "Warning! clear execute tuning bit failed\n");
1046 /*
1047 * SDHCI_INT_DATA_AVAIL is W1C bit, set this bit will clear the
1048 * usdhc IP internal logic flag execute_tuning_with_clr_buf, which
1049 * will finally make sure the normal data transfer logic correct.
1050 */
1051 ctrl = readl(host->ioaddr + SDHCI_INT_STATUS);
1052 ctrl |= SDHCI_INT_DATA_AVAIL;
1053 writel(ctrl, host->ioaddr + SDHCI_INT_STATUS);
1054 }
1055 }
1056 }
1057
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
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