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From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-pci@vger.kernel.org, pali@kernel.org,
	"Marek Behún" <kabel@kernel.org>
Subject: [PATCH 1/7] PCI: pci-bridge-emul: Add description for class_revision field
Date: Sun, 31 Oct 2021 19:12:27 +0100	[thread overview]
Message-ID: <20211031181233.9976-2-kabel@kernel.org> (raw)
In-Reply-To: <20211031181233.9976-1-kabel@kernel.org>

From: Pali Rohár <pali@kernel.org>

The current assignment to the class_revision member

  class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16);

can make the reader think that class is at high 16 bits of the member and
revision at low 16 bits.

In reality, class is at high 24 bits, but the class for PCI Bridge Normal
Decode is PCI_CLASS_BRIDGE_PCI << 8.

Change the assignment and add a comment to make this clearer.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/pci/pci-bridge-emul.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index db97cddfc85e..a4af1a533d71 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -265,7 +265,11 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
 {
 	BUILD_BUG_ON(sizeof(bridge->conf) != PCI_BRIDGE_CONF_END);
 
-	bridge->conf.class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16);
+	/*
+	 * class_revision: Class is high 24 bits and revision is low 8 bit of this member,
+	 * while class for PCI Bridge Normal Decode has the 24-bit value: PCI_CLASS_BRIDGE_PCI << 8
+	 */
+	bridge->conf.class_revision |= cpu_to_le32((PCI_CLASS_BRIDGE_PCI << 8) << 8);
 	bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
 	bridge->conf.cache_line_size = 0x10;
 	bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST);
-- 
2.32.0


  reply	other threads:[~2021-10-31 18:12 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-31 18:12 [PATCH 0/7] PCI: aardvark controller fixes BATCH 3 Marek Behún
2021-10-31 18:12 ` Marek Behún [this message]
2021-10-31 18:12 ` [PATCH 2/7] PCI: pci-bridge-emul: Add definitions for missing capabilities registers Marek Behún
2021-11-29 16:44   ` Lorenzo Pieralisi
2021-10-31 18:12 ` [PATCH 3/7] PCI: aardvark: Add support for DEVCAP2, DEVCTL2, LNKCAP2 and LNKCTL2 registers on emulated bridge Marek Behún
2021-10-31 18:12 ` [PATCH 4/7] PCI: aardvark: Clear all MSIs at setup Marek Behún
2021-10-31 18:12 ` [PATCH 5/7] PCI: aardvark: Disable bus mastering and mask all interrupts when unbinding driver Marek Behún
2021-11-29 16:43   ` Lorenzo Pieralisi
2021-10-31 18:12 ` [PATCH 6/7] PCI: aardvark: Free config space for emulated root bridge when unbinding driver to fix memory leak Marek Behún
2021-10-31 18:12 ` [PATCH 7/7] PCI: aardvark: Reset PCIe card and disable PHY at driver unbind Marek Behún
2021-11-29 16:40   ` Lorenzo Pieralisi
2021-11-29 17:15     ` Marek Behún
2021-11-30 10:31       ` Lorenzo Pieralisi
2021-11-30 12:22         ` Marek Behún

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