From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: [omap-audio:peter/linux-next-wip 5586/6167] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:675:17: warning: no previous prototype for function 'dcn201_aux_engine_create'
Date: Sun, 07 Nov 2021 07:21:55 +0800 [thread overview]
Message-ID: <202111070753.SaOR7Ji7-lkp@intel.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 30088 bytes --]
tree: https://github.com/omap-audio/linux-audio peter/linux-next-wip
head: d08c31cfb65e8197b0ab607484d26fc48366dcee
commit: 82d96c34b0d49ba60bb9489dc22aa0fe5565c5f2 [5586/6167] drm/amd/display: add cyan_skillfish display support
config: i386-randconfig-a006-20211002 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 962e503cc8bc411f7523cc393acae8aae425b1c4)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/omap-audio/linux-audio/commit/82d96c34b0d49ba60bb9489dc22aa0fe5565c5f2
git remote add omap-audio https://github.com/omap-audio/linux-audio
git fetch --no-tags omap-audio peter/linux-next-wip
git checkout 82d96c34b0d49ba60bb9489dc22aa0fe5565c5f2
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:365:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
DCN_AUX_MASK_SH_LIST(__SHIFT)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:203:2: note: expanded from macro 'DCN_AUX_MASK_SH_LIST'
AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:213:16: note: expanded from macro 'AUX_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:72:1: note: expanded from here
DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:16515:111: note: expanded from macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT'
#define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT 0x1f
^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:365:2: note: previous initialization is here
DCN_AUX_MASK_SH_LIST(__SHIFT)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:201:2: note: expanded from macro 'DCN_AUX_MASK_SH_LIST'
AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:213:16: note: expanded from macro 'AUX_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:66:1: note: expanded from here
DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:16515:111: note: expanded from macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT'
#define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT 0x1f
^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:369:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
DCN_AUX_MASK_SH_LIST(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:203:2: note: expanded from macro 'DCN_AUX_MASK_SH_LIST'
AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:213:16: note: expanded from macro 'AUX_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:32:1: note: expanded from here
DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:16519:111: note: expanded from macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK'
#define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK 0x80000000L
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:369:2: note: previous initialization is here
DCN_AUX_MASK_SH_LIST(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:201:2: note: expanded from macro 'DCN_AUX_MASK_SH_LIST'
AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:213:16: note: expanded from macro 'AUX_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:26:1: note: expanded from here
DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:16519:111: note: expanded from macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK'
#define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK 0x80000000L
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:407:3: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
LINK_ENCODER_MASK_SH_LIST_DCN201(__SHIFT)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:404:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN201'
LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:173:16: note: expanded from macro 'LE_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:44:1: note: expanded from here
DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:17500:111: note: expanded from macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
#define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:407:3: note: previous initialization is here
LINK_ENCODER_MASK_SH_LIST_DCN201(__SHIFT)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:404:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN201'
LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:175:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
LINK_ENCODER_MASK_SH_LIST_DCN10(mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:181:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN10'
LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:173:16: note: expanded from macro 'LE_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:250:1: note: expanded from here
DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:17500:111: note: expanded from macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
#define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:411:3: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
LINK_ENCODER_MASK_SH_LIST_DCN201(_MASK)
--
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:14888:111: note: expanded from macro 'OTG0_OTG_VUPDATE_KEEPOUT__OTG_MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_EN_MASK'
#define OTG0_OTG_VUPDATE_KEEPOUT__OTG_MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_EN_MASK 0x80000000L
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:514:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
TG_COMMON_MASK_SH_LIST_DCN201(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_optc.h:56:2: note: expanded from macro 'TG_COMMON_MASK_SH_LIST_DCN201'
SF(OTG0_OTG_VUPDATE_KEEPOUT, MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET, mask_sh), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_audio.h:45:16: note: expanded from macro 'SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:30:1: note: expanded from here
OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:14886:111: note: expanded from macro 'OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET_MASK'
#define OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET_MASK 0x0000FFFFL
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:514:2: note: previous initialization is here
TG_COMMON_MASK_SH_LIST_DCN201(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_optc.h:45:2: note: expanded from macro 'TG_COMMON_MASK_SH_LIST_DCN201'
TG_COMMON_MASK_SH_LIST_DCN(mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_optc.h:199:2: note: expanded from macro 'TG_COMMON_MASK_SH_LIST_DCN'
SF(OTG0_OTG_VUPDATE_KEEPOUT, MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET, mask_sh), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_audio.h:45:16: note: expanded from macro 'SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:38:1: note: expanded from here
OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:14886:111: note: expanded from macro 'OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET_MASK'
#define OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET_MASK 0x0000FFFFL
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:514:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
TG_COMMON_MASK_SH_LIST_DCN201(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_optc.h:57:2: note: expanded from macro 'TG_COMMON_MASK_SH_LIST_DCN201'
SF(OTG0_OTG_VUPDATE_KEEPOUT, MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET, mask_sh), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_audio.h:45:16: note: expanded from macro 'SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:33:1: note: expanded from here
OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:14887:111: note: expanded from macro 'OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET_MASK'
#define OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET_MASK 0x03FF0000L
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:514:2: note: previous initialization is here
TG_COMMON_MASK_SH_LIST_DCN201(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_optc.h:45:2: note: expanded from macro 'TG_COMMON_MASK_SH_LIST_DCN201'
TG_COMMON_MASK_SH_LIST_DCN(mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_optc.h:200:2: note: expanded from macro 'TG_COMMON_MASK_SH_LIST_DCN'
SF(OTG0_OTG_VUPDATE_KEEPOUT, MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET, mask_sh), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_audio.h:45:16: note: expanded from macro 'SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:41:1: note: expanded from here
OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:14887:111: note: expanded from macro 'OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET_MASK'
#define OTG0_OTG_VUPDATE_KEEPOUT__MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET_MASK 0x03FF0000L
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:514:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
TG_COMMON_MASK_SH_LIST_DCN201(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_optc.h:68:2: note: expanded from macro 'TG_COMMON_MASK_SH_LIST_DCN201'
SF(DWB_SOURCE_SELECT, OPTC_DWB1_SOURCE_SELECT, mask_sh)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_audio.h:45:16: note: expanded from macro 'SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:66:1: note: expanded from here
DWB_SOURCE_SELECT__OPTC_DWB1_SOURCE_SELECT_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:15730:111: note: expanded from macro 'DWB_SOURCE_SELECT__OPTC_DWB1_SOURCE_SELECT_MASK'
#define DWB_SOURCE_SELECT__OPTC_DWB1_SOURCE_SELECT_MASK 0x00000038L
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:514:2: note: previous initialization is here
TG_COMMON_MASK_SH_LIST_DCN201(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_optc.h:67:2: note: expanded from macro 'TG_COMMON_MASK_SH_LIST_DCN201'
SF(DWB_SOURCE_SELECT, OPTC_DWB1_SOURCE_SELECT, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_audio.h:45:16: note: expanded from macro 'SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:63:1: note: expanded from here
DWB_SOURCE_SELECT__OPTC_DWB1_SOURCE_SELECT_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:15730:111: note: expanded from macro 'DWB_SOURCE_SELECT__OPTC_DWB1_SOURCE_SELECT_MASK'
#define DWB_SOURCE_SELECT__OPTC_DWB1_SOURCE_SELECT_MASK 0x00000038L
^~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:675:17: warning: no previous prototype for function 'dcn201_aux_engine_create' [-Wmissing-prototypes]
struct dce_aux *dcn201_aux_engine_create(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:675:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
struct dce_aux *dcn201_aux_engine_create(
^
static
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:709:20: warning: no previous prototype for function 'dcn201_i2c_hw_create' [-Wmissing-prototypes]
struct dce_i2c_hw *dcn201_i2c_hw_create(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:709:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
struct dce_i2c_hw *dcn201_i2c_hw_create(
^
static
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:792:22: warning: no previous prototype for function 'dcn201_link_encoder_create' [-Wmissing-prototypes]
struct link_encoder *dcn201_link_encoder_create(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:792:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
struct link_encoder *dcn201_link_encoder_create(
^
static
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:814:22: warning: no previous prototype for function 'dcn201_clock_source_create' [-Wmissing-prototypes]
struct clock_source *dcn201_clock_source_create(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:814:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
struct clock_source *dcn201_clock_source_create(
^
static
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:870:3: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
HWSEQ_DCN201_REG_LIST()
^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:349:2: note: expanded from macro 'HWSEQ_DCN201_REG_LIST'
HWSEQ_DCN_REG_LIST(), \
^~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:178:2: note: expanded from macro 'HWSEQ_DCN_REG_LIST'
SR(DCFCLK_CNTL), \
^~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:252:15: note: expanded from macro 'SR'
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:247:25: note: expanded from macro 'BASE_INNER'
#define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg
^
<scratch space>:116:1: note: expanded from here
DMU_BASE__INST0_SEG2
^
drivers/gpu/drm/amd/amdgpu/../include/cyan_skillfish_ip_offset.h:247:52: note: expanded from macro 'DMU_BASE__INST0_SEG2'
#define DMU_BASE__INST0_SEG2 0x000034C0
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:870:3: note: previous initialization is here
HWSEQ_DCN201_REG_LIST()
^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:349:2: note: expanded from macro 'HWSEQ_DCN201_REG_LIST'
HWSEQ_DCN_REG_LIST(), \
^~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:177:2: note: expanded from macro 'HWSEQ_DCN_REG_LIST'
SR(DCFCLK_CNTL),\
^~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:252:15: note: expanded from macro 'SR'
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:247:25: note: expanded from macro 'BASE_INNER'
#define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg
^
<scratch space>:112:1: note: expanded from here
DMU_BASE__INST0_SEG2
^
drivers/gpu/drm/amd/amdgpu/../include/cyan_skillfish_ip_offset.h:247:52: note: expanded from macro 'DMU_BASE__INST0_SEG2'
#define DMU_BASE__INST0_SEG2 0x000034C0
^
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:909:6: warning: no previous prototype for function 'dcn201_clock_source_destroy' [-Wmissing-prototypes]
void dcn201_clock_source_destroy(struct clock_source **clk_src)
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:909:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void dcn201_clock_source_destroy(struct clock_source **clk_src)
^
static
38 warnings generated.
vim +/dcn201_aux_engine_create +675 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c
674
> 675 struct dce_aux *dcn201_aux_engine_create(
676 struct dc_context *ctx,
677 uint32_t inst)
678 {
679 struct aux_engine_dce110 *aux_engine =
680 kzalloc(sizeof(struct aux_engine_dce110), GFP_ATOMIC);
681
682 if (!aux_engine)
683 return NULL;
684
685 dce110_aux_engine_construct(aux_engine, ctx, inst,
686 SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD,
687 &aux_engine_regs[inst],
688 &aux_mask,
689 &aux_shift,
690 ctx->dc->caps.extended_aux_timeout_support);
691
692 return &aux_engine->base;
693 }
694 #define i2c_inst_regs(id) { I2C_HW_ENGINE_COMMON_REG_LIST(id) }
695
696 static const struct dce_i2c_registers i2c_hw_regs[] = {
697 i2c_inst_regs(1),
698 i2c_inst_regs(2),
699 };
700
701 static const struct dce_i2c_shift i2c_shifts = {
702 I2C_COMMON_MASK_SH_LIST_DCN2(__SHIFT)
703 };
704
705 static const struct dce_i2c_mask i2c_masks = {
706 I2C_COMMON_MASK_SH_LIST_DCN2(_MASK)
707 };
708
> 709 struct dce_i2c_hw *dcn201_i2c_hw_create(
710 struct dc_context *ctx,
711 uint32_t inst)
712 {
713 struct dce_i2c_hw *dce_i2c_hw =
714 kzalloc(sizeof(struct dce_i2c_hw), GFP_ATOMIC);
715
716 if (!dce_i2c_hw)
717 return NULL;
718
719 dcn2_i2c_hw_construct(dce_i2c_hw, ctx, inst,
720 &i2c_hw_regs[inst], &i2c_shifts, &i2c_masks);
721
722 return dce_i2c_hw;
723 }
724
725 static struct mpc *dcn201_mpc_create(struct dc_context *ctx, uint32_t num_mpcc)
726 {
727 struct dcn201_mpc *mpc201 = kzalloc(sizeof(struct dcn201_mpc),
728 GFP_ATOMIC);
729
730 if (!mpc201)
731 return NULL;
732
733 dcn201_mpc_construct(mpc201, ctx,
734 &mpc_regs,
735 &mpc_shift,
736 &mpc_mask,
737 num_mpcc);
738
739 return &mpc201->base;
740 }
741
742 static struct hubbub *dcn201_hubbub_create(struct dc_context *ctx)
743 {
744 struct dcn20_hubbub *hubbub = kzalloc(sizeof(struct dcn20_hubbub),
745 GFP_ATOMIC);
746
747 if (!hubbub)
748 return NULL;
749
750 hubbub201_construct(hubbub, ctx,
751 &hubbub_reg,
752 &hubbub_shift,
753 &hubbub_mask);
754
755 return &hubbub->base;
756 }
757
758 static struct timing_generator *dcn201_timing_generator_create(
759 struct dc_context *ctx,
760 uint32_t instance)
761 {
762 struct optc *tgn10 =
763 kzalloc(sizeof(struct optc), GFP_ATOMIC);
764
765 if (!tgn10)
766 return NULL;
767
768 tgn10->base.inst = instance;
769 tgn10->base.ctx = ctx;
770
771 tgn10->tg_regs = &tg_regs[instance];
772 tgn10->tg_shift = &tg_shift;
773 tgn10->tg_mask = &tg_mask;
774
775 dcn201_timing_generator_init(tgn10);
776
777 return &tgn10->base;
778 }
779
780 static const struct encoder_feature_support link_enc_feature = {
781 .max_hdmi_deep_color = COLOR_DEPTH_121212,
782 .max_hdmi_pixel_clock = 600000,
783 .hdmi_ycbcr420_supported = true,
784 .dp_ycbcr420_supported = true,
785 .fec_supported = true,
786 .flags.bits.IS_HBR2_CAPABLE = true,
787 .flags.bits.IS_HBR3_CAPABLE = true,
788 .flags.bits.IS_TPS3_CAPABLE = true,
789 .flags.bits.IS_TPS4_CAPABLE = true
790 };
791
> 792 struct link_encoder *dcn201_link_encoder_create(
793 const struct encoder_init_data *enc_init_data)
794 {
795 struct dcn20_link_encoder *enc20 =
796 kzalloc(sizeof(struct dcn20_link_encoder), GFP_ATOMIC);
797 struct dcn10_link_encoder *enc10 = &enc20->enc10;
798
799 if (!enc20)
800 return NULL;
801
802 dcn201_link_encoder_construct(enc20,
803 enc_init_data,
804 &link_enc_feature,
805 &link_enc_regs[enc_init_data->transmitter],
806 &link_enc_aux_regs[enc_init_data->channel - 1],
807 &link_enc_hpd_regs[enc_init_data->hpd_source],
808 &le_shift,
809 &le_mask);
810
811 return &enc10->base;
812 }
813
> 814 struct clock_source *dcn201_clock_source_create(
815 struct dc_context *ctx,
816 struct dc_bios *bios,
817 enum clock_source_id id,
818 const struct dce110_clk_src_regs *regs,
819 bool dp_clk_src)
820 {
821 struct dce110_clk_src *clk_src =
822 kzalloc(sizeof(struct dce110_clk_src), GFP_ATOMIC);
823
824 if (!clk_src)
825 return NULL;
826
827 if (dce112_clk_src_construct(clk_src, ctx, bios, id,
828 regs, &cs_shift, &cs_mask)) {
829 clk_src->base.dp_clk_src = dp_clk_src;
830 return &clk_src->base;
831 }
832 kfree(clk_src);
833 return NULL;
834 }
835
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
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