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From: "Marek Behún" <kabel@kernel.org>
To: netdev@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>
Cc: "Rob Herring" <robh+dt@kernel.org>,
	devicetree@vger.kernel.org,
	"Russell King" <rmk+kernel@armlinux.org.uk>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Vladimir Oltean" <olteanv@gmail.com>,
	"Sean Anderson" <sean.anderson@seco.com>,
	davem@davemloft.net, "Marek Behún" <kabel@kernel.org>
Subject: [PATCH net-next v2 7/8] net: phy: marvell10g: Use tabs instead of spaces for indentation
Date: Tue, 23 Nov 2021 17:40:26 +0100	[thread overview]
Message-ID: <20211123164027.15618-8-kabel@kernel.org> (raw)
In-Reply-To: <20211123164027.15618-1-kabel@kernel.org>

Some register definitions were defined with spaces used for indentation.
Change them to tabs.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
 drivers/net/phy/marvell10g.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index d289641190db..0cb9b4ef09c7 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -117,16 +117,16 @@ enum {
 	MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_NO_SGMII_AN	= 0x5,
 	MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH	= 0x6,
 	MV_V2_33X0_PORT_CTRL_MACTYPE_USXGMII			= 0x7,
-	MV_V2_PORT_INTR_STS     = 0xf040,
-	MV_V2_PORT_INTR_MASK    = 0xf043,
-	MV_V2_PORT_INTR_STS_WOL_EN      = BIT(8),
-	MV_V2_MAGIC_PKT_WORD0   = 0xf06b,
-	MV_V2_MAGIC_PKT_WORD1   = 0xf06c,
-	MV_V2_MAGIC_PKT_WORD2   = 0xf06d,
+	MV_V2_PORT_INTR_STS		= 0xf040,
+	MV_V2_PORT_INTR_MASK		= 0xf043,
+	MV_V2_PORT_INTR_STS_WOL_EN	= BIT(8),
+	MV_V2_MAGIC_PKT_WORD0		= 0xf06b,
+	MV_V2_MAGIC_PKT_WORD1		= 0xf06c,
+	MV_V2_MAGIC_PKT_WORD2		= 0xf06d,
 	/* Wake on LAN registers */
-	MV_V2_WOL_CTRL          = 0xf06e,
-	MV_V2_WOL_CTRL_CLEAR_STS        = BIT(15),
-	MV_V2_WOL_CTRL_MAGIC_PKT_EN     = BIT(0),
+	MV_V2_WOL_CTRL			= 0xf06e,
+	MV_V2_WOL_CTRL_CLEAR_STS	= BIT(15),
+	MV_V2_WOL_CTRL_MAGIC_PKT_EN	= BIT(0),
 	/* Temperature control/read registers (88X3310 only) */
 	MV_V2_TEMP_CTRL		= 0xf08a,
 	MV_V2_TEMP_CTRL_MASK	= 0xc000,
-- 
2.32.0


  parent reply	other threads:[~2021-11-23 16:41 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-23 16:40 [PATCH net-next v2 0/8] Extend `phy-mode` to string array Marek Behún
2021-11-23 16:40 ` [PATCH net-next v2 1/8] dt-bindings: ethernet-controller: support multiple PHY connection types Marek Behún
2021-11-30 22:26   ` Rob Herring
2021-11-23 16:40 ` [PATCH net-next v2 2/8] net: Update documentation for *_get_phy_mode() functions Marek Behún
2021-11-23 16:40 ` [PATCH net-next v2 3/8] device property: add helper function for getting phy mode bitmap Marek Behún
2021-11-23 16:40 ` [PATCH net-next v2 4/8] net: phylink: update supported_interfaces with modes from fwnode Marek Behún
2021-11-23 21:24   ` Vladimir Oltean
2021-11-23 22:27     ` Marek Behún
2021-11-23 22:54       ` Vladimir Oltean
2021-11-24 11:04         ` Russell King (Oracle)
2021-11-24 12:04           ` Vladimir Oltean
2021-11-24 12:17             ` Marek Behún
2021-11-24 12:31               ` Vladimir Oltean
2021-12-02 22:25                 ` Marek Behún
2021-12-04 12:42                   ` Vladimir Oltean
2021-11-24 11:50         ` Marek Behún
2021-11-23 16:40 ` [PATCH net-next v2 5/8] net: phylink: pass supported PHY interface modes to phylib Marek Behún
2021-11-23 16:40 ` [PATCH net-next v2 6/8] net: phy: marvell10g: Use generic macro for supported interfaces Marek Behún
2021-11-23 16:40 ` Marek Behún [this message]
2021-11-23 16:40 ` [PATCH net-next v2 8/8] net: phy: marvell10g: select host interface configuration Marek Behún

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