From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
Russell King <linux@armlinux.org.uk>,
Nicolas Pitre <nico@fluxnic.net>, Arnd Bergmann <arnd@arndb.de>,
Kees Cook <keescook@chromium.org>,
Keith Packard <keithpac@amazon.com>,
Linus Walleij <linus.walleij@linaro.org>,
Nick Desaulniers <ndesaulniers@google.com>,
Tony Lindgren <tony@atomide.com>
Subject: [RFC PATCH 1/6] ARM: entry: preserve thread_info pointer in switch_to
Date: Fri, 26 Nov 2021 11:10:01 +0100 [thread overview]
Message-ID: <20211126101006.3410322-2-ardb@kernel.org> (raw)
In-Reply-To: <20211126101006.3410322-1-ardb@kernel.org>
Tweak the UP stack protector handling code so that the thread info
pointer is preserved in R7 until set_current is called. This is needed
for a subsequent patch that implements THREAD_INFO_IN_TASK and
set_current for UP as well.
This also means we will prefer the per-task protector on UP systems that
implement the thread ID registers, so tweak the preprocessor
conditionals to reflect this.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm/kernel/entry-armv.S | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 5fb7465d14d9..1e26d69ebbf1 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -814,16 +814,16 @@ ENTRY(__switch_to)
ldr r6, [r2, #TI_CPU_DOMAIN]
#endif
switch_tls r1, r4, r5, r3, r7
-#if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
- ldr r7, [r2, #TI_TASK]
+#if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP) && \
+ !defined(CONFIG_STACKPROTECTOR_PER_TASK)
+ ldr r9, [r2, #TI_TASK]
ldr r8, =__stack_chk_guard
.if (TSK_STACK_CANARY > IMM12_MASK)
- add r7, r7, #TSK_STACK_CANARY & ~IMM12_MASK
+ add r9, r9, #TSK_STACK_CANARY & ~IMM12_MASK
.endif
- ldr r7, [r7, #TSK_STACK_CANARY & IMM12_MASK]
-#elif defined(CONFIG_CURRENT_POINTER_IN_TPIDRURO)
- mov r7, r2 @ Preserve 'next'
+ ldr r9, [r9, #TSK_STACK_CANARY & IMM12_MASK]
#endif
+ mov r7, r2 @ Preserve 'next'
#ifdef CONFIG_CPU_USE_DOMAINS
mcr p15, 0, r6, c3, c0, 0 @ Set domain register
#endif
@@ -832,8 +832,9 @@ ENTRY(__switch_to)
ldr r0, =thread_notify_head
mov r1, #THREAD_NOTIFY_SWITCH
bl atomic_notifier_call_chain
-#if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
- str r7, [r8]
+#if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP) && \
+ !defined(CONFIG_STACKPROTECTOR_PER_TASK)
+ str r9, [r8]
#endif
mov r0, r5
#if !defined(CONFIG_THUMB2_KERNEL) && !defined(CONFIG_VMAP_STACK)
--
2.30.2
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next prev parent reply other threads:[~2021-11-26 10:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 10:10 [RFC PATCH 0/6] ARM: enable IRQ stacks and vmap'ed stacks for UP Ard Biesheuvel
2021-11-26 10:10 ` Ard Biesheuvel [this message]
2021-11-26 10:10 ` [RFC PATCH 2/6] ARM: module: implement support for PC-relative group relocations Ard Biesheuvel
2021-11-26 10:10 ` [RFC PATCH 3/6] ARM: percpu: add SMP_ON_UP support Ard Biesheuvel
2021-11-26 10:10 ` [RFC PATCH 4/6] ARM: smp: defer TPIDRURO update for SMP v6 configurations too Ard Biesheuvel
2021-11-26 10:10 ` [RFC PATCH 5/6] ARM: use TLS register for 'current' on !SMP as well Ard Biesheuvel
2021-11-26 10:10 ` [RFC PATCH 6/6] ARM: implement THREAD_INFO_IN_TASK for uniprocessor systems Ard Biesheuvel
2021-11-26 22:32 ` Arnd Bergmann
2021-11-30 8:00 ` Ard Biesheuvel
2021-11-27 0:20 ` [RFC PATCH 0/6] ARM: enable IRQ stacks and vmap'ed stacks for UP Linus Walleij
2021-11-29 16:32 ` Nicolas Pitre
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