From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ADC23C433F5 for ; Fri, 26 Nov 2021 10:13:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ycSlIKdZ1aTbs0x0yMtL40hsIXtHLlslAq2iEuBzFD8=; b=LxCKzeGiIOnd2P QTmpu6Mi1Yj7rLGmWjZHdoJw+hsfcPBEnGCl/UL0N6G2qlznBRv81U/PDGWTfMQb+f651wGEH4AkZ 0gONgPl88k+JnUu2I5p3rmMLl5kyagm4pa1/Yg2bFkYA3UD+uHSV9ZjiNSb2/RsxmUjripUC0L79G cloQU/Vbz642pjwpXIoOxZYxMG6xXEYN3+3buwQKrcZNSHO2BlXFyOrOA3hzKxN8uyIgDKBtwx/V7 WjgNGLaJHyxd97MozManI5ljOtHBOQewKTwyVmwWzdO+SRsiXwbmsmNGQHkQ+8WYTZz/muVve8uRA W9UeHoS1smN849cftQWw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mqYCt-009uH3-NZ; Fri, 26 Nov 2021 10:11:52 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mqYBX-009tjA-BX for linux-arm-kernel@lists.infradead.org; Fri, 26 Nov 2021 10:10:28 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 8F13261107; Fri, 26 Nov 2021 10:10:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1637921426; bh=izBuN8FOAgXb+/2wOXwqbe/gHD6WsabqvZRVjOfB9AA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gKl5OK3Q5/+pxs7l3hDmmG+mq/gnU1mJnocEtAzXM9t421FhvWid6FDD8k0XM+V6D WqZZsZkQ0siiUJ205B1rPNZt087EcCWuKVeZq6QtgQjF7PGdHeCaD0ZZoyms2QoX9V oQ/gnTbdaO8FhSGQG4GbRameNXyZS6Zat9q8Ih4covh0vmsFIkezebaRH+7ZuHCPOw aPouo9XfDrZYbBMlqEONHq/Z6QV/V/Mg6RNYXmKzqDEnOJhFfYnYJtcbowk3xdTt0H rgNqLmgxgZ4lBSlgwI/2KBSbCxVbRuUd4sZU1lX3qfa+DBeC5qkYgKr/Cc02K5Jjxv OjDDTBov4aO8A== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel , Russell King , Nicolas Pitre , Arnd Bergmann , Kees Cook , Keith Packard , Linus Walleij , Nick Desaulniers , Tony Lindgren Subject: [RFC PATCH 4/6] ARM: smp: defer TPIDRURO update for SMP v6 configurations too Date: Fri, 26 Nov 2021 11:10:04 +0100 Message-Id: <20211126101006.3410322-5-ardb@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211126101006.3410322-1-ardb@kernel.org> References: <20211126101006.3410322-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2350; h=from:subject; bh=izBuN8FOAgXb+/2wOXwqbe/gHD6WsabqvZRVjOfB9AA=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBhoLJ7U5Vc1RLvUrJrECAgXPilKBOPt9e1HKEZiXMZ BmykwH6JAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYaCyewAKCRDDTyI5ktmPJLx+C/ 4x3NdMfPUkjOw2/nBl/oCIDQQu3QHqtrzJyYMkh+Sb0sdpjh5Nb9blRurh87FlsCExsql3EKZ+oR11 AHCWsX1z6BZL3vzN1zy+lwbPDG/u+cvDP6MH2wLnfaP0XuV803EyEX/IRPD1uUz+LoPE3AkDZw9I6O z87EQJIcMwK2l+ZtO4Dp8NYAM1zJFVC36qHyaWOjt9j3/NhRGH8FmcfOf5eZuIBDGC/YmAGS7eSzxb iqa9Lv9mw24oPR7olUvySlgObl+0q3hLJpthU01mG+cSC9JhBJoUVwJhhUS+8cuto7a61b6b79HDj4 AZQtEKwsKsewQeZag/cMFL2G7ECgLYH9o91XtvEmbykWp0pGDTvokR/1Ctj8MsvXV0l/+qIdoF31y8 iCqk4uhLsvl3/w2jjb02QgRMyHOXcpmLe/33G61+XJ/KbZEuC5M8qfNkgYr88MZkm5id11UpjAaNby TboxAinQYMxzmivF/1poY8ZaJX2cp8LJaw+faimj39AEs= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211126_021027_526006_4CBA03F2 X-CRM114-Status: GOOD ( 14.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Defer TPIDURO updates for user space until exit for CPU_V6+SMP configurations as well so that we can decide at runtime whether to use it to carry the current pointer, provided that we are running on a CPU that actually implements this register. This is needed for THREAD_INFO_IN_TASK support for UP systems, which requires that all SMP capable systems use the TPIDRURO based access to 'current' as the only remaining alternative will be a global variable which only work on UP. Signed-off-by: Ard Biesheuvel --- arch/arm/include/asm/tls.h | 4 +++- arch/arm/kernel/entry-header.S | 8 +++++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h index c3296499176c..9c0965c14a21 100644 --- a/arch/arm/include/asm/tls.h +++ b/arch/arm/include/asm/tls.h @@ -24,7 +24,9 @@ tst \tmp1, #HWCAP_TLS @ hardware TLS available? streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 mrcne p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register +#ifndef CONFIG_SMP mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register +#endif mcrne p15, 0, \tpuser, c13, c0, 2 @ set user r/w register strne \tmp2, [\base, #TI_TP_VALUE + 4] @ save it .endm @@ -43,7 +45,7 @@ #elif defined(CONFIG_CPU_V6) #define tls_emu 0 #define has_tls_reg (elf_hwcap & HWCAP_TLS) -#define defer_tls_reg_update 0 +#define defer_tls_reg_update IS_ENABLED(CONFIG_SMP) #define switch_tls switch_tls_v6 #elif defined(CONFIG_CPU_32v6K) #define tls_emu 0 diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 81df2a3561ca..aea716c8b97c 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -292,12 +292,18 @@ .macro restore_user_regs, fast = 0, offset = 0 -#if defined(CONFIG_CPU_32v6K) && !defined(CONFIG_CPU_V6) +#if defined(CONFIG_CPU_32v6K) || \ + (defined(CONFIG_CPU_V6) && defined(CONFIG_SMP)) @ The TLS register update is deferred until return to user space so we @ can use it for other things while running in the kernel +#ifdef CONFIG_CPU_V6 +ALT_SMP(nop) +ALT_UP_B(.L0_\@) +#endif get_thread_info r1 ldr r1, [r1, #TI_TP_VALUE] mcr p15, 0, r1, c13, c0, 3 @ set TLS register +.L0_\@: #endif uaccess_enable r1, isb=0 -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel