Re: [PATCH v2 5/6] dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support

[Shawn Guo <shawn.guo@linaro.org>]

On Mon, Nov 29, 2021 at 08:23:20PM -0600, Rob Herring wrote:
> On Mon, Nov 22, 2021 at 04:51:22PM +0800, Shawn Guo wrote:
> > Add bindings for Qualcomm QCM2290 Network-On-Chip interconnect devices.
> > 
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > ---
> >  .../bindings/interconnect/qcom,qcm2290.yaml   | 116 ++++++++++++++++++
> >  .../dt-bindings/interconnect/qcom,qcm2290.h   |  94 ++++++++++++++
> >  2 files changed, 210 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml
> >  create mode 100644 include/dt-bindings/interconnect/qcom,qcm2290.h
> > 
> > diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml b/Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml
> > new file mode 100644
> > index 000000000000..fb5e62196d9a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml
> > @@ -0,0 +1,116 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm QCM2290 Network-On-Chip interconnect
> > +
> > +maintainers:
> > +  - Shawn Guo <shawn.guo@linaro.org>
> > +
> > +description: |
> > +  The Qualcomm QCM2290 interconnect providers support adjusting the
> > +  bandwidth requirements between the various NoC fabrics.
> > +
> > +properties:
> > +  reg:
> > +    maxItems: 1
> > +
> > +  compatible:
> > +    enum:
> > +      - qcom,qcm2290-bimc
> > +      - qcom,qcm2290-cnoc
> > +      - qcom,qcm2290-snoc
> > +      - qcom,qcm2290-qup-virt
> > +      - qcom,qcm2290-mmrt-virt
> > +      - qcom,qcm2290-mmnrt-virt
> > +
> > +  '#interconnect-cells':
> > +    const: 1
> > +
> > +  clock-names:
> > +    items:
> > +      - const: bus
> > +      - const: bus_a
> > +
> > +  clocks:
> > +    items:
> > +      - description: Bus Clock
> > +      - description: Bus A Clock
> > +
> > +required:
> > +  - compatible
> > +  - '#interconnect-cells'
> > +  - clock-names
> > +  - clocks
> > +
> > +additionalProperties: true
> 
> Nope. You have to define the child nodes.

Thanks for spotting it!  Will fix.

> Though the 'virt' looks 
> suspicious. 

They are interconnect providers which do not have a separate QoS
register space, but do have corresponding bus clocks to scale.  They are
named as 'virt' by following downstream and qcom,rpmh.yaml binding.

Shawn