From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE716C433EF for ; Fri, 3 Dec 2021 10:15:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ml6dPDRG2g8/xmSW3O7qiTOh1n3YgW2hi711mtGgwdQ=; b=DuuCo2ghkrflj3 cZ1DzW7pfSYfu3LAtwDhmBNWZN++AC8bdlYaN9ebkySHabHCc5SPPYAIdJ+7P5i6pv9uXfzPfq/Tv ctV2g1wJpl1lwqPjxtzET5G1C3WXdNIKw7y1sqkt98VcxUO+fQbC/m7Jg2rjDpuFDYrO6vvT/pQSL bZmtkJtkg53xCmn3UnfeYQj+jTayqqcdUvOj7XAam2Uwr6Crb0RjfPX67Ugi/NhJK+taMK6KTH47d +7qVuWuMBuCqC1UTm03fliiA6FRVktq2D+tSPEGR1Q3IjkggpnXey0jlB4jljldGeacQBl57KH+iO GIvkvVlE7WFXxrpl0KWA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt5Zh-00F6kd-8g; Fri, 03 Dec 2021 10:13:53 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt5Vm-00F4mh-9d for linux-arm-kernel@lists.infradead.org; Fri, 03 Dec 2021 10:09:52 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0E415B8266C; Fri, 3 Dec 2021 10:09:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 288B1C53FD1; Fri, 3 Dec 2021 10:09:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638526187; bh=IIQyUHMzdn4I8ZMbssYX1n3RjsHZ+XIcSaEYqEhW8Bw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kY6zk7JWsiyeLEGU75WN7DYEZ9a7gAS0UsyPPbedaiXaoIE7ttD295zIgA27UxlBd tFszWAauA9JWoertcQy9rt7MTDfz1q5oaT44Z8VSIPl6lF9r28WMyStW2FfbnZWtHb 3h3p5KBRKyFvAUAknhwSs+xKghRnba5tVraFFJu9LIshiOnEV95hWio2V+fkXOgXXv 9k7ZxGVq4B6hThIpLRvJU0GEfaV9Ax3Xd4Tw01n8K+s/yIIciDRY8R15I2BN/hFOiA LAHEkQKStr0LCuWU+ZNCboOfwXQzdT628zRGqtnwBUhQu9I4IOl2xUCpnfh2MW2M+3 swhXFDEWKw5+A== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Nicolas Pitre , Arnd Bergmann , Kees Cook , Keith Packard , Linus Walleij , Nick Desaulniers , Tony Lindgren , Marc Zyngier , Vladimir Murzin , Jesse Taube Subject: [PATCH v3 12/14] ARM: smp: defer TPIDRURO update for SMP v6 configurations too Date: Fri, 3 Dec 2021 11:09:01 +0100 Message-Id: <20211203100903.334206-13-ardb@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211203100903.334206-1-ardb@kernel.org> References: <20211203100903.334206-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3144; h=from:subject; bh=IIQyUHMzdn4I8ZMbssYX1n3RjsHZ+XIcSaEYqEhW8Bw=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBhqey5mOuET8dZMt5RXsFAxSj8TAEnsaICjO7tsQog GSzI5lqJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYansuQAKCRDDTyI5ktmPJDIVC/ 9Jde1WWUgLpbDN3jGdxX0gagxadnzyr2ZvZs8eyADaOjHVrJcNFI9Q2UFDl1ZMuEYwtyFsQep8nxsk iVkt0MNjJUQnfGsa78e8o31D9mo5390nOtnB/Ji5k7WhVn5d4gLAWiwEhuGFSQxbfRqb3qqTPVih/f no6zgTmfPgy9Nns5yv9wUybZWbvO4T625QmYwM3vf9NfL7MaSMPIGu7RO3n85vh0iUT6z10CfSQH1N 7yRR0Kowp8vedr3a4Y0wHZH4clRkIF2ff8HYOYcxK0lcPHQmKdVBkdRi6rm0r6lwuMJR1M/TkvQMCQ YQL8Br4Me9o+M6HFROVmA6LGWGC7F4YNUG8h9G4uyWqa9j9PavuQ6YArfZO8wWrS9nc3K4XkhgOR0D e2lvXhUaOlVQK8H0nY8CQebHqfoqajTd6OdZJhOhSgbF//L313LU6kM4EEdyp/4cxZd7NzXAeUIZWZ WX6aQK6RwsuWF4RH45qm1qTgNu+SIy+bu+6Yr0ONExKA4= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211203_020950_651235_8CCD3298 X-CRM114-Status: GOOD ( 17.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Defer TPIDURO updates for user space until exit also for CPU_V6+SMP configurations so that we can decide at runtime whether to use it to carry the current pointer, provided that we are running on a CPU that actually implements this register. This is needed for THREAD_INFO_IN_TASK support for UP systems, which requires that all SMP capable systems use the TPIDRURO based access to 'current' as the only remaining alternative will be a global variable which only works on UP. Acked-by: Linus Walleij Acked-by: Nicolas Pitre Signed-off-by: Ard Biesheuvel --- arch/arm/include/asm/tls.h | 13 +++++++------ arch/arm/kernel/entry-header.S | 11 ++++++++++- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h index c3296499176c..d712c170c095 100644 --- a/arch/arm/include/asm/tls.h +++ b/arch/arm/include/asm/tls.h @@ -18,13 +18,14 @@ .endm .macro switch_tls_v6, base, tp, tpuser, tmp1, tmp2 - ldr \tmp1, =elf_hwcap - ldr \tmp1, [\tmp1, #0] + ldr_va \tmp1, elf_hwcap mov \tmp2, #0xffff0fff tst \tmp1, #HWCAP_TLS @ hardware TLS available? streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 mrcne p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register +#ifndef CONFIG_SMP mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register +#endif mcrne p15, 0, \tpuser, c13, c0, 2 @ set user r/w register strne \tmp2, [\base, #TI_TP_VALUE + 4] @ save it .endm @@ -43,7 +44,7 @@ #elif defined(CONFIG_CPU_V6) #define tls_emu 0 #define has_tls_reg (elf_hwcap & HWCAP_TLS) -#define defer_tls_reg_update 0 +#define defer_tls_reg_update IS_ENABLED(CONFIG_SMP) #define switch_tls switch_tls_v6 #elif defined(CONFIG_CPU_32v6K) #define tls_emu 0 @@ -81,11 +82,11 @@ static inline void set_tls(unsigned long val) */ barrier(); - if (!tls_emu && !defer_tls_reg_update) { - if (has_tls_reg) { + if (!tls_emu) { + if (has_tls_reg && !defer_tls_reg_update) { asm("mcr p15, 0, %0, c13, c0, 3" : : "r" (val)); - } else { + } else if (!has_tls_reg) { #ifdef CONFIG_KUSER_HELPERS /* * User space must never try to access this diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 268f7f4c5c05..cb82ff5adec1 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -292,12 +292,21 @@ .macro restore_user_regs, fast = 0, offset = 0 -#if defined(CONFIG_CPU_32v6K) && !defined(CONFIG_CPU_V6) +#if defined(CONFIG_CPU_32v6K) || defined(CONFIG_SMP) +#if defined(CONFIG_CPU_V6) && defined(CONFIG_SMP) +ALT_SMP(b .L1_\@ ) +ALT_UP( nop ) + ldr_va r1, elf_hwcap + tst r1, #HWCAP_TLS @ hardware TLS available? + beq .L2_\@ +.L1_\@: +#endif @ The TLS register update is deferred until return to user space so we @ can use it for other things while running in the kernel get_thread_info r1 ldr r1, [r1, #TI_TP_VALUE] mcr p15, 0, r1, c13, c0, 3 @ set TLS register +.L2_\@: #endif uaccess_enable r1, isb=0 -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel