From: Shawn Guo <shawnguo@kernel.org>
To: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: linux-arm-kernel@lists.infradead.org,
Fabio Estevam <festevam@denx.de>, Marek Vasut <marex@denx.de>,
NXP Linux Team <linux-imx@nxp.com>,
kernel@dh-electronics.com
Subject: Re: [PATCH] ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs
Date: Tue, 14 Dec 2021 16:30:16 +0800 [thread overview]
Message-ID: <20211214083016.GE14056@dragon> (raw)
In-Reply-To: <20211208150543.10643-1-cniedermaier@dh-electronics.com>
On Wed, Dec 08, 2021 at 04:05:43PM +0100, Christoph Niedermaier wrote:
> According to datasheet Microchip LAN8710A/LAN8710Ai DS00002164B [1]
> the reset should stay asserted for at least 100uS and software
> should wait at least 200nS. On other DHCOM SoMs with the SMSC
> LAN8710Ai PHY both reset delays are 500us. This should be plenty
> and for consistency, the i.MX6 SoM should also use these delays.
>
> [1] https://ww1.microchip.com/downloads/en/DeviceDoc/00002164B.pdf
>
> Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Fabio Estevam <festevam@denx.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> Cc: kernel@dh-electronics.com
> To: linux-arm-kernel@lists.infradead.org
Applied, thanks!
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prev parent reply other threads:[~2021-12-14 8:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-08 15:05 [PATCH] ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs Christoph Niedermaier
2021-12-08 17:36 ` Fabio Estevam
2021-12-14 8:30 ` Shawn Guo [this message]
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