From: Pavel Machek <pavel@denx.de>
To: nobuhiro1.iwamatsu@toshiba.co.jp
Cc: prabhakar.mahadev-lad.rj@bp.renesas.com,
cip-dev@lists.cip-project.org, pavel@denx.de, uli@fpond.eu,
biju.das.jz@bp.renesas.com
Subject: Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Date: Thu, 16 Dec 2021 10:08:24 +0100 [thread overview]
Message-ID: <20211216090824.GB5178@amd> (raw)
In-Reply-To: <TYAPR01MB6252F8B94A684EFA61315C6B92779@TYAPR01MB6252.jpnprd01.prod.outlook.com>
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Hi!
> > This patch series adds initial support for Renesas RZ/G2L SoC [0] and
> > Renesas RZ/G2L SMARC EVK [1].
> >
> > The RZ/G2L microprocessor includes a Cortex-A55 (1.2 GHz) CPU, 16-bit
> > DDR3L/DDR4 interface, 3D graphics engine with Arm Mali-G31 and video codec
> > (H.264). It also has many interfaces such as camera input, display output,
> > USB 2.0, and Gbit-Ether, making it ideal for applications such as
> > entry-class industrial human-machine interfaces (HMIs) and embedded devices
> > with video capabilities.
> >
> > Patches add support for the following:
> > * Documentation for RZ/G2{L,LC,UL} SoC variants
> > * Documentation for Renesas SMARC EVK
> > * SYSC binding doc required for SoC identification
> > * SoC identification support
> > * Enabling ARCH_R9A07G044 in defconfig
> >
> > All the patches have been cherry picked from v5.16-rc5
> >
> > [0] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/
> > rz-arm-based-high-end-32-64-bit-mpus/rzg2l-general-purpose-microprocessors-dual-
> > core-arm-cortex-a55-12-ghz-cpus-3d-graphics-and-video-codec
> > [1] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/
> > rz-arm-based-high-end-32-64-bit-mpus/rtk9744l23s01000be-rzg2l-evaluation-board-kit
> >
>
>
> LGTM. I can merge this seriese, If there is no objection.
>
> Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Looks good to me too. I have series ready due to testing, so I'll push
it.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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prev parent reply other threads:[~2021-12-16 9:08 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-15 0:46 [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK Lad Prabhakar
2021-12-15 0:46 ` [PATCH 5.10.y-cip 1/7] dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC Lad Prabhakar
2021-12-15 0:46 ` [PATCH 5.10.y-cip 2/7] dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants Lad Prabhakar
2021-12-15 0:46 ` [PATCH 5.10.y-cip 3/7] dt-bindings: arm: renesas: Document SMARC EVK Lad Prabhakar
2021-12-15 0:46 ` [PATCH 5.10.y-cip 4/7] dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for SYSC controller Lad Prabhakar
2021-12-15 0:46 ` [PATCH 5.10.y-cip 5/7] soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's Lad Prabhakar
2021-12-15 0:46 ` [PATCH 5.10.y-cip 6/7] soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Lad Prabhakar
2021-12-15 0:46 ` [PATCH 5.10.y-cip 7/7] arm64: defconfig: Enable ARCH_R9A07G044 Lad Prabhakar
2021-12-15 10:05 ` [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK Pavel Machek
2021-12-15 10:31 ` Prabhakar Mahadev Lad
2021-12-15 10:34 ` [cip-dev] " Chris Paterson
2021-12-16 0:40 ` nobuhiro1.iwamatsu
2021-12-16 9:52 ` Chris Paterson
2021-12-16 20:46 ` nobuhiro1.iwamatsu
2021-12-16 5:10 ` nobuhiro1.iwamatsu
2021-12-16 9:08 ` Pavel Machek [this message]
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