From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Svyatoslav Ryhel <clamor95@gmail.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: [PATCH v2 2/2] memory: tegra20-emc: Correct memory device mask
Date: Wed, 22 Dec 2021 07:32:15 +0300 [thread overview]
Message-ID: <20211222043215.28237-2-digetx@gmail.com> (raw)
In-Reply-To: <20211222043215.28237-1-digetx@gmail.com>
Memory chip select is swapped when we read mode register, correct it.
We didn't have devices that use a single LPDDR chip and both chips are
always identical, hence this change is just a minor improvement.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
Changelog:
v2: - New patch in v2.
drivers/memory/tegra/tegra20-emc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c
index 497b6edbf3ca..25ba3c5e4ad6 100644
--- a/drivers/memory/tegra/tegra20-emc.c
+++ b/drivers/memory/tegra/tegra20-emc.c
@@ -540,7 +540,7 @@ static int emc_read_lpddr_mode_register(struct tegra_emc *emc,
unsigned int register_addr,
unsigned int *register_data)
{
- u32 memory_dev = emem_dev + 1;
+ u32 memory_dev = emem_dev ? 1 : 2;
u32 val, mr_mask = 0xff;
int err;
--
2.33.1
next prev parent reply other threads:[~2021-12-22 4:33 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-22 4:32 [PATCH v2 1/2] memory: tegra30-emc: Print additional memory info Dmitry Osipenko
2021-12-22 4:32 ` Dmitry Osipenko [this message]
2021-12-22 12:00 ` Krzysztof Kozlowski
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