From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============4829428544152481145==" MIME-Version: 1.0 From: kernel test robot To: kbuild-all@lists.01.org Subject: [intel-lts:5.10/yocto 10648/20368] drivers/media/i2c/ti960-des.c:129:5: warning: no previous prototype for function 'bus_switch' Date: Sun, 16 Jan 2022 12:28:43 +0800 Message-ID: <202201161252.GcREL4O4-lkp@intel.com> List-Id: --===============4829428544152481145== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Hi Ng, FYI, the error/warning still remains. tree: https://github.com/intel/linux-intel-lts.git 5.10/yocto head: 1941d4b82f36cc6ecc513f3e496ad62726d00514 commit: bd8c7120c481ebe8e2e40e6b9308d689f8adfff7 [10648/20368] media: ti960= : remove crlmodule dependency config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20220116= /202201161252.GcREL4O4-lkp(a)intel.com/config) compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 650fc4= 0b6d8d9a5869b4fca525d5f237b0ee2803) reproduce (this is a W=3D1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/= make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel/linux-intel-lts/commit/bd8c7120c481ebe8e= 2e40e6b9308d689f8adfff7 git remote add intel-lts https://github.com/intel/linux-intel-lts.g= it git fetch --no-tags intel-lts 5.10/yocto git checkout bd8c7120c481ebe8e2e40e6b9308d689f8adfff7 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=3D$HOME/0day COMPILER=3Dclang make.cross W=3D= 1 O=3Dbuild_dir ARCH=3Di386 SHELL=3D/bin/bash drivers/gpio/ drivers/gpu/drm= /i915/ drivers/media/i2c/ drivers/ptp/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): >> drivers/media/i2c/ti960-des.c:129:5: warning: no previous prototype for = function 'bus_switch' [-Wmissing-prototypes] int bus_switch(struct ti960 *va) ^ drivers/media/i2c/ti960-des.c:129:1: note: declare 'static' if the funct= ion is not intended to be used outside of this translation unit int bus_switch(struct ti960 *va) ^ static = >> drivers/media/i2c/ti960-des.c:249:6: warning: logical not is only applie= d to the left hand side of this bitwise operator [-Wlogical-not-parentheses] if (!reg_val & TI960_FSIN_ENABLE) { ^ ~ drivers/media/i2c/ti960-des.c:249:6: note: add parentheses after the '!'= to evaluate the bitwise operator first if (!reg_val & TI960_FSIN_ENABLE) { ^ ( ) drivers/media/i2c/ti960-des.c:249:6: note: add parentheses around left h= and side expression to silence this warning if (!reg_val & TI960_FSIN_ENABLE) { ^ ( ) drivers/media/i2c/ti960-des.c:1240:15: warning: unused variable 'reset_g= pio' [-Wunused-variable] unsigned int reset_gpio =3D va->pdata->reset_gpio; ^ 3 warnings generated. vim +/bus_switch +129 drivers/media/i2c/ti960-des.c 1aafb1e0df5527 Ng Khai Wen 2021-07-01 128 = d2753af810c799 Ng Khai Wen 2021-07-01 @129 int bus_switch(struct ti960 *va) d2753af810c799 Ng Khai Wen 2021-07-01 130 { d2753af810c799 Ng Khai Wen 2021-07-01 131 int ret; d2753af810c799 Ng Khai Wen 2021-07-01 132 int retry, timeout =3D 10; d2753af810c799 Ng Khai Wen 2021-07-01 133 struct i2c_client *client =3D = v4l2_get_subdevdata(&va->sd); d2753af810c799 Ng Khai Wen 2021-07-01 134 = d2753af810c799 Ng Khai Wen 2021-07-01 135 dev_dbg(&client->dev, "bus swi= tch"); d2753af810c799 Ng Khai Wen 2021-07-01 136 client->addr =3D 0x70; d2753af810c799 Ng Khai Wen 2021-07-01 137 for (retry =3D 0; retry < time= out; retry++) { d2753af810c799 Ng Khai Wen 2021-07-01 138 ret =3D i2c_smbus_write_byte(= client, 0x01); d2753af810c799 Ng Khai Wen 2021-07-01 139 if (ret < 0) d2753af810c799 Ng Khai Wen 2021-07-01 140 usleep_range(5000, 6000); d2753af810c799 Ng Khai Wen 2021-07-01 141 else d2753af810c799 Ng Khai Wen 2021-07-01 142 break; d2753af810c799 Ng Khai Wen 2021-07-01 143 } d2753af810c799 Ng Khai Wen 2021-07-01 144 = d2753af810c799 Ng Khai Wen 2021-07-01 145 client->addr =3D TI960_I2C_ADD= RESS; d2753af810c799 Ng Khai Wen 2021-07-01 146 if (retry >=3D timeout) { d2753af810c799 Ng Khai Wen 2021-07-01 147 dev_err(&client->dev, "bus sw= itch failed"); d2753af810c799 Ng Khai Wen 2021-07-01 148 return -EREMOTEIO; d2753af810c799 Ng Khai Wen 2021-07-01 149 } d2753af810c799 Ng Khai Wen 2021-07-01 150 = d2753af810c799 Ng Khai Wen 2021-07-01 151 return 0; d2753af810c799 Ng Khai Wen 2021-07-01 152 } d2753af810c799 Ng Khai Wen 2021-07-01 153 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 154 static int ti960_reg_read(struc= t ti960 *va, unsigned char reg, unsigned int *val) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 155 { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 156 int ret, retry, timeout =3D 10; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 157 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 158 for (retry =3D 0; retry < time= out; retry++) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 159 ret =3D regmap_read(va->regma= p8, reg, val); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 160 if (ret < 0) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 161 dev_err(va->sd.dev, "960 reg= read ret=3D%x", ret); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 162 usleep_range(5000, 6000); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 163 } else { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 164 break; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 165 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 166 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 167 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 168 if (retry >=3D timeout) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 169 dev_err(va->sd.dev, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 170 "%s:devid read failed: reg= =3D%2x, ret=3D%d\n", 1aafb1e0df5527 Ng Khai Wen 2021-07-01 171 __func__, reg, ret); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 172 return -EREMOTEIO; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 173 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 174 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 175 return 0; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 176 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 177 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 178 static int ti960_reg_set_bit(st= ruct ti960 *va, unsigned char reg, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 179 unsigned char bit, unsigned ch= ar val) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 180 { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 181 int ret; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 182 unsigned int reg_val; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 183 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 184 ret =3D regmap_read(va->regmap= 8, reg, ®_val); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 185 if (ret) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 186 return ret; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 187 if (val) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 188 reg_val |=3D 1 << bit; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 189 else 1aafb1e0df5527 Ng Khai Wen 2021-07-01 190 reg_val &=3D ~(1 << bit); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 191 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 192 return regmap_write(va->regmap= 8, reg, reg_val); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 193 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 194 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 195 static int ti960_map_phy_i2c_ad= dr(struct ti960 *va, unsigned short rx_port, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 196 unsigned short addr) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 197 { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 198 int rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 199 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 200 rval =3D regmap_write(va->regm= ap8, TI960_RX_PORT_SEL, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 201 (rx_port << 4) + (1 << rx_por= t)); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 202 if (rval) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 203 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 204 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 205 return regmap_write(va->regmap= 8, TI960_SLAVE_ID0, addr); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 206 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 207 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 208 static int ti960_map_alias_i2c_= addr(struct ti960 *va, unsigned short rx_port, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 209 unsigned short addr) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 210 { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 211 int rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 212 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 213 rval =3D regmap_write(va->regm= ap8, TI960_RX_PORT_SEL, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 214 (rx_port << 4) + (1 << rx_por= t)); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 215 if (rval) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 216 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 217 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 218 return regmap_write(va->regmap= 8, TI960_SLAVE_ALIAS_ID0, addr); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 219 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 220 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 221 static int ti960_map_ser_alias_= addr(struct ti960 *va, unsigned short rx_port, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 222 unsigned short ser_ali= as) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 223 { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 224 int rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 225 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 226 dev_dbg(va->sd.dev, "%s port %= d, ser_alias %x\n", __func__, rx_port, ser_alias); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 227 rval =3D regmap_write(va->regm= ap8, TI960_RX_PORT_SEL, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 228 (rx_port << 4) + (1 << rx_por= t)); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 229 if (rval) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 230 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 231 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 232 return regmap_write(va->regmap= 8, TI960_SER_ALIAS_ID, ser_alias); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 233 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 234 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 235 static int ti960_fsin_gpio_init= (struct ti960 *va, unsigned short rx_port, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 236 unsigned short ser_alias, uns= igned short fsin_gpio) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 237 { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 238 unsigned char gpio_data; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 239 int rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 240 int reg_val; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 241 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 242 dev_dbg(va->sd.dev, "%s\n", __= func__); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 243 rval =3D regmap_read(va->regma= p8, TI960_FS_CTL, ®_val); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 244 if (rval) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 245 dev_dbg(va->sd.dev, "Failed t= o read gpio status.\n"); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 246 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 247 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 248 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 @249 if (!reg_val & TI960_FSIN_ENAB= LE) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 250 dev_dbg(va->sd.dev, "FSIN not= enabled, skip config FSIN GPIO.\n"); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 251 return 0; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 252 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 253 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 254 rval =3D regmap_write(va->regm= ap8, TI960_RX_PORT_SEL, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 255 (rx_port << 4) + (1 << rx_por= t)); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 256 if (rval) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 257 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 258 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 259 switch (fsin_gpio) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 260 case 0: 1aafb1e0df5527 Ng Khai Wen 2021-07-01 261 case 1: 1aafb1e0df5527 Ng Khai Wen 2021-07-01 262 rval =3D regmap_read(va->regm= ap8, TI960_BC_GPIO_CTL0, ®_val); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 263 if (rval) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 264 dev_dbg(va->sd.dev, "Failed = to read gpio status.\n"); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 265 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 266 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 267 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 268 if (fsin_gpio =3D=3D 0) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 269 reg_val &=3D ~TI960_GPIO0_MA= SK; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 270 reg_val |=3D TI960_GPIO0_FSI= N; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 271 } else { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 272 reg_val &=3D ~TI960_GPIO1_MA= SK; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 273 reg_val |=3D TI960_GPIO1_FSI= N; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 274 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 275 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 276 rval =3D regmap_write(va->reg= map8, TI960_BC_GPIO_CTL0, reg_val); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 277 if (rval) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 278 dev_dbg(va->sd.dev, "Failed = to set gpio.\n"); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 279 break; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 280 case 2: 1aafb1e0df5527 Ng Khai Wen 2021-07-01 281 case 3: 1aafb1e0df5527 Ng Khai Wen 2021-07-01 282 rval =3D regmap_read(va->regm= ap8, TI960_BC_GPIO_CTL1, ®_val); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 283 if (rval) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 284 dev_dbg(va->sd.dev, "Failed = to read gpio status.\n"); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 285 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 286 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 287 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 288 if (fsin_gpio =3D=3D 2) { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 289 reg_val &=3D ~TI960_GPIO2_MA= SK; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 290 reg_val |=3D TI960_GPIO2_FSI= N; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 291 } else { 1aafb1e0df5527 Ng Khai Wen 2021-07-01 292 reg_val &=3D ~TI960_GPIO3_MA= SK; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 293 reg_val |=3D TI960_GPIO3_FSI= N; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 294 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 295 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 296 rval =3D regmap_write(va->reg= map8, TI960_BC_GPIO_CTL1, reg_val); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 297 if (rval) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 298 dev_dbg(va->sd.dev, "Failed = to set gpio.\n"); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 299 break; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 300 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 301 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 302 /* enable output and remote co= ntrol */ 1aafb1e0df5527 Ng Khai Wen 2021-07-01 303 ti953_reg_write(&va->sd, rx_po= rt, ser_alias, TI953_GPIO_INPUT_CTRL, TI953_GPIO_OUT_EN); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 304 rval =3D ti953_reg_read(&va->s= d, rx_port, ser_alias, TI953_LOCAL_GPIO_DATA, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 305 &gpio_data); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 306 if (rval) 1aafb1e0df5527 Ng Khai Wen 2021-07-01 307 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 308 ti953_reg_write(&va->sd, rx_po= rt, ser_alias, TI953_LOCAL_GPIO_DATA, 1aafb1e0df5527 Ng Khai Wen 2021-07-01 309 gpio_data | TI953_GPIO0_RMTE= N << fsin_gpio); 1aafb1e0df5527 Ng Khai Wen 2021-07-01 310 = 1aafb1e0df5527 Ng Khai Wen 2021-07-01 311 return rval; 1aafb1e0df5527 Ng Khai Wen 2021-07-01 312 } 1aafb1e0df5527 Ng Khai Wen 2021-07-01 313 = :::::: The code@line 129 was first introduced by commit :::::: d2753af810c79927ae6a70fd532a0b19d9816dc5 media: intel-ipu6: add ti96= 0 driver :::::: TO: Ng Khai Wen :::::: CC: Pan, Kris --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org --===============4829428544152481145==--