Re: [PATCH v3 4/5] drm/i915: add gtt misalignment test

[kernel test robot <lkp@intel.com>]

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Hi Robert,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next drm/drm-next tegra-drm/drm/tegra/for-next airlied/drm-next v5.16 next-20220121]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Robert-Beckett/discrete-card-64K-page-support/20220121-044244
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-s002 (https://download.01.org/0day-ci/archive/20220122/202201221653.skxdQmaG-lkp(a)intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.4-dirty
        # https://github.com/0day-ci/linux/commit/e7a6d547c26b78357dbad93dc9d8df90bc51d025
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Robert-Beckett/discrete-card-64K-page-support/20220121-044244
        git checkout e7a6d547c26b78357dbad93dc9d8df90bc51d025
        # save the config file to linux build tree
        mkdir build_dir
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=i386 SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>


sparse warnings: (new ones prefixed by >>)
   drivers/gpu/drm/i915/i915_gem_gtt.c: note: in included file:
>> drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1146:63: sparse: sparse: mixing different enum types:
>> drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1146:63: sparse:    unsigned int enum intel_region_id
>> drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1146:63: sparse:    unsigned int enum intel_memory_type

vim +1146 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c

  1131	
  1132	static int misaligned_pin(struct i915_address_space *vm,
  1133				  u64 hole_start, u64 hole_end,
  1134				  unsigned long end_time)
  1135	{
  1136		struct intel_memory_region *mr;
  1137		enum intel_region_id id;
  1138		unsigned long flags = PIN_OFFSET_FIXED | PIN_USER;
  1139		int err = 0;
  1140		u64 hole_size = hole_end - hole_start;
  1141	
  1142		if (i915_is_ggtt(vm))
  1143			flags |= PIN_GLOBAL;
  1144	
  1145		for_each_memory_region(mr, vm->i915, id) {
> 1146			u64 min_alignment = i915_vm_min_alignment(vm, id);
  1147			u64 size = min_alignment;
  1148			u64 addr = round_up(hole_start + (hole_size / 2), min_alignment);
  1149	
  1150			/* we can't test < 4k alignment due to flags being encoded in lower bits */
  1151			if (min_alignment != I915_GTT_PAGE_SIZE_4K) {
  1152				err = misaligned_case(vm, mr, addr + (min_alignment / 2), size, flags);
  1153				/* misaligned should error with -EINVAL*/
  1154				if (!err)
  1155					err = -EBADSLT;
  1156				if (err != -EINVAL)
  1157					return err;
  1158			}
  1159	
  1160			/* test for vma->size expansion to min page size */
  1161			err = misaligned_case(vm, mr, addr, PAGE_SIZE, flags);
  1162			if (min_alignment > hole_size) {
  1163				if (!err)
  1164					err = -EBADSLT;
  1165				else if (err == -ENOSPC)
  1166					err = 0;
  1167			}
  1168			if (err)
  1169				return err;
  1170	
  1171			/* test for intermediate size not expanding vma->size for large alignments */
  1172			err = misaligned_case(vm, mr, addr, size / 2, flags);
  1173			if (min_alignment > hole_size) {
  1174				if (!err)
  1175					err = -EBADSLT;
  1176				else if (err == -ENOSPC)
  1177					err = 0;
  1178			}
  1179			if (err)
  1180				return err;
  1181		}
  1182	
  1183		return 0;
  1184	}
  1185	

---
0-DAY CI Kernel Test Service, Intel Corporation
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