Re: [PATCH v2 07/30] s390/pci: externalize the SIC operation controls and routine

[Claudio Imbrenda <imbrenda@linux.ibm.com>]

On Fri, 14 Jan 2022 15:31:22 -0500
Matthew Rosato <mjrosato@linux.ibm.com> wrote:

> A subsequent patch will be issuing SIC from KVM -- export the necessary
> routine and make the operation control definitions available from a header.
> Because the routine will now be exported, let's rename __zpci_set_irq_ctrl
> to zpci_set_irq_ctrl and get rid of the zero'd iib wrapper function of
> the same name.
> 
> Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com>

Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>

> ---
>  arch/s390/include/asm/pci_insn.h | 17 +++++++++--------
>  arch/s390/pci/pci_insn.c         |  3 ++-
>  arch/s390/pci/pci_irq.c          | 26 ++++++++++++--------------
>  3 files changed, 23 insertions(+), 23 deletions(-)
> 
> diff --git a/arch/s390/include/asm/pci_insn.h b/arch/s390/include/asm/pci_insn.h
> index 61cf9531f68f..5331082fa516 100644
> --- a/arch/s390/include/asm/pci_insn.h
> +++ b/arch/s390/include/asm/pci_insn.h
> @@ -98,6 +98,14 @@ struct zpci_fib {
>  	u32 gd;
>  } __packed __aligned(8);
>  
> +/* Set Interruption Controls Operation Controls  */
> +#define	SIC_IRQ_MODE_ALL		0
> +#define	SIC_IRQ_MODE_SINGLE		1
> +#define	SIC_IRQ_MODE_DIRECT		4
> +#define	SIC_IRQ_MODE_D_ALL		16
> +#define	SIC_IRQ_MODE_D_SINGLE		17
> +#define	SIC_IRQ_MODE_SET_CPU		18
> +
>  /* directed interruption information block */
>  struct zpci_diib {
>  	u32 : 1;
> @@ -134,13 +142,6 @@ int __zpci_store(u64 data, u64 req, u64 offset);
>  int zpci_store(const volatile void __iomem *addr, u64 data, unsigned long len);
>  int __zpci_store_block(const u64 *data, u64 req, u64 offset);
>  void zpci_barrier(void);
> -int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib);
> -
> -static inline int zpci_set_irq_ctrl(u16 ctl, u8 isc)
> -{
> -	union zpci_sic_iib iib = {{0}};
> -
> -	return __zpci_set_irq_ctrl(ctl, isc, &iib);
> -}
> +int zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib);
>  
>  #endif
> diff --git a/arch/s390/pci/pci_insn.c b/arch/s390/pci/pci_insn.c
> index 4dd58b196cea..2a47b3936e44 100644
> --- a/arch/s390/pci/pci_insn.c
> +++ b/arch/s390/pci/pci_insn.c
> @@ -97,7 +97,7 @@ int zpci_refresh_trans(u64 fn, u64 addr, u64 range)
>  }
>  
>  /* Set Interruption Controls */
> -int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
> +int zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
>  {
>  	if (!test_facility(72))
>  		return -EIO;
> @@ -108,6 +108,7 @@ int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
>  
>  	return 0;
>  }
> +EXPORT_SYMBOL_GPL(zpci_set_irq_ctrl);
>  
>  /* PCI Load */
>  static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status)
> diff --git a/arch/s390/pci/pci_irq.c b/arch/s390/pci/pci_irq.c
> index 0d0a02a9fbbf..2f675355fd0c 100644
> --- a/arch/s390/pci/pci_irq.c
> +++ b/arch/s390/pci/pci_irq.c
> @@ -15,13 +15,6 @@
>  
>  static enum {FLOATING, DIRECTED} irq_delivery;
>  
> -#define	SIC_IRQ_MODE_ALL		0
> -#define	SIC_IRQ_MODE_SINGLE		1
> -#define	SIC_IRQ_MODE_DIRECT		4
> -#define	SIC_IRQ_MODE_D_ALL		16
> -#define	SIC_IRQ_MODE_D_SINGLE		17
> -#define	SIC_IRQ_MODE_SET_CPU		18
> -
>  /*
>   * summary bit vector
>   * FLOATING - summary bit per function
> @@ -154,6 +147,7 @@ static struct irq_chip zpci_irq_chip = {
>  static void zpci_handle_cpu_local_irq(bool rescan)
>  {
>  	struct airq_iv *dibv = zpci_ibv[smp_processor_id()];
> +	union zpci_sic_iib iib = {{0}};
>  	unsigned long bit;
>  	int irqs_on = 0;
>  
> @@ -165,7 +159,7 @@ static void zpci_handle_cpu_local_irq(bool rescan)
>  				/* End of second scan with interrupts on. */
>  				break;
>  			/* First scan complete, reenable interrupts. */
> -			if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC))
> +			if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &iib))
>  				break;
>  			bit = 0;
>  			continue;
> @@ -193,6 +187,7 @@ static void zpci_handle_remote_irq(void *data)
>  static void zpci_handle_fallback_irq(void)
>  {
>  	struct cpu_irq_data *cpu_data;
> +	union zpci_sic_iib iib = {{0}};
>  	unsigned long cpu;
>  	int irqs_on = 0;
>  
> @@ -203,7 +198,7 @@ static void zpci_handle_fallback_irq(void)
>  				/* End of second scan with interrupts on. */
>  				break;
>  			/* First scan complete, reenable interrupts. */
> -			if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
> +			if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib))
>  				break;
>  			cpu = 0;
>  			continue;
> @@ -234,6 +229,7 @@ static void zpci_directed_irq_handler(struct airq_struct *airq,
>  static void zpci_floating_irq_handler(struct airq_struct *airq,
>  				      struct tpi_info *tpi_info)
>  {
> +	union zpci_sic_iib iib = {{0}};
>  	unsigned long si, ai;
>  	struct airq_iv *aibv;
>  	int irqs_on = 0;
> @@ -247,7 +243,7 @@ static void zpci_floating_irq_handler(struct airq_struct *airq,
>  				/* End of second scan with interrupts on. */
>  				break;
>  			/* First scan complete, reenable interrupts. */
> -			if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
> +			if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib))
>  				break;
>  			si = 0;
>  			continue;
> @@ -407,11 +403,12 @@ static struct airq_struct zpci_airq = {
>  static void __init cpu_enable_directed_irq(void *unused)
>  {
>  	union zpci_sic_iib iib = {{0}};
> +	union zpci_sic_iib ziib = {{0}};
>  
>  	iib.cdiib.dibv_addr = (u64) zpci_ibv[smp_processor_id()]->vector;
>  
> -	__zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib);
> -	zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC);
> +	zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib);
> +	zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &ziib);
>  }
>  
>  static int __init zpci_directed_irq_init(void)
> @@ -426,7 +423,7 @@ static int __init zpci_directed_irq_init(void)
>  	iib.diib.isc = PCI_ISC;
>  	iib.diib.nr_cpus = num_possible_cpus();
>  	iib.diib.disb_addr = virt_to_phys(zpci_sbv->vector);
> -	__zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib);
> +	zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib);
>  
>  	zpci_ibv = kcalloc(num_possible_cpus(), sizeof(*zpci_ibv),
>  			   GFP_KERNEL);
> @@ -471,6 +468,7 @@ static int __init zpci_floating_irq_init(void)
>  
>  int __init zpci_irq_init(void)
>  {
> +	union zpci_sic_iib iib = {{0}};
>  	int rc;
>  
>  	irq_delivery = sclp.has_dirq ? DIRECTED : FLOATING;
> @@ -502,7 +500,7 @@ int __init zpci_irq_init(void)
>  	 * Enable floating IRQs (with suppression after one IRQ). When using
>  	 * directed IRQs this enables the fallback path.
>  	 */
> -	zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC);
> +	zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib);
>  
>  	return 0;
>  out_airq: