diff for duplicates of <20220126114452.692512-8-apatel@ventanamicro.com> diff --git a/a/1.txt b/N1/1.txt index fdd6ffd..26e38e5 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -220,7 +220,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + #size-cells = <0>; + #address-cells = <1>; + -+ cpu at 0 { ++ cpu@0 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x0>; @@ -236,7 +236,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 1 { ++ cpu@1 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x1>; @@ -252,7 +252,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 10 { ++ cpu@10 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x10>; @@ -268,7 +268,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 11 { ++ cpu@11 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x11>; diff --git a/a/content_digest b/N1/content_digest index 67ded12..34f5e5e 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,7 +2,27 @@ "From\0Anup Patel <apatel@ventanamicro.com>\0" "Subject\0[PATCH v10 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states\0" "Date\0Wed, 26 Jan 2022 17:14:51 +0530\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Daniel Lezcano <daniel.lezcano@linaro.org> + Ulf Hansson <ulf.hansson@linaro.org> + Rafael J . Wysocki <rjw@rjwysocki.net> + Pavel Machek <pavel@ucw.cz> + " Rob Herring <robh+dt@kernel.org>\0" + "Cc\0Sandeep Tripathy <milun.tripathy@gmail.com>" + Atish Patra <atishp@atishpatra.org> + Alistair Francis <Alistair.Francis@wdc.com> + Liush <liush@allwinnertech.com> + Anup Patel <anup@brainfault.org> + devicetree@vger.kernel.org + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + linux-pm@vger.kernel.org + linux-arm-kernel@lists.infradead.org + kvm-riscv@lists.infradead.org + Anup Patel <apatel@ventanamicro.com> + " Rob Herring <robh@kernel.org>\0" "\00:1\0" "b\0" "From: Anup Patel <anup.patel@wdc.com>\n" @@ -227,7 +247,7 @@ "+ #size-cells = <0>;\n" "+ #address-cells = <1>;\n" "+\n" - "+ cpu at 0 {\n" + "+ cpu@0 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x0>;\n" @@ -243,7 +263,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 1 {\n" + "+ cpu@1 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x1>;\n" @@ -259,7 +279,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 10 {\n" + "+ cpu@10 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x10>;\n" @@ -275,7 +295,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 11 {\n" + "+ cpu@11 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x11>;\n" @@ -387,4 +407,4 @@ "-- \n" 2.25.1 -7408b1ff7775adce7b4f2793c61771b8519b7cca2dcf2d167c1fab8fa698be09 +e5b3e16097296e002f03217734219688fb7dddf752378aa87a530c5c5406bd98
diff --git a/a/1.txt b/N2/1.txt index fdd6ffd..eca83f2 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -220,7 +220,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + #size-cells = <0>; + #address-cells = <1>; + -+ cpu at 0 { ++ cpu@0 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x0>; @@ -236,7 +236,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 1 { ++ cpu@1 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x1>; @@ -252,7 +252,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 10 { ++ cpu@10 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x10>; @@ -268,7 +268,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 11 { ++ cpu@11 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x11>; @@ -379,3 +379,9 @@ index aa5fb64d57eb..f62f646bc695 100644 - interrupt-controller -- 2.25.1 + + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N2/content_digest index 67ded12..ef91bff 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,7 +2,27 @@ "From\0Anup Patel <apatel@ventanamicro.com>\0" "Subject\0[PATCH v10 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states\0" "Date\0Wed, 26 Jan 2022 17:14:51 +0530\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Daniel Lezcano <daniel.lezcano@linaro.org> + Ulf Hansson <ulf.hansson@linaro.org> + Rafael J . Wysocki <rjw@rjwysocki.net> + Pavel Machek <pavel@ucw.cz> + " Rob Herring <robh+dt@kernel.org>\0" + "Cc\0Sandeep Tripathy <milun.tripathy@gmail.com>" + Atish Patra <atishp@atishpatra.org> + Alistair Francis <Alistair.Francis@wdc.com> + Liush <liush@allwinnertech.com> + Anup Patel <anup@brainfault.org> + devicetree@vger.kernel.org + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + linux-pm@vger.kernel.org + linux-arm-kernel@lists.infradead.org + kvm-riscv@lists.infradead.org + Anup Patel <apatel@ventanamicro.com> + " Rob Herring <robh@kernel.org>\0" "\00:1\0" "b\0" "From: Anup Patel <anup.patel@wdc.com>\n" @@ -227,7 +247,7 @@ "+ #size-cells = <0>;\n" "+ #address-cells = <1>;\n" "+\n" - "+ cpu at 0 {\n" + "+ cpu@0 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x0>;\n" @@ -243,7 +263,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 1 {\n" + "+ cpu@1 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x1>;\n" @@ -259,7 +279,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 10 {\n" + "+ cpu@10 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x10>;\n" @@ -275,7 +295,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 11 {\n" + "+ cpu@11 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x11>;\n" @@ -385,6 +405,12 @@ " - riscv,isa\n" " - interrupt-controller\n" "-- \n" - 2.25.1 + "2.25.1\n" + "\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -7408b1ff7775adce7b4f2793c61771b8519b7cca2dcf2d167c1fab8fa698be09 +9249a1501af8dad056ade856030b7d0ab6b104c098738943a6f1fba8f05236f9
diff --git a/a/1.txt b/N3/1.txt index fdd6ffd..1556b29 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -220,7 +220,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + #size-cells = <0>; + #address-cells = <1>; + -+ cpu at 0 { ++ cpu@0 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x0>; @@ -236,7 +236,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 1 { ++ cpu@1 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x1>; @@ -252,7 +252,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 10 { ++ cpu@10 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x10>; @@ -268,7 +268,7 @@ index 52bce5dbb11f..95506ffb816c 100644 + }; + }; + -+ cpu at 11 { ++ cpu@11 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x11>; @@ -379,3 +379,9 @@ index aa5fb64d57eb..f62f646bc695 100644 - interrupt-controller -- 2.25.1 + + +_______________________________________________ +linux-arm-kernel mailing list +linux-arm-kernel@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N3/content_digest index 67ded12..028018d 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -2,7 +2,27 @@ "From\0Anup Patel <apatel@ventanamicro.com>\0" "Subject\0[PATCH v10 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states\0" "Date\0Wed, 26 Jan 2022 17:14:51 +0530\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Daniel Lezcano <daniel.lezcano@linaro.org> + Ulf Hansson <ulf.hansson@linaro.org> + Rafael J . Wysocki <rjw@rjwysocki.net> + Pavel Machek <pavel@ucw.cz> + " Rob Herring <robh+dt@kernel.org>\0" + "Cc\0Sandeep Tripathy <milun.tripathy@gmail.com>" + Atish Patra <atishp@atishpatra.org> + Alistair Francis <Alistair.Francis@wdc.com> + Liush <liush@allwinnertech.com> + Anup Patel <anup@brainfault.org> + devicetree@vger.kernel.org + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + linux-pm@vger.kernel.org + linux-arm-kernel@lists.infradead.org + kvm-riscv@lists.infradead.org + Anup Patel <apatel@ventanamicro.com> + " Rob Herring <robh@kernel.org>\0" "\00:1\0" "b\0" "From: Anup Patel <anup.patel@wdc.com>\n" @@ -227,7 +247,7 @@ "+ #size-cells = <0>;\n" "+ #address-cells = <1>;\n" "+\n" - "+ cpu at 0 {\n" + "+ cpu@0 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x0>;\n" @@ -243,7 +263,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 1 {\n" + "+ cpu@1 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x1>;\n" @@ -259,7 +279,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 10 {\n" + "+ cpu@10 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x10>;\n" @@ -275,7 +295,7 @@ "+ };\n" "+ };\n" "+\n" - "+ cpu at 11 {\n" + "+ cpu@11 {\n" "+ device_type = \"cpu\";\n" "+ compatible = \"riscv\";\n" "+ reg = <0x11>;\n" @@ -385,6 +405,12 @@ " - riscv,isa\n" " - interrupt-controller\n" "-- \n" - 2.25.1 + "2.25.1\n" + "\n" + "\n" + "_______________________________________________\n" + "linux-arm-kernel mailing list\n" + "linux-arm-kernel@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -7408b1ff7775adce7b4f2793c61771b8519b7cca2dcf2d167c1fab8fa698be09 +2afe40192459f02e483983c994073a747561701a316855b81ac5dd7c0b4751ff
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.