From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EEC3C433EF for ; Sat, 29 Jan 2022 08:14:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352647AbiA2IOn (ORCPT ); Sat, 29 Jan 2022 03:14:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352530AbiA2IMt (ORCPT ); Sat, 29 Jan 2022 03:12:49 -0500 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A97DAC061760 for ; Sat, 29 Jan 2022 00:10:17 -0800 (PST) Received: by mail-pj1-x1049.google.com with SMTP id k2-20020a17090a658200b001b399622095so5229276pjj.9 for ; Sat, 29 Jan 2022 00:10:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc:content-transfer-encoding; bh=zbqkm05jE2EvduAYfMvSD5unoQX1UTOmXgZuATn0wjE=; b=ET75XovDLxlqFeVLUP91KU89GnRGe2exmuB4OQmhnKEHPa4y6kF2Haa8Z5bB4pUbEE UtV+czCk/+F31ppAir4zwDgxhJc6S9K91bqcJd8XQ8dAntlyDpoXFi6EE/FWZK9LI7Ib +fWPBUGfVB/UbfAgXEEmT/AesRdoPGRa33tDlG8ldzTVF/XvFL3+LX8DRQ8Pg+H7fAae qscjNdVPHQHDh9wYVsBnkTq3jQxpRRPM4+tfQfuwgNxvX4sFBTR39OPlWjiG/vNQrRFF RfUJZybe8oXcr91MViJLFWaMDqNCpmxG2PqDkwqYJvAuaztNKAGGWO9i+WM7Sh5V0vch EWHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc:content-transfer-encoding; bh=zbqkm05jE2EvduAYfMvSD5unoQX1UTOmXgZuATn0wjE=; b=fmgjsehjG6atPMDyQDLGsFVl/sQ5l5aBhiQ4ojwn5a9VS2IhEdWjB8EWriWRSZlFUT GldTqeXFhSztW8xfJCEKMhOr6n/qN1z+GuoypVrnk3NT1rthDqp1RTJroRDADmEYZdIA rV4N9uE1z4ANi7awwt+rP0YEcDYwrBYHhW9eIEkqiJUxTl6Ie0cZqI8X/vX+em3ZKbGP ELV2JJhOrYFpoXbr434Lr1e2Dc56d2+HZzGptnHSqfdnljxkiPlzhpWff0jAD+KmSt+G UoUDoOKroiJp96kcLvTWdnifa0bu7TZ19mZ4GYkmMIjcxhFIceggnTA+gJaks41Rs6JP QIqQ== X-Gm-Message-State: AOAM531wtmuoLi9ArVIYiXPwRsLQunwFbQoI6PQcg/p1+axGNb4AK1yQ MEd39Udgixw2tK8gMODPM6x4h2CPJ0qC X-Google-Smtp-Source: ABdhPJxzURBaUdH42qyNVK3Y3SP2dPxRhYYXnIfkWnTLeuyxsLvmnnRLljh2wJr36CnUPoNRnCpc6PrnYo6H X-Received: from irogers.svl.corp.google.com ([2620:15c:2cd:202:e8ae:7315:2a3d:98f2]) (user=irogers job=sendgmr) by 2002:a17:90b:4b4b:: with SMTP id mi11mr23587628pjb.103.1643443817118; Sat, 29 Jan 2022 00:10:17 -0800 (PST) Date: Sat, 29 Jan 2022 00:09:21 -0800 In-Reply-To: <20220129080929.837293-1-irogers@google.com> Message-Id: <20220129080929.837293-19-irogers@google.com> Mime-Version: 1.0 References: <20220129080929.837293-1-irogers@google.com> X-Mailer: git-send-email 2.35.0.rc2.247.g8bbb082509-goog Subject: [PATCH 18/26] perf vendor events: Update Knights Landing From: Ian Rogers To: Kan Liang , Zhengjun Xing , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Maxime Coquelin , Alexandre Torgue , Andi Kleen , James Clark , John Garry , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: Stephane Eranian , Ian Rogers Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Events are still at version 9: https://download.01.org/perfmon/KNL Json files generated by the latest code at: https://github.com/intel/event-converter-for-linux-perf The addition of a floating-point.json is due to events having their topic better identified by the converter script. Tested: Not tested on a Knights Landing, on a SkylakeX: ... 9: Parse perf pmu format : Ok 10: PMU events : 10.1: PMU event table sanity : Ok 10.2: PMU event map aliases : Ok 10.3: Parsing of PMU event table metrics : Ok 10.4: Parsing of PMU event table metrics with fake PMUs : Ok ... Signed-off-by: Ian Rogers --- .../arch/x86/knightslanding/cache.json | 2602 ++++++++--------- .../x86/knightslanding/floating-point.json | 29 + .../arch/x86/knightslanding/frontend.json | 48 +- .../arch/x86/knightslanding/memory.json | 1226 ++++---- .../arch/x86/knightslanding/pipeline.json | 465 ++- .../x86/knightslanding/virtual-memory.json | 68 +- 6 files changed, 2217 insertions(+), 2221 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/knightslanding/floating-= point.json diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/cache.json b/too= ls/perf/pmu-events/arch/x86/knightslanding/cache.json index e847b0fd696d..1bd50b186e93 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/cache.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/cache.json @@ -1,2305 +1,2303 @@ [ { - "EventCode": "0x30", + "BriefDescription": "Counts the number of MEC requests that were n= ot accepted into the L2Q because of any L2 queue reject condition. There i= s no concept of at-ret here. It might include requests due to instructions = in the speculative path.", "Counter": "0,1", - "UMask": "0x0", - "EventName": "L2_REQUESTS_REJECT.ALL", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of MEC requests from the L2= Q that reference a cache line (cacheable requests) exlcuding SW prefetches = filling only to L2 cache and L1 evictions (automatically exlcudes L2HWP, UC= , WC) that were rejected - Multiple repeated rejects should be counted mult= iple times" - }, - { "EventCode": "0x31", - "Counter": "0,1", - "UMask": "0x0", "EventName": "CORE_REJECT_L2Q.ALL", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of MEC requests that were n= ot accepted into the L2Q because of any L2 queue reject condition. There i= s no concept of at-ret here. It might include requests due to instructions = in the speculative path." + "SampleAfterValue": "200003" }, { - "EventCode": "0x2E", + "BriefDescription": "Counts the number of core cycles the fetch st= alls because of an icache miss. This is a cummulative count of core cycles = the fetch stalled for all icache misses.", "Counter": "0,1", - "UMask": "0x4f", - "EventName": "L2_REQUESTS.REFERENCE", + "EventCode": "0x86", + "EventName": "FETCH_STALL.ICACHE_FILL_PENDING_CYCLES", + "PublicDescription": "This event counts the number of core cycles = the fetch stalls because of an icache miss. This is a cumulative count of c= ycles the NIP stalled for all icache misses.", "SampleAfterValue": "200003", - "BriefDescription": "Counts the total number of L2 cache reference= s." + "UMask": "0x4" }, { - "EventCode": "0x2E", + "BriefDescription": "Counts the number of L2 cache misses", "Counter": "0,1", - "UMask": "0x41", + "EventCode": "0x2E", "EventName": "L2_REQUESTS.MISS", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of L2 cache misses" + "UMask": "0x41" }, { - "PublicDescription": "This event counts the number of core cycles = the fetch stalls because of an icache miss. This is a cumulative count of c= ycles the NIP stalled for all icache misses.", - "EventCode": "0x86", + "BriefDescription": "Counts the total number of L2 cache reference= s.", "Counter": "0,1", - "UMask": "0x4", - "EventName": "FETCH_STALL.ICACHE_FILL_PENDING_CYCLES", + "EventCode": "0x2E", + "EventName": "L2_REQUESTS.REFERENCE", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of core cycles the fetch st= alls because of an icache miss. This is a cummulative count of core cycles = the fetch stalled for all icache misses." + "UMask": "0x4f" }, { - "PublicDescription": "This event counts the number of load micro-o= ps retired that miss in L1 Data cache. Note that prefetch misses will not b= e counted.", - "EventCode": "0x04", + "BriefDescription": "Counts the number of MEC requests from the L2= Q that reference a cache line (cacheable requests) exlcuding SW prefetches = filling only to L2 cache and L1 evictions (automatically exlcudes L2HWP, UC= , WC) that were rejected - Multiple repeated rejects should be counted mult= iple times", "Counter": "0,1", - "UMask": "0x1", - "EventName": "MEM_UOPS_RETIRED.L1_MISS_LOADS", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of load micro-ops retired t= hat miss in L1 D cache" + "EventCode": "0x30", + "EventName": "L2_REQUESTS_REJECT.ALL", + "SampleAfterValue": "200003" }, { - "PEBS": "1", - "EventCode": "0x04", + "BriefDescription": "Counts all the load micro-ops retired", "Counter": "0,1", - "UMask": "0x2", - "EventName": "MEM_UOPS_RETIRED.L2_HIT_LOADS", + "EventCode": "0x04", + "EventName": "MEM_UOPS_RETIRED.ALL_LOADS", + "PublicDescription": "This event counts the number of load micro-o= ps retired.", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of load micro-ops retired t= hat hit in the L2", - "Data_LA": "1" + "UMask": "0x40" }, { - "PEBS": "1", - "EventCode": "0x04", + "BriefDescription": "Counts all the store micro-ops retired", "Counter": "0,1", - "UMask": "0x4", - "EventName": "MEM_UOPS_RETIRED.L2_MISS_LOADS", - "SampleAfterValue": "100007", - "BriefDescription": "Counts the number of load micro-ops retired t= hat miss in the L2", - "Data_LA": "1" - }, - { "EventCode": "0x04", - "Counter": "0,1", - "UMask": "0x10", - "EventName": "MEM_UOPS_RETIRED.UTLB_MISS_LOADS", + "EventName": "MEM_UOPS_RETIRED.ALL_STORES", + "PublicDescription": "This event counts the number of store micro-= ops retired.", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of load micro-ops retired t= hat caused micro TLB miss" + "UMask": "0x80" }, { - "PEBS": "1", - "EventCode": "0x04", + "BriefDescription": "Counts the loads retired that get the data fr= om the other core in the same tile in M state", "Counter": "0,1", - "UMask": "0x20", + "Data_LA": "1", + "EventCode": "0x04", "EventName": "MEM_UOPS_RETIRED.HITM", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the loads retired that get the data fr= om the other core in the same tile in M state", - "Data_LA": "1" + "UMask": "0x20" }, { - "PublicDescription": "This event counts the number of load micro-o= ps retired.", - "EventCode": "0x04", + "BriefDescription": "Counts the number of load micro-ops retired t= hat miss in L1 D cache", "Counter": "0,1", - "UMask": "0x40", - "EventName": "MEM_UOPS_RETIRED.ALL_LOADS", + "EventCode": "0x04", + "EventName": "MEM_UOPS_RETIRED.L1_MISS_LOADS", + "PublicDescription": "This event counts the number of load micro-o= ps retired that miss in L1 Data cache. Note that prefetch misses will not b= e counted.", "SampleAfterValue": "200003", - "BriefDescription": "Counts all the load micro-ops retired" + "UMask": "0x1" }, { - "PublicDescription": "This event counts the number of store micro-= ops retired.", - "EventCode": "0x04", + "BriefDescription": "Counts the number of load micro-ops retired t= hat hit in the L2", "Counter": "0,1", - "UMask": "0x80", - "EventName": "MEM_UOPS_RETIRED.ALL_STORES", + "Data_LA": "1", + "EventCode": "0x04", + "EventName": "MEM_UOPS_RETIRED.L2_HIT_LOADS", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts all the store micro-ops retired" + "UMask": "0x2" }, { - "EventCode": "0xB7", + "BriefDescription": "Counts the number of load micro-ops retired t= hat miss in the L2", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE", + "Data_LA": "1", + "EventCode": "0x04", + "EventName": "MEM_UOPS_RETIRED.L2_MISS_LOADS", + "PEBS": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts the matrix events specified by MSR_OFF= CORE_RESPx" + "UMask": "0x4" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000070", + "BriefDescription": "Counts the number of load micro-ops retired t= hat caused micro TLB miss", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.OUTSTANDING", - "MSRIndex": "0x1a6", - "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that are outstan= ding, per weighted cycle, from the time of the request to when any response= is received. The oustanding response should be programmed only on PMC0.", - "Offcore": "1" + "EventCode": "0x04", + "EventName": "MEM_UOPS_RETIRED.UTLB_MISS_LOADS", + "SampleAfterValue": "200003", + "UMask": "0x10" }, { + "BriefDescription": "Counts the matrix events specified by MSR_OFF= CORE_RESPx", + "Counter": "0,1", "EventCode": "0xB7", - "MSRValue": "0x1000400070", + "EventName": "OFFCORE_RESPONSE", + "SampleAfterValue": "100007", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400070", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for reponses from snoop request hit with data fo= rwarded from it Far(not in the same quadrant as the request)-other tile L2 = in E/F/M state. Valid only in SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800400044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in E/F state. Valid onl= y for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080070", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from a snoop request hit with data= forwarded from its Far(not in the same quadrant as the request)-other tile= 's L2 in E/F state. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080070", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from a snoop request hit with data= forwarded from its Far(not in the same quadrant as the request)-other tile= 's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010070", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for reponses from snoop request hit with data fo= rwarded from its Near-other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x40000032f7", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from a snoop request hit with data= forwarded from its Near-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.OUTSTANDING", - "MSRIndex": "0x1a6", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_NEAR_TILE_E_F", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that are outstanding= , per weighted cycle, from the time of the request to when any response is = received. The oustanding response should be programmed only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x10004032f7", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from a snoop request hit with data= forwarded from its Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses from a snoop request hit with data forwarded from its Far(not in th= e same quadrant as the request)-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x08004032f7", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses which hit its own tile's L2 with d= ata in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses from a snoop request hit with data forwarded from its Far(not in th= e same quadrant as the request)-other tile's L2 in E/F state. Valid only fo= r SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x10000832f7", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses which hit its own tile's L2 with d= ata in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses from a snoop request hit with data forwarded from its Near-other ti= le's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x08000832f7", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses which hit its own tile's L2 with d= ata in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses from a snoop request hit with data forwarded from its Near-other ti= le's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x00000132f7", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses which hit its own tile's L2 with d= ata in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for an= y response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000044", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that are outstanding, per weighted cycle, from the time of the= request to when any response is received. The oustanding response should b= e programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", + "EventCode": "0xB7", "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.OUTSTANDING", "MSRIndex": "0x1a6", + "MSRValue": "0x4000000044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that are outstanding, per weighted cycle, from the time of the= request to when any response is received. The oustanding response should b= e programmed only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000013091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from a snoop request hit with data= forwarded from its Far(not in the same quadrant as the request)-other tile= 's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for reponses from snoop request hit with = data forwarded from it Far(not in the same quadrant as the request)-other t= ile L2 in E/F/M state. Valid only in SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800403091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from a snoop request hit with data= forwarded from its Far(not in the same quadrant as the request)-other tile= 's L2 in E/F state. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from a snoop request hit wi= th data forwarded from its Far(not in the same quadrant as the request)-oth= er tile's L2 in E/F state. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800403091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from a snoop request hit with data= forwarded from its Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from a snoop request hit wi= th data forwarded from its Far(not in the same quadrant as the request)-oth= er tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000403091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from a snoop request hit with data= forwarded from its Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for reponses from snoop request hit with = data forwarded from its Near-other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800183091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000022", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from a snoop request hit wi= th data forwarded from its Near-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.OUTSTANDING", - "MSRIndex": "0x1a6", - "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that are outstanding, per weighted cycle, from the time of the request to w= hen any response is received. The oustanding response should be programmed = only on PMC0.", - "Offcore": "1" - }, - { "EventCode": "0xB7", - "MSRValue": "0x1000400022", - "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_FAR_TILE_M", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_NEAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800083091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from a snoop request hit with data forwarded fr= om its Far(not in the same quadrant as the request)-other tile's L2 in M st= ate.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400022", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from a snoop request hit wi= th data forwarded from its Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000083091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from a snoop request hit with data forwarded fr= om its Far(not in the same quadrant as the request)-other tile's L2 in E/F = state. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080022", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses which hit its own tile's L2= with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004003091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from a snoop request hit with data forwarded fr= om its Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080022", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses which hit its own tile's L2= with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010003091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from a snoop request hit with data forwarded fr= om its Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010022", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses which hit its own tile's L2= with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002003091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses which hit its own tile's L2= with data in S state", + "Counter": "0,1", "EventCode": "0xB7", - "MSRValue": "0x4000003091", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_THIS_TILE_S", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008003091", + "Offcore": "1", + "SampleAfterValue": "100007", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that are outstanding, per weighted cycle, from the time= of the request to when any response is received. The oustanding response s= hould be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", + "EventCode": "0xB7", "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.OUTSTANDING", "MSRIndex": "0x1a6", + "MSRValue": "0x4000003091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that are outstanding, per weighted cycle, from the time= of the request to when any response is received. The oustanding response s= hould be programmed only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000403091", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from a snoop request hit wi= th data forwarded from its Far(not in the same quadrant as the request)-oth= er tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800403091", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r reponses from snoop request hit with data forwarded from it Far(not in th= e same quadrant as the request)-other tile L2 in E/F/M state. Valid only in= SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800400070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from a snoop request hit wi= th data forwarded from its Far(not in the same quadrant as the request)-oth= er tile's L2 in E/F state. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000083091", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in E/F state. Valid onl= y for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from a snoop request hit wi= th data forwarded from its Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800083091", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from a snoop request hit wi= th data forwarded from its Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000013091", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r reponses from snoop request hit with data forwarded from its Near-other t= ile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000008000", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.OUTSTANDING", - "MSRIndex": "0x1a6", - "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that are outstanding, per = weighted cycle, from the time of the request to when any response is receiv= ed. The oustanding response should be programmed only on PMC0.", - "Offcore": "1" - }, - { "EventCode": "0xB7", - "MSRValue": "0x1000408000", - "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_FAR_TILE_M", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_NEAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s from a snoop request hit with data forwarded from its Far(not in the same= quadrant as the request)-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800408000", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s from a snoop request hit with data forwarded from its Far(not in the same= quadrant as the request)-other tile's L2 in E/F state. Valid only for SNC4= cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000088000", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses which hit its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s from a snoop request hit with data forwarded from its Near-other tile's L= 2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800088000", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses which hit its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s from a snoop request hit with data forwarded from its Near-other tile's L= 2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000018000", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses which hit its own tile's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for any resp= onse", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000014800", + "BriefDescription": "Counts any Prefetch requests that are outstan= ding, per weighted cycle, from the time of the request to when any response= is received. The oustanding response should be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.STREAMING_STORES.ANY_RESPONSE", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000000070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts all streaming stores (WC and should be= programmed on PMC1) that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000014000", + "BriefDescription": "Counts any Read request that accounts for an= y response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_STREAMING_STORES.ANY_RESPON= SE", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00000132f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial streaming stores (WC and shoul= d be programmed on PMC1) that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000002000", + "BriefDescription": "Counts any Read request that accounts for re= ponses from snoop request hit with data forwarded from it Far(not in the sa= me quadrant as the request)-other tile L2 in E/F/M state. Valid only in SNC= 4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.OUTSTANDING", - "MSRIndex": "0x1a6", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_FAR_TILE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x18004032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that are outstan= ding, per weighted cycle, from the time of the request to when any response= is received. The oustanding response should be programmed only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000402000", + "BriefDescription": "Counts any Read request that accounts for re= sponses from a snoop request hit with data forwarded from its Far(not in th= e same quadrant as the request)-other tile's L2 in E/F state. Valid only fo= r SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x08004032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800402000", + "BriefDescription": "Counts any Read request that accounts for re= sponses from a snoop request hit with data forwarded from its Far(not in th= e same quadrant as the request)-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10004032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in E/F state. Valid onl= y for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000082000", + "BriefDescription": "Counts any Read request that accounts for re= ponses from snoop request hit with data forwarded from its Near-other tile = L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x18001832f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800082000", + "BriefDescription": "Counts any Read request that accounts for re= sponses from a snoop request hit with data forwarded from its Near-other ti= le's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_NEAR_TILE_E_F"= , + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_NEAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x08000832f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000012000", + "BriefDescription": "Counts any Read request that accounts for re= sponses from a snoop request hit with data forwarded from its Near-other ti= le's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10000832f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000001000", + "BriefDescription": "Counts any Read request that accounts for re= sponses which hit its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.OUTSTANDING", - "MSRIndex": "0x1a6", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_THIS_TILE_E", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00040032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that are outstandi= ng, per weighted cycle, from the time of the request to when any response i= s received. The oustanding response should be programmed only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000401000", + "BriefDescription": "Counts any Read request that accounts for re= sponses which hit its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00100032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses from a snoop request hit with data forwarded from its Far(not in = the same quadrant as the request)-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800401000", + "BriefDescription": "Counts any Read request that accounts for re= sponses which hit its own tile's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00020032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses from a snoop request hit with data forwarded from its Far(not in = the same quadrant as the request)-other tile's L2 in E/F state. Valid only = for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000081000", + "BriefDescription": "Counts any Read request that accounts for re= sponses which hit its own tile's L2 with data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00080032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses from a snoop request hit with data forwarded from its Near-other = tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800081000", + "BriefDescription": "Counts any Read request that are outstanding= , per weighted cycle, from the time of the request to when any response is = received. The oustanding response should be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_NEAR_TILE_E_F", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x40000032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses from a snoop request hit with data forwarded from its Near-other = tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000011000", + "BriefDescription": "Counts any request that accounts for any resp= onse", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000018000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010800", + "BriefDescription": "Counts any request that accounts for reponses= from snoop request hit with data forwarded from it Far(not in the same qua= drant as the request)-other tile L2 in E/F/M state. Valid only in SNC4 Clus= ter mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.FULL_STREAMING_STORES.ANY_RESPONSE"= , + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800408000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Full streaming stores (WC and should b= e programmed on PMC1) that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000400", + "BriefDescription": "Counts any request that accounts for response= s from a snoop request hit with data forwarded from its Far(not in the same= quadrant as the request)-other tile's L2 in E/F state. Valid only for SNC4= cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.OUTSTANDING", - "MSRIndex": "0x1a6", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_FAR_TILE_E_F", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800408000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= are outstanding, per weighted cycle, from the time of the request to when = any response is received. The oustanding response should be programmed only= on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400400", + "BriefDescription": "Counts any request that accounts for response= s from a snoop request hit with data forwarded from its Far(not in the same= quadrant as the request)-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000408000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from a snoop request hit with data forwarded from i= ts Far(not in the same quadrant as the request)-other tile's L2 in M state.= ", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400400", + "BriefDescription": "Counts any request that accounts for reponses= from snoop request hit with data forwarded from its Near-other tile L2 in = E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800188000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from a snoop request hit with data forwarded from i= ts Far(not in the same quadrant as the request)-other tile's L2 in E/F stat= e. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080400", + "BriefDescription": "Counts any request that accounts for response= s from a snoop request hit with data forwarded from its Near-other tile's L= 2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_NEAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800088000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from a snoop request hit with data forwarded from i= ts Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080400", + "BriefDescription": "Counts any request that accounts for response= s from a snoop request hit with data forwarded from its Near-other tile's L= 2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000088000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from a snoop request hit with data forwarded from i= ts Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010400", + "BriefDescription": "Counts any request that accounts for response= s which hit its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004008000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000200", + "BriefDescription": "Counts any request that accounts for response= s which hit its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.OUTSTANDING", - "MSRIndex": "0x1a6", - "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that are outstanding, per weighted cycle, from the time= of the request to when any response is received. The oustanding response s= hould be programmed only on PMC0.", - "Offcore": "1" - }, - { "EventCode": "0xB7", - "MSRValue": "0x1000400200", - "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_FAR_TILE_M", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010008000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from a snoop request hit wi= th data forwarded from its Far(not in the same quadrant as the request)-oth= er tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400200", + "BriefDescription": "Counts any request that accounts for response= s which hit its own tile's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002008000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from a snoop request hit wi= th data forwarded from its Far(not in the same quadrant as the request)-oth= er tile's L2 in E/F state. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080200", + "BriefDescription": "Counts any request that accounts for response= s which hit its own tile's L2 with data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008008000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from a snoop request hit wi= th data forwarded from its Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080200", + "BriefDescription": "Counts any request that are outstanding, per = weighted cycle, from the time of the request to when any response is receiv= ed. The oustanding response should be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_NEAR_TILE_E_F"= , - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000008000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from a snoop request hit wi= th data forwarded from its Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010200", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400100", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for reponses from snoop request hit with data forwarded from = it Far(not in the same quadrant as the request)-other tile L2 in E/F/M stat= e. Valid only in SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_FAR_TILE_M", - "MSRIndex": "0x1a7", - "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from a snoop request= hit with data forwarded from its Far(not in the same quadrant as the reque= st)-other tile's L2 in M state.", - "Offcore": "1" - }, - { "EventCode": "0xB7", - "MSRValue": "0x0800400100", - "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_FAR_TILE_E_F"= , - "MSRIndex": "0x1a7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_FAR_TILE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800400022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from a snoop request= hit with data forwarded from its Far(not in the same quadrant as the reque= st)-other tile's L2 in E/F state. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080100", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from a snoop request hit with data forwarded fr= om its Far(not in the same quadrant as the request)-other tile's L2 in E/F = state. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_NEAR_TILE_M", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_FAR_TILE_E_F", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from a snoop request= hit with data forwarded from its Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080100", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from a snoop request hit with data forwarded fr= om its Far(not in the same quadrant as the request)-other tile's L2 in M st= ate.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_NEAR_TILE_E_F= ", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_FAR_TILE_M", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from a snoop request= hit with data forwarded from its Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010100", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for reponses from snoop request hit with data forwarded from = its Near-other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.ANY_RESPONSE", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_NEAR_TILE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000080", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from a snoop request hit with data forwarded fr= om its Near-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.OUTSTANDING", - "MSRIndex": "0x1a6", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_NEAR_TILE_E_F", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that are outstanding, per weighted cyc= le, from the time of the request to when any response is received. The oust= anding response should be programmed only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400080", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from a snoop request hit with data forwarded fr= om its Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from a sno= op request hit with data forwarded from its Far(not in the same quadrant as= the request)-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400080", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses which hit its own tile's L2 with data in E stat= e", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from a sno= op request hit with data forwarded from its Far(not in the same quadrant as= the request)-other tile's L2 in E/F state. Valid only for SNC4 cluster mod= e.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080080", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses which hit its own tile's L2 with data in F stat= e", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from a sno= op request hit with data forwarded from its Near-other tile's L2 in M state= .", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080080", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses which hit its own tile's L2 with data in M stat= e", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_NEAR_TILE_E_F"= , + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from a sno= op request hit with data forwarded from its Near-other tile's L2 in E/F sta= te.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010080", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses which hit its own tile's L2 with data in S stat= e", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000040", + "BriefDescription": "Counts Demand cacheable data write requests = that are outstanding, per weighted cycle, from the time of the request to w= hen any response is received. The oustanding response should be programmed = only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.OUTSTANDING", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.OUTSTANDING", "MSRIndex": "0x1a6", + "MSRValue": "0x4000000022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that are outstan= ding, per weighted cycle, from the time of the request to when any response= is received. The oustanding response should be programmed only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400040", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400040", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for reponses from snoop request hit with data forwarded from it F= ar(not in the same quadrant as the request)-other tile L2 in E/F/M state. V= alid only in SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800400400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in E/F state. Valid onl= y for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080040", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from a snoop request hit with data forwarded from i= ts Far(not in the same quadrant as the request)-other tile's L2 in E/F stat= e. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080040", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from a snoop request hit with data forwarded from i= ts Far(not in the same quadrant as the request)-other tile's L2 in M state.= ", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_NEAR_TILE_E_F"= , + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010040", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for reponses from snoop request hit with data forwarded from its = Near-other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400020", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from a snoop request hit with data forwarded from i= ts Near-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_NEAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from a snoop request hit with= data forwarded from its Far(not in the same quadrant as the request)-other= tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400020", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from a snoop request hit with data forwarded from i= ts Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from a snoop request hit with= data forwarded from its Far(not in the same quadrant as the request)-other= tile's L2 in E/F state. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080020", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses which hit its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from a snoop request hit with= data forwarded from its Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080020", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses which hit its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from a snoop request hit with= data forwarded from its Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000020020", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses which hit its own tile's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that provides no supplier details", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010020", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses which hit its own tile's L2 with data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000004", + "BriefDescription": "Counts Bus locks and split lock requests that= are outstanding, per weighted cycle, from the time of the request to when = any response is received. The oustanding response should be programmed only= on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.OUTSTANDING", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.OUTSTANDING", "MSRIndex": "0x1a6", + "MSRValue": "0x4000000400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that are outstanding, per weighted cycle, from the time of the request = to when any response is received. The oustanding response should be program= med only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400004", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from a snoop request hit with data forwarde= d from its Far(not in the same quadrant as the request)-other tile's L2 in = M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400004", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for reponses from snoop request hit with data forwarded f= rom it Far(not in the same quadrant as the request)-other tile L2 in E/F/M = state. Valid only in SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_FAR_TILE_E_F"= , + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800400004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from a snoop request hit with data forwarde= d from its Far(not in the same quadrant as the request)-other tile's L2 in = E/F state. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080004", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from a snoop request hit with data forwarde= d from its Far(not in the same quadrant as the request)-other tile's L2 in = E/F state. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_FAR_TILE_E_F"= , "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from a snoop request hit with data forwarde= d from its Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080004", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from a snoop request hit with data forwarde= d from its Far(not in the same quadrant as the request)-other tile's L2 in = M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_NEAR_TILE_E_F= ", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from a snoop request hit with data forwarde= d from its Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010004", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for reponses from snoop request hit with data forwarded f= rom its Near-other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000002", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from a snoop request hit with data forwarde= d from its Near-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.OUTSTANDING", - "MSRIndex": "0x1a6", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_NEAR_TILE_E_F= ", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that are = outstanding, per weighted cycle, from the time of the request to when any r= esponse is received. The oustanding response should be programmed only on P= MC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400002", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from a snoop request hit with data forwarde= d from its Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from a snoop request hit with data forwarded from its Fa= r(not in the same quadrant as the request)-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400002", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses which hit its own tile's L2 with data in E = state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_FAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from a snoop request hit with data forwarded from its Fa= r(not in the same quadrant as the request)-other tile's L2 in E/F state. Va= lid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080002", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses which hit its own tile's L2 with data in F = state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from a snoop request hit with data forwarded from its Ne= ar-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080002", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses which hit its own tile's L2 with data in M = state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_NEAR_TILE_E_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from a snoop request hit with data forwarded from its Ne= ar-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010002", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses which hit its own tile's L2 with data in S = state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x4000000001", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that are outstanding, per weighted cycle, from the time of the request = to when any response is received. The oustanding response should be program= med only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.OUTSTANDING", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.OUTSTANDING", "MSRIndex": "0x1a6", + "MSRValue": "0x4000000004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that are outstanding, per weighted cycle, from the time of the r= equest to when any response is received. The oustanding response should be = programmed only on PMC0.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000400001", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_FAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from a snoop request hit with data f= orwarded from its Far(not in the same quadrant as the request)-other tile's= L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800400001", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from a snoop request hit with data f= orwarded from its Far(not in the same quadrant as the request)-other tile's= L2 in E/F state. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", + "EventCode": "0xB7", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_FAR_TILE_E_F"= , "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from a snoop request hit with data f= orwarded from its Far(not in the same quadrant as the request)-other tile's= L2 in E/F state. Valid only for SNC4 cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1000080001", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from a snoop request hit with data f= orwarded from its Far(not in the same quadrant as the request)-other tile's= L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_NEAR_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from a snoop request hit with data f= orwarded from its Near-other tile's L2 in M state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0800080001", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from a snoop request hit with data f= orwarded from its Near-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", + "EventCode": "0xB7", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_NEAR_TILE_E_F= ", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from a snoop request hit with data f= orwarded from its Near-other tile's L2 in E/F state.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0000010001", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from a snoop request hit with data f= orwarded from its Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_RESPONSE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for any response", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000001", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses which hit its own tile's L2 with dat= a in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses which hit its own tile's L2 with dat= a in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000002", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses which hit its own tile's L2 with dat= a in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses which hit its own tile's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000004", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses which hit its own tile's L2 with dat= a in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses which hit its own tile's L2 with data in M = state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000020", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses which hit its own tile's L2 with dat= a in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses which hit its own tile's L2 w= ith data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000080", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that are outstanding, per weighted cycle, from the time of the r= equest to when any response is received. The oustanding response should be = programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_THIS_TILE_M", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000000001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses which hit = its own tile's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000100", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_THIS_TILE_M", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses which hit its own ti= le's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000200", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for reponses from snoop request hit with data forwarded from it Far(no= t in the same quadrant as the request)-other tile L2 in E/F/M state. Valid = only in SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800400002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses which hit its own tile's L2= with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000400", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from a snoop request hit with data forwarded from its Fa= r(not in the same quadrant as the request)-other tile's L2 in E/F state. Va= lid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses which hit its own tile's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002001000", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from a snoop request hit with data forwarded from its Fa= r(not in the same quadrant as the request)-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses which hit its own tile's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002002000", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for reponses from snoop request hit with data forwarded from its Near-= other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002008000", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from a snoop request hit with data forwarded from its Ne= ar-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_NEAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s which hit its own tile's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002003091", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from a snoop request hit with data forwarded from its Ne= ar-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses which hit its own tile's L2= with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000022", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses which hit its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses which hit its own tile's L2 with data in M stat= e", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000044", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses which hit its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses which hit its own tile's L2 with d= ata in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x00020032f7", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses which hit its own tile's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses which hit its own tile's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0002000070", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses which hit its own tile's L2 with data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_THIS_TILE_M", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses which hit its own tile's L2 with data in M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000001", + "BriefDescription": "Counts Demand cacheable data writes that are = outstanding, per weighted cycle, from the time of the request to when any r= esponse is received. The oustanding response should be programmed only on P= MC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_THIS_TILE_E", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000000002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses which hit its own tile's L2 with dat= a in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000002", + "BriefDescription": "Counts Full streaming stores (WC and should b= e programmed on PMC1) that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.FULL_STREAMING_STORES.ANY_RESPONSE"= , "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010800", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses which hit its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000004", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses which hit its own tile's L2 with data in E = state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000020", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for reponses from snoop = request hit with data forwarded from it Far(not in the same quadrant as the= request)-other tile L2 in E/F/M state. Valid only in SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800400080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses which hit its own tile's L2 w= ith data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000040", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from a sno= op request hit with data forwarded from its Far(not in the same quadrant as= the request)-other tile's L2 in E/F state. Valid only for SNC4 cluster mod= e.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000080", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from a sno= op request hit with data forwarded from its Far(not in the same quadrant as= the request)-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses which hit = its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000100", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for reponses from snoop = request hit with data forwarded from its Near-other tile L2 in E/F/M state"= , "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_THIS_TILE_E", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_NEAR_TILE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses which hit its own ti= le's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000200", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from a sno= op request hit with data forwarded from its Near-other tile's L2 in E/F sta= te.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_NEAR_TILE_E_F"= , "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses which hit its own tile's L2= with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000400", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from a sno= op request hit with data forwarded from its Near-other tile's L2 in M state= .", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses which hit its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004001000", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses which hit = its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses which hit its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004002000", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses which hit = its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004008000", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses which hit = its own tile's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s which hit its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004003091", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses which hit = its own tile's L2 with data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_THIS_TILE_E", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses which hit its own tile's L2= with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000022", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that are outstanding, per weighted cyc= le, from the time of the request to when any response is received. The oust= anding response should be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_THIS_TILE_E", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000000080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses which hit its own tile's L2 with data in E stat= e", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0004000044", + "BriefDescription": "Counts Partial streaming stores (WC and shoul= d be programmed on PMC1) that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_THIS_TILE_E", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_STREAMING_STORES.ANY_RESPON= SE", + "MSRIndex": "0x1a7", + "MSRValue": "0x0000014000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses which hit its own tile's L2 with d= ata in E state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x00040032f7", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_THIS_TILE_E", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.ANY_RESPONSE", + "MSRIndex": "0x1a7", + "MSRValue": "0x0000010100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses which hit its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for reponses from snoop request hi= t with data forwarded from it Far(not in the same quadrant as the request)-= other tile L2 in E/F/M state. Valid only in SNC4 Cluster mode.", + "Counter": "0,1", "EventCode": "0xB7", - "MSRValue": "0x0004000070", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_FAR_TILE", + "MSRIndex": "0x1a7", + "MSRValue": "0x1800400100", + "Offcore": "1", + "SampleAfterValue": "100007", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from a snoop request= hit with data forwarded from its Far(not in the same quadrant as the reque= st)-other tile's L2 in E/F state. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_THIS_TILE_E", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_FAR_TILE_E_F"= , + "MSRIndex": "0x1a7", + "MSRValue": "0x0800400100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses which hit its own tile's L2 with data in E state", - "Offcore": "1" + "UMask": "0x1" }, { + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from a snoop request= hit with data forwarded from its Far(not in the same quadrant as the reque= st)-other tile's L2 in M state.", + "Counter": "0,1", "EventCode": "0xB7", - "MSRValue": "0x0008000001", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_FAR_TILE_M", + "MSRIndex": "0x1a7", + "MSRValue": "0x1000400100", + "Offcore": "1", + "SampleAfterValue": "100007", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for reponses from snoop request hi= t with data forwarded from its Near-other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_THIS_TILE_S", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_NEAR_TILE", + "MSRIndex": "0x1a7", + "MSRValue": "0x1800180100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses which hit its own tile's L2 with dat= a in S state", - "Offcore": "1" + "UMask": "0x1" }, { + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from a snoop request= hit with data forwarded from its Near-other tile's L2 in E/F state.", + "Counter": "0,1", "EventCode": "0xB7", - "MSRValue": "0x0008000002", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_NEAR_TILE_E_F= ", + "MSRIndex": "0x1a7", + "MSRValue": "0x0800080100", + "Offcore": "1", + "SampleAfterValue": "100007", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from a snoop request= hit with data forwarded from its Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_THIS_TILE_S", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_NEAR_TILE_M", + "MSRIndex": "0x1a7", + "MSRValue": "0x1000080100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses which hit its own tile's L2 with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008000004", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses which hit its own ti= le's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_THIS_TILE_S", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_THIS_TILE_E", + "MSRIndex": "0x1a7", + "MSRValue": "0x0004000100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses which hit its own tile's L2 with data in S = state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008000020", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses which hit its own ti= le's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_THIS_TILE_S", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_THIS_TILE_F", + "MSRIndex": "0x1a7", + "MSRValue": "0x0010000100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses which hit its own tile's L2 w= ith data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008000080", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses which hit its own ti= le's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_THIS_TILE_S", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_THIS_TILE_M", + "MSRIndex": "0x1a7", + "MSRValue": "0x0002000100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses which hit = its own tile's L2 with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008000100", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses which hit its own ti= le's L2 with data in S state", "Counter": "0,1", - "UMask": "0x1", + "EventCode": "0xB7", "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a7", + "MSRValue": "0x0008000100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses which hit its own ti= le's L2 with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008000200", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000012000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses which hit its own tile's L2= with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008000400", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r reponses from snoop request hit with data forwarded from it Far(not in th= e same quadrant as the request)-other tile L2 in E/F/M state. Valid only in= SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800402000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses which hit its own tile's L2 with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008001000", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in E/F state. Valid onl= y for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800402000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses which hit its own tile's L2 with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008002000", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000402000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008008000", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r reponses from snoop request hit with data forwarded from its Near-other t= ile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800182000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s which hit its own tile's L2 with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008003091", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_NEAR_TILE_E_F"= , "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800082000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses which hit its own tile's L2= with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008000022", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000082000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses which hit its own tile's L2 with data in S stat= e", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0008000044", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004002000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses which hit its own tile's L2 with d= ata in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x00080032f7", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_THIS_TILE_S", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010002000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses which hit its own tile's L2 with data in S state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000001", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002002000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses which hit its own tile's L2 with dat= a in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000002", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008002000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses which hit its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000004", + "BriefDescription": "Counts L1 data HW prefetches that are outstan= ding, per weighted cycle, from the time of the request to when any response= is received. The oustanding response should be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_THIS_TILE_F", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000002000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses which hit its own tile's L2 with data in F = state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000020", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses which hit its own tile's L2 w= ith data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000040", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r reponses from snoop request hit with data forwarded from it Far(not in th= e same quadrant as the request)-other tile L2 in E/F/M state. Valid only in= SNC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800400040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000080", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in E/F state. Valid onl= y for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses which hit = its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000100", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Far(not i= n the same quadrant as the request)-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_THIS_TILE_F", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_FAR_TILE_M", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses which hit its own ti= le's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000200", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r reponses from snoop request hit with data forwarded from its Near-other t= ile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses which hit its own tile's L2= with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000400", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_NEAR_TILE_E_F"= , "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses which hit its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010001000", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from a snoop request hit with data forwarded from its Near-othe= r tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses which hit its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010002000", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010008000", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses which hit its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s which hit its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010003091", + "BriefDescription": "Counts L2 code HW prefetches that are outstan= ding, per weighted cycle, from the time of the request to when any response= is received. The oustanding response should be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_THIS_TILE_F", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000000040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses which hit its own tile's L2= with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000022", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses which hit its own tile's L2 with data in F stat= e", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000044", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from a snoop request hit with= data forwarded from its Far(not in the same quadrant as the request)-other= tile's L2 in E/F state. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses which hit its own tile's L2 with d= ata in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x00100032f7", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from a snoop request hit with= data forwarded from its Far(not in the same quadrant as the request)-other= tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses which hit its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0010000070", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for reponses from snoop request hit with da= ta forwarded from its Near-other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_THIS_TILE_F", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses which hit its own tile's L2 with data in F state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180002", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from a snoop request hit with= data forwarded from its Near-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_NEAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for reponses from snoop request hit with data forwarded from its Near-= other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180004", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from a snoop request hit with= data forwarded from its Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for reponses from snoop request hit with data forwarded f= rom its Near-other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180020", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses which hit its own tile's L2 w= ith data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for reponses from snoop request hit with da= ta forwarded from its Near-other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180040", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses which hit its own tile's L2 w= ith data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r reponses from snoop request hit with data forwarded from its Near-other t= ile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180080", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses which hit its own tile's L2 w= ith data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for reponses from snoop = request hit with data forwarded from its Near-other tile L2 in E/F/M state"= , - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180100", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses which hit its own tile's L2 w= ith data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_NEAR_TILE", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L2_HIT_THIS_TILE_S", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for reponses from snoop request hi= t with data forwarded from its Near-other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180200", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that provides no supplier details", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000020020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for reponses from snoop request hit with = data forwarded from its Near-other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180400", + "BriefDescription": "Counts Software Prefetches that accounts for = any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000011000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for reponses from snoop request hit with data forwarded from its = Near-other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800181000", + "BriefDescription": "Counts Software Prefetches that accounts for = reponses from snoop request hit with data forwarded from it Far(not in the = same quadrant as the request)-other tile L2 in E/F/M state. Valid only in S= NC4 Cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_FAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800401000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = reponses from snoop request hit with data forwarded from its Near-other til= e L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800182000", + "BriefDescription": "Counts Software Prefetches that accounts for = responses from a snoop request hit with data forwarded from its Far(not in = the same quadrant as the request)-other tile's L2 in E/F state. Valid only = for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_FAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800401000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r reponses from snoop request hit with data forwarded from its Near-other t= ile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800188000", + "BriefDescription": "Counts Software Prefetches that accounts for = responses from a snoop request hit with data forwarded from its Far(not in = the same quadrant as the request)-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000401000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for reponses= from snoop request hit with data forwarded from its Near-other tile L2 in = E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800183091", + "BriefDescription": "Counts Software Prefetches that accounts for = reponses from snoop request hit with data forwarded from its Near-other til= e L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800181000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for reponses from snoop request hit with = data forwarded from its Near-other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180022", + "BriefDescription": "Counts Software Prefetches that accounts for = responses from a snoop request hit with data forwarded from its Near-other = tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_NEAR_TILE_E_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800081000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for reponses from snoop request hit with data forwarded from = its Near-other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180044", + "BriefDescription": "Counts Software Prefetches that accounts for = responses from a snoop request hit with data forwarded from its Near-other = tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000081000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for reponses from snoop request hit with data fo= rwarded from its Near-other tile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x18001832f7", + "BriefDescription": "Counts Software Prefetches that accounts for = responses which hit its own tile's L2 with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004001000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= ponses from snoop request hit with data forwarded from its Near-other tile = L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800180070", + "BriefDescription": "Counts Software Prefetches that accounts for = responses which hit its own tile's L2 with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_NEAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010001000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r reponses from snoop request hit with data forwarded from its Near-other t= ile L2 in E/F/M state", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800400002", + "BriefDescription": "Counts Software Prefetches that accounts for = responses which hit its own tile's L2 with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002001000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for reponses from snoop request hit with data forwarded from it Far(no= t in the same quadrant as the request)-other tile L2 in E/F/M state. Valid = only in SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800400004", + "BriefDescription": "Counts Software Prefetches that accounts for = responses which hit its own tile's L2 with data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008001000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for reponses from snoop request hit with data forwarded f= rom it Far(not in the same quadrant as the request)-other tile L2 in E/F/M = state. Valid only in SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800400040", + "BriefDescription": "Counts Software Prefetches that are outstandi= ng, per weighted cycle, from the time of the request to when any response i= s received. The oustanding response should be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L2_HIT_FAR_TILE", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000001000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r reponses from snoop request hit with data forwarded from it Far(not in th= e same quadrant as the request)-other tile L2 in E/F/M state. Valid only in= SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { + "BriefDescription": "Counts all streaming stores (WC and should be= programmed on PMC1) that accounts for any response", + "Counter": "0,1", "EventCode": "0xB7", - "MSRValue": "0x1800400080", + "EventName": "OFFCORE_RESPONSE.STREAMING_STORES.ANY_RESPONSE", + "MSRIndex": "0x1a7", + "MSRValue": "0x0000014800", + "Offcore": "1", + "SampleAfterValue": "100007", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for any response", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0000010200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for reponses from snoop = request hit with data forwarded from it Far(not in the same quadrant as the= request)-other tile L2 in E/F/M state. Valid only in SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800400100", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from a snoop request hit wi= th data forwarded from its Far(not in the same quadrant as the request)-oth= er tile's L2 in E/F state. Valid only for SNC4 cluster mode.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.L2_HIT_FAR_TILE", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_FAR_TILE_E_F", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800400200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for reponses from snoop request hi= t with data forwarded from it Far(not in the same quadrant as the request)-= other tile L2 in E/F/M state. Valid only in SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800400400", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from a snoop request hit wi= th data forwarded from its Far(not in the same quadrant as the request)-oth= er tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_FAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000400200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for reponses from snoop request hit with data forwarded from it F= ar(not in the same quadrant as the request)-other tile L2 in E/F/M state. V= alid only in SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800401000", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for reponses from snoop request hit with = data forwarded from its Near-other tile L2 in E/F/M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_NEAR_TILE", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1800180200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = reponses from snoop request hit with data forwarded from it Far(not in the = same quadrant as the request)-other tile L2 in E/F/M state. Valid only in S= NC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800402000", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from a snoop request hit wi= th data forwarded from its Near-other tile's L2 in E/F state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_NEAR_TILE_E_F"= , "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0800080200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r reponses from snoop request hit with data forwarded from it Far(not in th= e same quadrant as the request)-other tile L2 in E/F/M state. Valid only in= SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800408000", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from a snoop request hit wi= th data forwarded from its Near-other tile's L2 in M state.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_NEAR_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x1000080200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for reponses= from snoop request hit with data forwarded from it Far(not in the same qua= drant as the request)-other tile L2 in E/F/M state. Valid only in SNC4 Clus= ter mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800403091", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses which hit its own tile's L2= with data in E state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_THIS_TILE_E", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0004000200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for reponses from snoop request hit with = data forwarded from it Far(not in the same quadrant as the request)-other t= ile L2 in E/F/M state. Valid only in SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800400022", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses which hit its own tile's L2= with data in F state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_THIS_TILE_F", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0010000200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for reponses from snoop request hit with data forwarded from = it Far(not in the same quadrant as the request)-other tile L2 in E/F/M stat= e. Valid only in SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800400044", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses which hit its own tile's L2= with data in M state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_THIS_TILE_M", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0002000200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for reponses from snoop request hit with data fo= rwarded from it Far(not in the same quadrant as the request)-other tile L2 = in E/F/M state. Valid only in SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x18004032f7", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses which hit its own tile's L2= with data in S state", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.L2_HIT_FAR_TILE", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.L2_HIT_THIS_TILE_S", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0008000200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= ponses from snoop request hit with data forwarded from it Far(not in the sa= me quadrant as the request)-other tile L2 in E/F/M state. Valid only in SNC= 4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x1800400070", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that are outstanding, per weighted cycle, from the time= of the request to when any response is received. The oustanding response s= hould be programmed only on PMC0.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.L2_HIT_FAR_TILE", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.OUTSTANDING", + "MSRIndex": "0x1a6", + "MSRValue": "0x4000000200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r reponses from snoop request hit with data forwarded from it Far(not in th= e same quadrant as the request)-other tile L2 in E/F/M state. Valid only in= SNC4 Cluster mode.", - "Offcore": "1" + "UMask": "0x1" } ] \ No newline at end of file diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/floating-point.j= son b/tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json new file mode 100644 index 000000000000..5fce5020efa1 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json @@ -0,0 +1,29 @@ +[ + { + "BriefDescription": "Counts the number of floating operations reti= red that required microcode assists", + "Counter": "0,1", + "EventCode": "0xC3", + "EventName": "MACHINE_CLEARS.FP_ASSIST", + "PublicDescription": "This event counts the number of times that t= he pipeline stalled due to FP operations needing assists.", + "SampleAfterValue": "200003", + "UMask": "0x4" + }, + { + "BriefDescription": "Counts the number of vector SSE, AVX, AVX2, A= VX-512 micro-ops retired. More specifically, it counts packed SSE, AVX, AVX= 2, AVX-512 micro-ops (both floating point and integer) except for loads (me= mory-to-register mov-type micro-ops), packed byte and word multiplies.", + "Counter": "0,1", + "EventCode": "0xC2", + "EventName": "UOPS_RETIRED.PACKED_SIMD", + "PublicDescription": "This event counts the number of packed vecto= r SSE, AVX, AVX2, and AVX-512 micro-ops retired (floating point, integer an= d store) except for loads (memory-to-register mov-type micro-ops), packed b= yte and word multiplies.", + "SampleAfterValue": "200003", + "UMask": "0x40" + }, + { + "BriefDescription": "Counts the number of scalar SSE, AVX, AVX2, A= VX-512 micro-ops retired. More specifically, it counts scalar SSE, AVX, AVX= 2, AVX-512 micro-ops except for loads (memory-to-register mov-type micro op= s), division, sqrt.", + "Counter": "0,1", + "EventCode": "0xC2", + "EventName": "UOPS_RETIRED.SCALAR_SIMD", + "PublicDescription": "This event counts the number of scalar SSE, = AVX, AVX2, AVX-512 micro-ops retired (floating point, integer and store) ex= cept for loads (memory-to-register mov-type micro ops), division, sqrt.", + "SampleAfterValue": "200003", + "UMask": "0x20" + } +] \ No newline at end of file diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/frontend.json b/= tools/perf/pmu-events/arch/x86/knightslanding/frontend.json index 6d38636689a4..d075ab594d75 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/frontend.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/frontend.json @@ -1,34 +1,58 @@ [ { - "EventCode": "0x80", + "BriefDescription": "Counts the number of times the front end rest= eers for any branch as a result of another branch handling mechanism in the= front end.", "Counter": "0,1", - "UMask": "0x3", - "EventName": "ICACHE.ACCESSES", + "EventCode": "0xE6", + "EventName": "BACLEARS.ALL", + "SampleAfterValue": "200003", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts the number of times the front end rest= eers for conditional branches as a result of another branch handling mechan= ism in the front end.", + "Counter": "0,1", + "EventCode": "0xE6", + "EventName": "BACLEARS.COND", + "SampleAfterValue": "200003", + "UMask": "0x10" + }, + { + "BriefDescription": "Counts the number of times the front end rest= eers for RET branches as a result of another branch handling mechanism in t= he front end.", + "Counter": "0,1", + "EventCode": "0xE6", + "EventName": "BACLEARS.RETURN", "SampleAfterValue": "200003", - "BriefDescription": "Counts all instruction fetches, including unc= acheable fetches." + "UMask": "0x8" }, { + "BriefDescription": "Counts all instruction fetches, including unc= acheable fetches.", + "Counter": "0,1", "EventCode": "0x80", + "EventName": "ICACHE.ACCESSES", + "SampleAfterValue": "200003", + "UMask": "0x3" + }, + { + "BriefDescription": "Counts all instruction fetches that hit the i= nstruction cache.", "Counter": "0,1", - "UMask": "0x1", + "EventCode": "0x80", "EventName": "ICACHE.HIT", "SampleAfterValue": "200003", - "BriefDescription": "Counts all instruction fetches that hit the i= nstruction cache." + "UMask": "0x1" }, { - "EventCode": "0x80", + "BriefDescription": "Counts all instruction fetches that miss the = instruction cache or produce memory requests. An instruction fetch miss is = counted only once and not once for every cycle it is outstanding.", "Counter": "0,1", - "UMask": "0x2", + "EventCode": "0x80", "EventName": "ICACHE.MISSES", "SampleAfterValue": "200003", - "BriefDescription": "Counts all instruction fetches that miss the = instruction cache or produce memory requests. An instruction fetch miss is = counted only once and not once for every cycle it is outstanding." + "UMask": "0x2" }, { - "EventCode": "0xE7", + "BriefDescription": "Counts the number of times the MSROM starts a= flow of uops.", "Counter": "0,1", - "UMask": "0x1", + "EventCode": "0xE7", "EventName": "MS_DECODED.MS_ENTRY", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of times the MSROM starts a= flow of uops." + "UMask": "0x1" } ] \ No newline at end of file diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/memory.json b/to= ols/perf/pmu-events/arch/x86/knightslanding/memory.json index c6bb16ba0f86..5e6ca6896af1 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/memory.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/memory.json @@ -1,1110 +1,1110 @@ [ { - "EventCode": "0xC3", + "BriefDescription": "Counts the number of times the machine clears= due to memory ordering hazards", "Counter": "0,1", - "UMask": "0x2", + "EventCode": "0xC3", "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of times the machine clears= due to memory ordering hazards" + "UMask": "0x2" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400070", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r data responses from MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200070", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000070", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800070", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x01004032f7", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for data responses from MCDRAM Far or Other tile= L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for da= ta responses from MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x00802032f7", + "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200044", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for da= ta responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x01010032f7", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181803091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for da= ta responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x00808032f7", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101003091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for da= ta responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080803091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for data responses from MCDRAM Far or Other tile= L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from MCDRAM (local and far)= ", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180603091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for data responses from MCDRAM Far or Oth= er tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100403091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800044", + "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080203091", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400022", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for data responses from MCDRAM Far or Other tile L2 hit far."= , - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200022", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000022", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800022", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r data responses from MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100403091", + "BriefDescription": "Counts any Prefetch requests that accounts fo= r data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200070", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for data responses from MCDRAM Far or Oth= er tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080203091", + "BriefDescription": "Counts any Read request that accounts for re= sponses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x01818032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101003091", + "BriefDescription": "Counts any Read request that accounts for da= ta responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x01010032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080803091", + "BriefDescription": "Counts any Read request that accounts for da= ta responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00808032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100408000", + "BriefDescription": "Counts any Read request that accounts for re= sponses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x01806032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for data res= ponses from MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080208000", + "BriefDescription": "Counts any Read request that accounts for da= ta responses from MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x01004032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for data res= ponses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101008000", + "BriefDescription": "Counts any Read request that accounts for da= ta responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_READ.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x00802032f7", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for data res= ponses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080808000", + "BriefDescription": "Counts any request that accounts for response= s from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181808000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for data res= ponses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100402000", + "BriefDescription": "Counts any request that accounts for data res= ponses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101008000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r data responses from MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080202000", + "BriefDescription": "Counts any request that accounts for data res= ponses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080808000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101002000", + "BriefDescription": "Counts any request that accounts for response= s from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180608000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080802000", + "BriefDescription": "Counts any request that accounts for data res= ponses from MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100408000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100401000", + "BriefDescription": "Counts any request that accounts for data res= ponses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080208000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = data responses from MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080201000", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101001000", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080801000", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400400", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for data responses from MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200400", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for data responses from MCDRAM Far or Other tile L2 hit far."= , "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000400", + "BriefDescription": "Counts Demand cacheable data write requests = that accounts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200022", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800400", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400200", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for data responses from MCDRAM Far or Oth= er tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200200", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000200", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800200", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for data responses from MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400100", + "BriefDescription": "Counts Bus locks and split lock requests that= accounts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.MCDRAM_FAR", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.MCDRAM_NEAR", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200400", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for data responses from MCDRAM Far= or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200100", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.MCDRAM_NEAR", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.DDR", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for data responses from MCDRAM Loc= al.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000100", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.DDR_FAR", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.DDR_FAR", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for data responses from DRAM Far."= , - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800100", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.DDR_NEAR", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.DDR_NEAR", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for data responses from DRAM Local= .", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x2000020080", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.NON_DRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from any N= ON_DRAM system address. This includes MMIO transactions", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400080", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for data responses from MCDRAM Far or Other tile L2 hit f= ar.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for data responses from = MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200080", + "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200004", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for data responses from = MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000080", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for data responses from = DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800080", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for data responses from = DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400040", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r data responses from MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200040", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000040", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for data responses from MCDRAM Far or Other tile L= 2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800040", + "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200001", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x2000020020", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.NON_DRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from any NON_DRAM system addr= ess. This includes MMIO transactions", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400020", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for data responses from MCDRAM Far or Other= tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200020", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000020", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800020", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for data responses from MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400004", + "BriefDescription": "Counts Demand cacheable data writes that acco= unts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200002", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for data responses from MCDRAM Far or Other tile L2 hit f= ar.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200004", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from DDR (= local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000004", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for data responses from = DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800004", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for data responses from = DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400002", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from MCDRA= M (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.MCDRAM_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for data responses from MCDRAM Far or Other tile L2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200002", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for data responses from = MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.MCDRAM_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000002", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for data responses from = MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.DDR_FAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800002", + "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from any N= ON_DRAM system address. This includes MMIO transactions", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.DDR_NEAR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.NON_DRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2000020080", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0100400001", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for data responses from DRAM Far."= , "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.MCDRAM_FAR", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.DDR_FAR", + "MSRIndex": "0x1a7", + "MSRValue": "0x0101000100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for data responses from MCDRAM Far or Other tile L= 2 hit far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080200001", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for data responses from DRAM Local= .", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.MCDRAM_NEAR", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.DDR_NEAR", + "MSRIndex": "0x1a7", + "MSRValue": "0x0080800100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for data responses from MCDRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0101000001", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from MCDRAM (local a= nd far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.DDR_FAR", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.MCDRAM", + "MSRIndex": "0x1a7", + "MSRValue": "0x0180600100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for data responses from DRAM Far.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0080800001", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for data responses from MCDRAM Far= or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.DDR_NEAR", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.MCDRAM_FAR", + "MSRIndex": "0x1a7", + "MSRValue": "0x0100400100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for data responses from DRAM Local.", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600001", + "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for data responses from MCDRAM Loc= al.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.MCDRAM", - "MSRIndex": "0x1a6,0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.MCDRAM_NEAR", + "MSRIndex": "0x1a7", + "MSRValue": "0x0080200100", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600002", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181802000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600004", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101002000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600020", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080802000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600080", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r data responses from MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100402000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from MCDRA= M (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600100", + "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_WRITES.MCDRAM", - "MSRIndex": "0x1a7", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.MCDRAM_NEAR", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080202000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial writes (UC or WT or WP and sho= uld be programmed on PMC1) that accounts for responses from MCDRAM (local a= nd far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600200", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from MCDRAM (local and far)= ", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600400", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180601000", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180608000", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r data responses from MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180603091", + "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200040", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from MCDRAM (local and far)= ", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600022", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600044", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x01806032f7", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0180600070", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_PF_L2.MCDRAM", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Prefetch requests that accounts fo= r responses from MCDRAM (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800001", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for data responses from MCDRAM Far or Other= tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand cacheable data and L1 prefetch = data reads that accounts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800002", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data writes that acco= unts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800004", + "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from any NON_DRAM system addr= ess. This includes MMIO transactions", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.NON_DRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2000020020", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts demand code reads and prefetch code re= ads that accounts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800020", + "BriefDescription": "Counts Software Prefetches that accounts for = responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181801000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 data RFO prefetches (includes PREFE= TCHW instruction) that accounts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800040", + "BriefDescription": "Counts Software Prefetches that accounts for = data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101001000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L2 code HW prefetches that accounts fo= r responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800080", + "BriefDescription": "Counts Software Prefetches that accounts for = data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PARTIAL_READS.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080801000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Partial reads (UC or WC and is valid o= nly for Outstanding response type). that accounts for responses from DDR (= local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800200", + "BriefDescription": "Counts Software Prefetches that accounts for = responses from MCDRAM (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180601000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800400", + "BriefDescription": "Counts Software Prefetches that accounts for = data responses from MCDRAM Far or Other tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.BUS_LOCKS.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100401000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Bus locks and split lock requests that= accounts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181801000", + "BriefDescription": "Counts Software Prefetches that accounts for = data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.PF_SOFTWARE.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080201000", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Software Prefetches that accounts for = responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181802000", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from DDR (local and far)", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.PF_L1_DATA_RD.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.DDR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0181800200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts L1 data HW prefetches that accounts fo= r responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181808000", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for data responses from DRAM Far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.DDR_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0101000200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any request that accounts for response= s from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181803091", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for data responses from DRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_DATA_RD.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.DDR_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080800200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data and L1 prefetch = data read requests that accounts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800022", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for responses from MCDRAM (local and far)= ", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_RFO.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.MCDRAM", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0180600200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand cacheable data write requests = that accounts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x0181800044", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for data responses from MCDRAM Far or Oth= er tile L2 hit far.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_CODE_RD.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.MCDRAM_FAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0100400200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts Demand code reads and prefetch code re= ad requests that accounts for responses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" }, { - "EventCode": "0xB7", - "MSRValue": "0x01818032f7", + "BriefDescription": "Counts UC code reads (valid only for Outstand= ing response type) that accounts for data responses from MCDRAM Local.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "OFFCORE_RESPONSE.ANY_READ.DDR", + "EventCode": "0xB7", + "EventName": "OFFCORE_RESPONSE.UC_CODE_READS.MCDRAM_NEAR", "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x0080200200", + "Offcore": "1", "SampleAfterValue": "100007", - "BriefDescription": "Counts any Read request that accounts for re= sponses from DDR (local and far)", - "Offcore": "1" + "UMask": "0x1" } ] \ No newline at end of file diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json b/= tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json index 92e4ef2e22c6..8f4213e5fbfd 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/pipeline.json @@ -1,432 +1,377 @@ [ { - "PEBS": "1", - "EventCode": "0xC4", + "BriefDescription": "Counts the number of branch instructions reti= red", "Counter": "0,1", - "UMask": "0x0", + "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.ALL_BRANCHES", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of branch instructions reti= red" - }, - { "PEBS": "1", - "EventCode": "0xC4", - "Counter": "0,1", - "UMask": "0x7e", - "EventName": "BR_INST_RETIRED.JCC", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of branch instructions reti= red that were conditional jumps." + "SampleAfterValue": "200003" }, { - "PEBS": "1", - "EventCode": "0xC4", + "BriefDescription": "Counts the number of near CALL branch instruc= tions retired.", "Counter": "0,1", - "UMask": "0xfe", - "EventName": "BR_INST_RETIRED.TAKEN_JCC", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of branch instructions reti= red that were conditional jumps and predicted taken." - }, - { - "PEBS": "1", "EventCode": "0xC4", - "Counter": "0,1", - "UMask": "0xf9", "EventName": "BR_INST_RETIRED.CALL", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of near CALL branch instruc= tions retired." + "UMask": "0xf9" }, { - "PEBS": "1", - "EventCode": "0xC4", + "BriefDescription": "Counts the number of far branch instructions = retired.", "Counter": "0,1", - "UMask": "0xfd", - "EventName": "BR_INST_RETIRED.REL_CALL", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.FAR_BRANCH", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of near relative CALL branc= h instructions retired." + "UMask": "0xbf" }, { - "PEBS": "1", - "EventCode": "0xC4", + "BriefDescription": "Counts the number of near indirect CALL branc= h instructions retired.", "Counter": "0,1", - "UMask": "0xfb", + "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.IND_CALL", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of near indirect CALL branc= h instructions retired." + "UMask": "0xfb" }, { - "PEBS": "1", - "EventCode": "0xC4", + "BriefDescription": "Counts the number of branch instructions reti= red that were conditional jumps.", "Counter": "0,1", - "UMask": "0xf7", - "EventName": "BR_INST_RETIRED.RETURN", + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.JCC", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of near RET branch instruct= ions retired." + "UMask": "0x7e" }, { - "PEBS": "1", - "EventCode": "0xC4", + "BriefDescription": "Counts the number of branch instructions reti= red that were near indirect CALL or near indirect JMP.", "Counter": "0,1", - "UMask": "0xeb", + "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.NON_RETURN_IND", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of branch instructions reti= red that were near indirect CALL or near indirect JMP." - }, - { "PEBS": "1", - "EventCode": "0xC4", - "Counter": "0,1", - "UMask": "0xbf", - "EventName": "BR_INST_RETIRED.FAR_BRANCH", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of far branch instructions = retired." + "UMask": "0xeb" }, { - "PEBS": "1", - "EventCode": "0xC5", + "BriefDescription": "Counts the number of near relative CALL branc= h instructions retired.", "Counter": "0,1", - "UMask": "0x0", - "EventName": "BR_MISP_RETIRED.ALL_BRANCHES", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted branch inst= ructions retired" - }, - { + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.REL_CALL", "PEBS": "1", - "EventCode": "0xC5", - "Counter": "0,1", - "UMask": "0x7e", - "EventName": "BR_MISP_RETIRED.JCC", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted branch inst= ructions retired that were conditional jumps." + "UMask": "0xfd" }, { - "PEBS": "1", - "EventCode": "0xC5", + "BriefDescription": "Counts the number of near RET branch instruct= ions retired.", "Counter": "0,1", - "UMask": "0xfe", - "EventName": "BR_MISP_RETIRED.TAKEN_JCC", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted branch inst= ructions retired that were conditional jumps and predicted taken." - }, - { + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.RETURN", "PEBS": "1", - "EventCode": "0xC5", - "Counter": "0,1", - "UMask": "0xfb", - "EventName": "BR_MISP_RETIRED.IND_CALL", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted near indire= ct CALL branch instructions retired." + "UMask": "0xf7" }, { - "PEBS": "1", - "EventCode": "0xC5", + "BriefDescription": "Counts the number of branch instructions reti= red that were conditional jumps and predicted taken.", "Counter": "0,1", - "UMask": "0xf7", - "EventName": "BR_MISP_RETIRED.RETURN", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted near RET br= anch instructions retired." - }, - { + "EventCode": "0xC4", + "EventName": "BR_INST_RETIRED.TAKEN_JCC", "PEBS": "1", - "EventCode": "0xC5", - "Counter": "0,1", - "UMask": "0xeb", - "EventName": "BR_MISP_RETIRED.NON_RETURN_IND", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted branch inst= ructions retired that were near indirect CALL or near indirect JMP." + "UMask": "0xfe" }, { - "PublicDescription": "This event counts the number of micro-ops re= tired that were supplied from MSROM.", - "EventCode": "0xC2", + "BriefDescription": "Counts the number of mispredicted branch inst= ructions retired", "Counter": "0,1", - "UMask": "0x1", - "EventName": "UOPS_RETIRED.MS", - "SampleAfterValue": "2000003", - "BriefDescription": "Counts the number of micro-ops retired that a= re from the complex flows issued by the micro-sequencer (MS)." - }, - { - "PublicDescription": "This event counts the number of micro-ops (u= ops) retired. The processor decodes complex macro instructions into a seque= nce of simpler uops. Most instructions are composed of one or two uops. Som= e instructions are decoded into longer sequences such as repeat instruction= s, floating point transcendental instructions, and assists.", - "EventCode": "0xC2", - "Counter": "0,1", - "UMask": "0x10", - "EventName": "UOPS_RETIRED.ALL", - "SampleAfterValue": "2000003", - "BriefDescription": "Counts the number of micro-ops retired" + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.ALL_BRANCHES", + "PEBS": "1", + "SampleAfterValue": "200003" }, { - "PublicDescription": "This event counts the number of scalar SSE, = AVX, AVX2, AVX-512 micro-ops retired (floating point, integer and store) ex= cept for loads (memory-to-register mov-type micro ops), division, sqrt.", - "EventCode": "0xC2", + "BriefDescription": "Counts the number of mispredicted near CALL b= ranch instructions retired.", "Counter": "0,1", - "UMask": "0x20", - "EventName": "UOPS_RETIRED.SCALAR_SIMD", + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.CALL", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of scalar SSE, AVX, AVX2, A= VX-512 micro-ops retired. More specifically, it counts scalar SSE, AVX, AVX= 2, AVX-512 micro-ops except for loads (memory-to-register mov-type micro op= s), division, sqrt." + "UMask": "0xf9" }, { - "PublicDescription": "This event counts the number of packed vecto= r SSE, AVX, AVX2, and AVX-512 micro-ops retired (floating point, integer an= d store) except for loads (memory-to-register mov-type micro-ops), packed b= yte and word multiplies.", - "EventCode": "0xC2", + "BriefDescription": "Counts the number of mispredicted far branch = instructions retired.", "Counter": "0,1", - "UMask": "0x40", - "EventName": "UOPS_RETIRED.PACKED_SIMD", + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.FAR_BRANCH", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of vector SSE, AVX, AVX2, A= VX-512 micro-ops retired. More specifically, it counts packed SSE, AVX, AVX= 2, AVX-512 micro-ops (both floating point and integer) except for loads (me= mory-to-register mov-type micro-ops), packed byte and word multiplies." + "UMask": "0xbf" }, { - "EventCode": "0xC3", + "BriefDescription": "Counts the number of mispredicted near indire= ct CALL branch instructions retired.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "MACHINE_CLEARS.SMC", + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.IND_CALL", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of times that the machine c= lears due to program modifying data within 1K of a recently fetched code pa= ge" + "UMask": "0xfb" }, { - "PublicDescription": "This event counts the number of times that t= he pipeline stalled due to FP operations needing assists.", - "EventCode": "0xC3", + "BriefDescription": "Counts the number of mispredicted branch inst= ructions retired that were conditional jumps.", "Counter": "0,1", - "UMask": "0x4", - "EventName": "MACHINE_CLEARS.FP_ASSIST", + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.JCC", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of floating operations reti= red that required microcode assists" + "UMask": "0x7e" }, { - "EventCode": "0xC3", + "BriefDescription": "Counts the number of mispredicted branch inst= ructions retired that were near indirect CALL or near indirect JMP.", "Counter": "0,1", - "UMask": "0x8", - "EventName": "MACHINE_CLEARS.ALL", + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.NON_RETURN_IND", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts all nukes" + "UMask": "0xeb" }, { - "EventCode": "0xCA", + "BriefDescription": "Counts the number of mispredicted near relati= ve CALL branch instructions retired.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "NO_ALLOC_CYCLES.ROB_FULL", + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.REL_CALL", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of core cycles when no micr= o-ops are allocated and the ROB is full" + "UMask": "0xfd" }, { - "PublicDescription": "This event counts the number of core cycles = when no uops are allocated and the alloc pipe is stalled waiting for a misp= redicted branch to retire.", - "EventCode": "0xCA", + "BriefDescription": "Counts the number of mispredicted near RET br= anch instructions retired.", "Counter": "0,1", - "UMask": "0x4", - "EventName": "NO_ALLOC_CYCLES.MISPREDICTS", + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.RETURN", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of core cycles when no micr= o-ops are allocated and the alloc pipe is stalled waiting for a mispredicte= d branch to retire." + "UMask": "0xf7" }, { - "EventCode": "0xCA", + "BriefDescription": "Counts the number of mispredicted branch inst= ructions retired that were conditional jumps and predicted taken.", "Counter": "0,1", - "UMask": "0x20", - "EventName": "NO_ALLOC_CYCLES.RAT_STALL", + "EventCode": "0xC5", + "EventName": "BR_MISP_RETIRED.TAKEN_JCC", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of core cycles when no micr= o-ops are allocated and a RATstall (caused by reservation station full) is = asserted." + "UMask": "0xfe" }, { - "PublicDescription": "This event counts the number of core cycles = when no uops are allocated, the instruction queue is empty and the alloc pi= pe is stalled waiting for instructions to be fetched.", - "EventCode": "0xCA", + "BriefDescription": "Counts the number of unhalted reference clock= cycles", "Counter": "0,1", - "UMask": "0x90", - "EventName": "NO_ALLOC_CYCLES.NOT_DELIVERED", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of core cycles when no micr= o-ops are allocated, the IQ is empty, and no other condition is blocking al= location." + "EventCode": "0x3C", + "EventName": "CPU_CLK_UNHALTED.REF", + "SampleAfterValue": "2000003", + "UMask": "0x1" }, { - "EventCode": "0xCA", - "Counter": "0,1", - "UMask": "0x7f", - "EventName": "NO_ALLOC_CYCLES.ALL", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the total number of core cycles when n= o micro-ops are allocated for any reason." + "BriefDescription": "Fixed Counter: Counts the number of unhalted = reference clock cycles", + "Counter": "Fixed counter 3", + "EventName": "CPU_CLK_UNHALTED.REF_TSC", + "SampleAfterValue": "2000003", + "UMask": "0x3" }, { - "EventCode": "0xCB", - "Counter": "0,1", - "UMask": "0x1", - "EventName": "RS_FULL_STALL.MEC", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of core cycles when allocat= ion pipeline is stalled and is waiting for a free MEC reservation station e= ntry." + "BriefDescription": "Fixed Counter: Counts the number of unhalted = core clock cycles", + "Counter": "Fixed counter 2", + "EventName": "CPU_CLK_UNHALTED.THREAD", + "PublicDescription": "This event counts the number of core cycles = while the thread is not in a halt state. The thread enters the halt state w= hen it is running the HLT instruction. This event is a component in many ke= y event ratios. The core frequency may change from time to time due to tran= sitions associated with Enhanced Intel SpeedStep Technology or TM2. For thi= s reason this event may have a changing ratio with regards to time. When th= e core frequency is constant, this event can approximate elapsed time while= the core was not in the halt state. It is counted on a dedicated fixed cou= nter", + "SampleAfterValue": "2000003", + "UMask": "0x2" }, { - "EventCode": "0xCB", + "BriefDescription": "Counts the number of unhalted core clock cycl= es", "Counter": "0,1", - "UMask": "0x1f", - "EventName": "RS_FULL_STALL.ALL", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the total number of core cycles the Al= loc pipeline is stalled when any one of the reservation stations is full." + "EventCode": "0x3C", + "EventName": "CPU_CLK_UNHALTED.THREAD_P", + "SampleAfterValue": "2000003" }, { - "EventCode": "0xC0", + "BriefDescription": "Cycles the number of core cycles when divider= is busy. Does not imply a stall waiting for the divider.", "Counter": "0,1", - "UMask": "0x0", - "EventName": "INST_RETIRED.ANY_P", - "SampleAfterValue": "2000003", - "BriefDescription": "Counts the total number of instructions retir= ed" - }, - { - "PublicDescription": "This event counts cycles when the divider is= busy. More specifically cycles when the divide unit is unable to accept a = new divide uop because it is busy processing a previously dispatched uop. T= he cycles will be counted irrespective of whether or not another divide uop= is waiting to enter the divide unit (from the RS). This event counts integ= er divides, x87 divides, divss, divsd, sqrtss, sqrtsd event and does not co= unt vector divides.", "EventCode": "0xCD", - "Counter": "0,1", - "UMask": "0x1", "EventName": "CYCLES_DIV_BUSY.ALL", + "PublicDescription": "This event counts cycles when the divider is= busy. More specifically cycles when the divide unit is unable to accept a = new divide uop because it is busy processing a previously dispatched uop. T= he cycles will be counted irrespective of whether or not another divide uop= is waiting to enter the divide unit (from the RS). This event counts integ= er divides, x87 divides, divss, divsd, sqrtss, sqrtsd event and does not co= unt vector divides.", "SampleAfterValue": "2000003", - "BriefDescription": "Cycles the number of core cycles when divider= is busy. Does not imply a stall waiting for the divider." + "UMask": "0x1" }, { - "PublicDescription": "This event counts the number of instructions= that retire. For instructions that consist of multiple micro-ops, this ev= ent counts exactly once, as the last micro-op of the instruction retires. = The event continues counting while instructions retire, including during in= terrupt service routines caused by hardware interrupts, faults or traps.", + "BriefDescription": "Fixed Counter: Counts the number of instructi= ons retired", "Counter": "Fixed counter 1", - "UMask": "0x1", "EventName": "INST_RETIRED.ANY", + "PublicDescription": "This event counts the number of instructions= that retire. For instructions that consist of multiple micro-ops, this ev= ent counts exactly once, as the last micro-op of the instruction retires. = The event continues counting while instructions retire, including during in= terrupt service routines caused by hardware interrupts, faults or traps.", "SampleAfterValue": "2000003", - "BriefDescription": "Fixed Counter: Counts the number of instructi= ons retired" + "UMask": "0x1" }, { - "EventCode": "0x3C", + "BriefDescription": "Counts the total number of instructions retir= ed", "Counter": "0,1", - "UMask": "0x0", - "EventName": "CPU_CLK_UNHALTED.THREAD_P", - "SampleAfterValue": "2000003", - "BriefDescription": "Counts the number of unhalted core clock cycl= es" + "EventCode": "0xC0", + "EventName": "INST_RETIRED.ANY_P", + "SampleAfterValue": "2000003" }, { - "EventCode": "0x3C", + "BriefDescription": "Counts all nukes", "Counter": "0,1", - "UMask": "0x1", - "EventName": "CPU_CLK_UNHALTED.REF", - "SampleAfterValue": "2000003", - "BriefDescription": "Counts the number of unhalted reference clock= cycles" + "EventCode": "0xC3", + "EventName": "MACHINE_CLEARS.ALL", + "SampleAfterValue": "200003", + "UMask": "0x8" }, { - "PublicDescription": "This event counts the number of core cycles = while the thread is not in a halt state. The thread enters the halt state w= hen it is running the HLT instruction. This event is a component in many ke= y event ratios. The core frequency may change from time to time due to tran= sitions associated with Enhanced Intel SpeedStep Technology or TM2. For thi= s reason this event may have a changing ratio with regards to time. When th= e core frequency is constant, this event can approximate elapsed time while= the core was not in the halt state. It is counted on a dedicated fixed cou= nter", - "Counter": "Fixed counter 2", - "UMask": "0x2", - "EventName": "CPU_CLK_UNHALTED.THREAD", - "SampleAfterValue": "2000003", - "BriefDescription": "Fixed Counter: Counts the number of unhalted = core clock cycles" + "BriefDescription": "Counts the number of times that the machine c= lears due to program modifying data within 1K of a recently fetched code pa= ge", + "Counter": "0,1", + "EventCode": "0xC3", + "EventName": "MACHINE_CLEARS.SMC", + "SampleAfterValue": "200003", + "UMask": "0x1" }, { - "Counter": "Fixed counter 3", - "UMask": "0x3", - "EventName": "CPU_CLK_UNHALTED.REF_TSC", - "SampleAfterValue": "2000003", - "BriefDescription": "Fixed Counter: Counts the number of unhalted = reference clock cycles" + "BriefDescription": "Counts the total number of core cycles when n= o micro-ops are allocated for any reason.", + "Counter": "0,1", + "EventCode": "0xCA", + "EventName": "NO_ALLOC_CYCLES.ALL", + "SampleAfterValue": "200003", + "UMask": "0x7f" + }, + { + "BriefDescription": "Counts the number of core cycles when no micr= o-ops are allocated and the alloc pipe is stalled waiting for a mispredicte= d branch to retire.", + "Counter": "0,1", + "EventCode": "0xCA", + "EventName": "NO_ALLOC_CYCLES.MISPREDICTS", + "PublicDescription": "This event counts the number of core cycles = when no uops are allocated and the alloc pipe is stalled waiting for a misp= redicted branch to retire.", + "SampleAfterValue": "200003", + "UMask": "0x4" }, { - "EventCode": "0xE6", + "BriefDescription": "Counts the number of core cycles when no micr= o-ops are allocated, the IQ is empty, and no other condition is blocking al= location.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "BACLEARS.ALL", + "EventCode": "0xCA", + "EventName": "NO_ALLOC_CYCLES.NOT_DELIVERED", + "PublicDescription": "This event counts the number of core cycles = when no uops are allocated, the instruction queue is empty and the alloc pi= pe is stalled waiting for instructions to be fetched.", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of times the front end rest= eers for any branch as a result of another branch handling mechanism in the= front end." + "UMask": "0x90" }, { - "EventCode": "0xE6", + "BriefDescription": "Counts the number of core cycles when no micr= o-ops are allocated and a RATstall (caused by reservation station full) is = asserted.", "Counter": "0,1", - "UMask": "0x8", - "EventName": "BACLEARS.RETURN", + "EventCode": "0xCA", + "EventName": "NO_ALLOC_CYCLES.RAT_STALL", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of times the front end rest= eers for RET branches as a result of another branch handling mechanism in t= he front end." + "UMask": "0x20" }, { - "EventCode": "0xE6", + "BriefDescription": "Counts the number of core cycles when no micr= o-ops are allocated and the ROB is full", "Counter": "0,1", - "UMask": "0x10", - "EventName": "BACLEARS.COND", + "EventCode": "0xCA", + "EventName": "NO_ALLOC_CYCLES.ROB_FULL", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of times the front end rest= eers for conditional branches as a result of another branch handling mechan= ism in the front end." + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0x03", + "BriefDescription": "Counts any retired load that was pushed into = the recycle queue for any reason.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "RECYCLEQ.LD_BLOCK_ST_FORWARD", + "EventCode": "0x03", + "EventName": "RECYCLEQ.ANY_LD", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired loa= d gets blocked because its address partially overlaps with a store", - "Data_LA": "1" + "UMask": "0x40" }, { + "BriefDescription": "Counts any retired store that was pushed into= the recycle queue for any reason.", + "Counter": "0,1", "EventCode": "0x03", + "EventName": "RECYCLEQ.ANY_ST", + "SampleAfterValue": "200003", + "UMask": "0x80" + }, + { + "BriefDescription": "Counts the number of occurences a retired loa= d gets blocked because its address overlaps with a store whose data is not = ready", "Counter": "0,1", - "UMask": "0x2", + "EventCode": "0x03", "EventName": "RECYCLEQ.LD_BLOCK_STD_NOTREADY", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired loa= d gets blocked because its address overlaps with a store whose data is not = ready" + "UMask": "0x2" }, { - "PublicDescription": "This event counts the number of retired stor= e that experienced a cache line boundary split(Precise Event). Note that ea= ch spilt should be counted only once.", - "EventCode": "0x03", + "BriefDescription": "Counts the number of occurences a retired loa= d gets blocked because its address partially overlaps with a store", "Counter": "0,1", - "UMask": "0x4", - "EventName": "RECYCLEQ.ST_SPLITS", + "Data_LA": "1", + "EventCode": "0x03", + "EventName": "RECYCLEQ.LD_BLOCK_ST_FORWARD", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired sto= re that is a cache line split. Each split should be counted only once." + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0x03", + "BriefDescription": "Counts the number of occurences a retired loa= d that is a cache line split. Each split should be counted only once.", "Counter": "0,1", - "UMask": "0x8", + "Data_LA": "1", + "EventCode": "0x03", "EventName": "RECYCLEQ.LD_SPLITS", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of occurences a retired loa= d that is a cache line split. Each split should be counted only once.", - "Data_LA": "1" + "UMask": "0x8" }, { - "EventCode": "0x03", + "BriefDescription": "Counts all the retired locked loads. It does = not include stores because we would double count if we count stores", "Counter": "0,1", - "UMask": "0x10", + "EventCode": "0x03", "EventName": "RECYCLEQ.LOCK", "SampleAfterValue": "200003", - "BriefDescription": "Counts all the retired locked loads. It does = not include stores because we would double count if we count stores" + "UMask": "0x10" }, { - "EventCode": "0x03", + "BriefDescription": "Counts the store micro-ops retired that were = pushed in the rehad queue because the store address buffer is full", "Counter": "0,1", - "UMask": "0x20", + "EventCode": "0x03", "EventName": "RECYCLEQ.STA_FULL", "SampleAfterValue": "200003", - "BriefDescription": "Counts the store micro-ops retired that were = pushed in the rehad queue because the store address buffer is full" + "UMask": "0x20" }, { - "EventCode": "0x03", + "BriefDescription": "Counts the number of occurences a retired sto= re that is a cache line split. Each split should be counted only once.", "Counter": "0,1", - "UMask": "0x40", - "EventName": "RECYCLEQ.ANY_LD", + "EventCode": "0x03", + "EventName": "RECYCLEQ.ST_SPLITS", + "PublicDescription": "This event counts the number of retired stor= e that experienced a cache line boundary split(Precise Event). Note that ea= ch spilt should be counted only once.", "SampleAfterValue": "200003", - "BriefDescription": "Counts any retired load that was pushed into = the recycle queue for any reason." + "UMask": "0x4" }, { - "EventCode": "0x03", + "BriefDescription": "Counts the total number of core cycles the Al= loc pipeline is stalled when any one of the reservation stations is full.", "Counter": "0,1", - "UMask": "0x80", - "EventName": "RECYCLEQ.ANY_ST", + "EventCode": "0xCB", + "EventName": "RS_FULL_STALL.ALL", "SampleAfterValue": "200003", - "BriefDescription": "Counts any retired store that was pushed into= the recycle queue for any reason." + "UMask": "0x1f" }, { - "PEBS": "1", - "EventCode": "0xC5", + "BriefDescription": "Counts the number of core cycles when allocat= ion pipeline is stalled and is waiting for a free MEC reservation station e= ntry.", "Counter": "0,1", - "UMask": "0xf9", - "EventName": "BR_MISP_RETIRED.CALL", + "EventCode": "0xCB", + "EventName": "RS_FULL_STALL.MEC", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted near CALL b= ranch instructions retired." + "UMask": "0x1" }, { - "PEBS": "1", - "EventCode": "0xC5", + "BriefDescription": "Counts the number of micro-ops retired", "Counter": "0,1", - "UMask": "0xfd", - "EventName": "BR_MISP_RETIRED.REL_CALL", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted near relati= ve CALL branch instructions retired." + "EventCode": "0xC2", + "EventName": "UOPS_RETIRED.ALL", + "PublicDescription": "This event counts the number of micro-ops (u= ops) retired. The processor decodes complex macro instructions into a seque= nce of simpler uops. Most instructions are composed of one or two uops. Som= e instructions are decoded into longer sequences such as repeat instruction= s, floating point transcendental instructions, and assists.", + "SampleAfterValue": "2000003", + "UMask": "0x10" }, { - "PEBS": "1", - "EventCode": "0xC5", + "BriefDescription": "Counts the number of micro-ops retired that a= re from the complex flows issued by the micro-sequencer (MS).", "Counter": "0,1", - "UMask": "0xbf", - "EventName": "BR_MISP_RETIRED.FAR_BRANCH", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of mispredicted far branch = instructions retired." + "EventCode": "0xC2", + "EventName": "UOPS_RETIRED.MS", + "PublicDescription": "This event counts the number of micro-ops re= tired that were supplied from MSROM.", + "SampleAfterValue": "2000003", + "UMask": "0x1" } ] \ No newline at end of file diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.j= son b/tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json index 9e493977771f..eda299ef5ff8 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/virtual-memory.json @@ -1,65 +1,65 @@ [ { - "PEBS": "1", - "EventCode": "0x04", + "BriefDescription": "Counts the number of load micro-ops retired t= hat cause a DTLB miss", "Counter": "0,1", - "UMask": "0x8", + "Data_LA": "1", + "EventCode": "0x04", "EventName": "MEM_UOPS_RETIRED.DTLB_MISS_LOADS", + "PEBS": "1", "SampleAfterValue": "200003", - "BriefDescription": "Counts the number of load micro-ops retired t= hat cause a DTLB miss", - "Data_LA": "1" + "UMask": "0x8" }, { - "EventCode": "0x05", + "BriefDescription": "Counts the total number of core cycles for al= l the page walks. The cycles for page walks started in speculative path wil= l also be included.", "Counter": "0,1", - "UMask": "0x1", - "EventName": "PAGE_WALKS.D_SIDE_WALKS", - "SampleAfterValue": "100003", - "BriefDescription": "Counts the total D-side page walks that are c= ompleted or started. The page walks started in the speculative path will al= so be counted", - "EdgeDetect": "1" + "EventCode": "0x05", + "EventName": "PAGE_WALKS.CYCLES", + "PublicDescription": "This event counts every cycle when a data (D= ) page walk or instruction (I) page walk is in progress.", + "SampleAfterValue": "200003", + "UMask": "0x3" }, { - "EventCode": "0x05", + "BriefDescription": "Counts the total number of core cycles for al= l the D-side page walks. The cycles for page walks started in speculative p= ath will also be included.", "Counter": "0,1", - "UMask": "0x1", + "EventCode": "0x05", "EventName": "PAGE_WALKS.D_SIDE_CYCLES", "SampleAfterValue": "200003", - "BriefDescription": "Counts the total number of core cycles for al= l the D-side page walks. The cycles for page walks started in speculative p= ath will also be included." + "UMask": "0x1" }, { - "EventCode": "0x05", + "BriefDescription": "Counts the total D-side page walks that are c= ompleted or started. The page walks started in the speculative path will al= so be counted", "Counter": "0,1", - "UMask": "0x2", - "EventName": "PAGE_WALKS.I_SIDE_WALKS", + "EdgeDetect": "1", + "EventCode": "0x05", + "EventName": "PAGE_WALKS.D_SIDE_WALKS", "SampleAfterValue": "100003", - "BriefDescription": "Counts the total I-side page walks that are c= ompleted.", - "EdgeDetect": "1" + "UMask": "0x1" }, { - "PublicDescription": "This event counts every cycle when an I-side= (walks due to an instruction fetch) page walk is in progress.", - "EventCode": "0x05", + "BriefDescription": "Counts the total number of core cycles for al= l the I-side page walks. The cycles for page walks started in speculative p= ath will also be included.", "Counter": "0,1", - "UMask": "0x2", + "EventCode": "0x05", "EventName": "PAGE_WALKS.I_SIDE_CYCLES", + "PublicDescription": "This event counts every cycle when an I-side= (walks due to an instruction fetch) page walk is in progress.", "SampleAfterValue": "200003", - "BriefDescription": "Counts the total number of core cycles for al= l the I-side page walks. The cycles for page walks started in speculative p= ath will also be included." + "UMask": "0x2" }, { - "EventCode": "0x05", + "BriefDescription": "Counts the total I-side page walks that are c= ompleted.", "Counter": "0,1", - "UMask": "0x3", - "EventName": "PAGE_WALKS.WALKS", + "EdgeDetect": "1", + "EventCode": "0x05", + "EventName": "PAGE_WALKS.I_SIDE_WALKS", "SampleAfterValue": "100003", - "BriefDescription": "Counts the total page walks that are complete= d (I-side and D-side)", - "EdgeDetect": "1" + "UMask": "0x2" }, { - "PublicDescription": "This event counts every cycle when a data (D= ) page walk or instruction (I) page walk is in progress.", - "EventCode": "0x05", + "BriefDescription": "Counts the total page walks that are complete= d (I-side and D-side)", "Counter": "0,1", - "UMask": "0x3", - "EventName": "PAGE_WALKS.CYCLES", - "SampleAfterValue": "200003", - "BriefDescription": "Counts the total number of core cycles for al= l the page walks. The cycles for page walks started in speculative path wil= l also be included." + "EdgeDetect": "1", + "EventCode": "0x05", + "EventName": "PAGE_WALKS.WALKS", + "SampleAfterValue": "100003", + "UMask": "0x3" } ] \ No newline at end of file --=20 2.35.0.rc2.247.g8bbb082509-goog