From: Francisco Iglesias <francisco.iglesias@xilinx.com>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org,
luc@lmichel.fr, sai.pavan.boddu@xilinx.com,
frasse.iglesias@gmail.com, alistair@alistair23.me,
richard.henderson@linaro.org, qemu-devel@nongnu.org,
frederic.konrad@adacore.com, qemu-arm@nongnu.org
Subject: Re: [PATCH v1 6/6] hw/arm/xlnx-zynqmp: Connect the ZynqMP APU Control
Date: Mon, 31 Jan 2022 15:48:50 +0000 [thread overview]
Message-ID: <20220131154848.itmhkvnbfb7bxoun@debian> (raw)
In-Reply-To: <20220130231206.34035-7-edgar.iglesias@gmail.com>
On Mon, Jan 31, 2022 at 12:12:06AM +0100, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Connect the ZynqMP APU Control device.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
> ---
> include/hw/arm/xlnx-zynqmp.h | 4 +++-
> hw/arm/xlnx-zynqmp.c | 25 +++++++++++++++++++++++--
> 2 files changed, 26 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index d5a3ad3df2..05cd2128f3 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -38,6 +38,7 @@
> #include "hw/dma/xlnx_csu_dma.h"
> #include "hw/nvram/xlnx-bbram.h"
> #include "hw/nvram/xlnx-zynqmp-efuse.h"
> +#include "hw/misc/xlnx-zynqmp-apu-ctrl.h"
> #include "hw/misc/xlnx-zynqmp-crf.h"
>
> #define TYPE_XLNX_ZYNQMP "xlnx-zynqmp"
> @@ -85,7 +86,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
> /*
> * Unimplemented mmio regions needed to boot some images.
> */
> -#define XLNX_ZYNQMP_NUM_UNIMP_AREAS 2
> +#define XLNX_ZYNQMP_NUM_UNIMP_AREAS 1
>
> struct XlnxZynqMPState {
> /*< private >*/
> @@ -123,6 +124,7 @@ struct XlnxZynqMPState {
> XlnxZDMA gdma[XLNX_ZYNQMP_NUM_GDMA_CH];
> XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH];
> XlnxCSUDMA qspi_dma;
> + XlnxZynqMPAPUCtrl apu_ctrl;
> XlnxZynqMPCRF crf;
>
> char *boot_cpu;
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 857d3c9636..21c411cd77 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -64,7 +64,7 @@
> #define DPDMA_IRQ 116
>
> #define APU_ADDR 0xfd5c0000
> -#define APU_SIZE 0x100
> +#define APU_IRQ 153
>
> #define IPI_ADDR 0xFF300000
> #define IPI_IRQ 64
> @@ -282,6 +282,27 @@ static void xlnx_zynqmp_create_efuse(XlnxZynqMPState *s, qemu_irq *gic)
> sysbus_connect_irq(sbd, 0, gic[EFUSE_IRQ]);
> }
>
> +static void xlnx_zynqmp_create_apu_ctrl(XlnxZynqMPState *s, qemu_irq *gic)
> +{
> + SysBusDevice *sbd;
> + int i;
> +
> + object_initialize_child(OBJECT(s), "apu-ctrl", &s->apu_ctrl,
> + TYPE_XLNX_ZYNQMP_APU_CTRL);
> + sbd = SYS_BUS_DEVICE(&s->apu_ctrl);
> +
> + for (i = 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) {
> + g_autofree gchar *name = g_strdup_printf("cpu%d", i);
> +
> + object_property_set_link(OBJECT(&s->apu_ctrl), name,
> + OBJECT(&s->apu_cpu[i]), &error_abort);
> + }
> +
> + sysbus_realize(sbd, &error_fatal);
> + sysbus_mmio_map(sbd, 0, APU_ADDR);
> + sysbus_connect_irq(sbd, 0, gic[APU_IRQ]);
> +}
> +
> static void xlnx_zynqmp_create_crf(XlnxZynqMPState *s, qemu_irq *gic)
> {
> SysBusDevice *sbd;
> @@ -301,7 +322,6 @@ static void xlnx_zynqmp_create_unimp_mmio(XlnxZynqMPState *s)
> hwaddr base;
> hwaddr size;
> } unimp_areas[ARRAY_SIZE(s->mr_unimp)] = {
> - { .name = "apu", APU_ADDR, APU_SIZE },
> { .name = "serdes", SERDES_ADDR, SERDES_SIZE },
> };
> unsigned int nr;
> @@ -697,6 +717,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> xlnx_zynqmp_create_bbram(s, gic_spi);
> xlnx_zynqmp_create_efuse(s, gic_spi);
> + xlnx_zynqmp_create_apu_ctrl(s, gic_spi);
> xlnx_zynqmp_create_crf(s, gic_spi);
> xlnx_zynqmp_create_unimp_mmio(s);
>
> --
> 2.25.1
>
next prev parent reply other threads:[~2022-01-31 16:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-30 23:12 [PATCH v1 0/6] hw/arm: zynqmp: Add CRF and APU control to support PSCI Edgar E. Iglesias
2022-01-30 23:12 ` [PATCH v1 1/6] hw/arm/xlnx-zynqmp: Add unimplemented SERDES area Edgar E. Iglesias
2022-01-30 23:37 ` Philippe Mathieu-Daudé via
2022-01-30 23:37 ` Philippe Mathieu-Daudé via
2022-01-31 15:21 ` Francisco Iglesias
2022-01-31 15:32 ` Peter Maydell
2022-01-31 17:30 ` Edgar E. Iglesias
2022-01-30 23:12 ` [PATCH v1 2/6] target/arm: Make rvbar settable after realize Edgar E. Iglesias
2022-02-03 20:21 ` Luc Michel
2022-01-30 23:12 ` [PATCH v1 3/6] hw/misc: Add a model of the Xilinx ZynqMP CRF Edgar E. Iglesias
2022-01-30 23:32 ` Philippe Mathieu-Daudé via
2022-01-31 15:35 ` Francisco Iglesias
2022-01-31 17:27 ` Edgar E. Iglesias
2022-01-31 17:51 ` Edgar E. Iglesias
2022-01-30 23:12 ` [PATCH v1 4/6] hw/arm/xlnx-zynqmp: Connect the " Edgar E. Iglesias
2022-01-30 23:33 ` Philippe Mathieu-Daudé via
2022-01-30 23:33 ` Philippe Mathieu-Daudé via
2022-01-31 15:37 ` Francisco Iglesias
2022-02-03 20:23 ` Luc Michel
2022-01-30 23:12 ` [PATCH v1 5/6] hw/misc: Add a model of the Xilinx ZynqMP APU Control Edgar E. Iglesias
2022-01-30 23:35 ` Philippe Mathieu-Daudé via
2022-01-31 12:17 ` Edgar E. Iglesias
2022-01-31 23:21 ` Philippe Mathieu-Daudé via
2022-01-31 15:46 ` Francisco Iglesias
2022-01-30 23:12 ` [PATCH v1 6/6] hw/arm/xlnx-zynqmp: Connect the " Edgar E. Iglesias
2022-01-30 23:37 ` Philippe Mathieu-Daudé via
2022-01-30 23:37 ` Philippe Mathieu-Daudé via
2022-01-31 15:48 ` Francisco Iglesias [this message]
2022-02-03 20:26 ` Luc Michel
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