From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 83844C433EF for ; Mon, 14 Feb 2022 14:25:36 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id 2532160EE5; Mon, 14 Feb 2022 14:25:36 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NcoIROmAwIun; Mon, 14 Feb 2022 14:25:34 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by smtp3.osuosl.org (Postfix) with ESMTPS id 3251B60DE5; Mon, 14 Feb 2022 14:25:34 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 0BA4AC0011; Mon, 14 Feb 2022 14:25:34 +0000 (UTC) Received: from smtp3.osuosl.org (smtp3.osuosl.org [IPv6:2605:bc80:3010::136]) by lists.linuxfoundation.org (Postfix) with ESMTP id 88A93C000B for ; Mon, 14 Feb 2022 14:25:32 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id 7756060ECE for ; Mon, 14 Feb 2022 14:25:32 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Rr2g0SD8Xcmi for ; Mon, 14 Feb 2022 14:25:31 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.8.0 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by smtp3.osuosl.org (Postfix) with ESMTPS id 044F260DE5 for ; Mon, 14 Feb 2022 14:25:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1644848730; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zJx2023ovQY+XjddZA8x6kaA/UGecR5XZ/Sz2QIDmz8=; b=IRsTT3rpH27bN8Anle0pwuhsgpB8aR0vJYn8DefQHlu/4kLeNwvKhEKd6k/ihTsbM0hSWx mf9B0lEkA+RyR9N4ekOHtiGvF28UVA9EM3b0z3MMJSOalU5fHLZYAvmvFTlaK1X/0AIGTk BIfq1f9Wu3uJL9d42vvWPkvboXML/z8= Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-94-HXKQWOAxN3yygU3GlXkCtQ-1; Mon, 14 Feb 2022 09:25:28 -0500 X-MC-Unique: HXKQWOAxN3yygU3GlXkCtQ-1 Received: by mail-wr1-f71.google.com with SMTP id k3-20020adfb343000000b001e463e6af20so6951778wrd.8 for ; Mon, 14 Feb 2022 06:25:28 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=zJx2023ovQY+XjddZA8x6kaA/UGecR5XZ/Sz2QIDmz8=; b=Np/7IZbtzTa1d20SZOqv3WcKcA/G416ITruGBzH91koAvKGllKtJhb0M0tZeJROk/k 4teDkXz4x5OdNhhoLligzmsxTXFY9netcX+TbY1jyfNH1/oN9htbCZy2epMIwq+ExSD6 mHqrFGhoAO5CPK3vzRFhGHx4uIXf12HWRNuYXvcXvQrJppGzfKt/4+FMM5NpcM6PjADV WlJ0BPAK+dgr5+hcbHHs/qRNzw9Kahf43YGxnrX1GkB42Bi3eqUxBDdyfMaUG2HmK0ol UtIQmAf1MZpOCv1YQcLLLZDhsDykSxivdrwiLJ1nEgC6/D6aufNmKuQnJCke5XrG3/U4 npQQ== X-Gm-Message-State: AOAM533vmEu6xBD9yKkeSFjE/Mnyjgzz2GbM6Ihg4UoJrfZGhN5sQayS pzZdAxeZ8bMAAlSB8B+Mlu0fQpY8uX7dUcnfelMEdSwmYzcb5rHAhq3Cq8svmerzoy1+u8GjLeH 75hgV9ofW9X9yZ4+ZuyG0DbM+C/9stu1ThTMkoJ6XLA== X-Received: by 2002:adf:e112:: with SMTP id t18mr11805724wrz.411.1644848727118; Mon, 14 Feb 2022 06:25:27 -0800 (PST) X-Google-Smtp-Source: ABdhPJx2ISDjT9Ec9wZciPbCs/onDCPNkKqyIaiaGH5CI/UHFiZsr5vJaOyLJ0YF0Ram0MJcqDNQ0A== X-Received: by 2002:adf:e112:: with SMTP id t18mr11805695wrz.411.1644848726666; Mon, 14 Feb 2022 06:25:26 -0800 (PST) Received: from redhat.com ([2.55.156.76]) by smtp.gmail.com with ESMTPSA id x5sm22856366wrv.63.2022.02.14.06.25.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Feb 2022 06:25:26 -0800 (PST) Date: Mon, 14 Feb 2022 09:25:23 -0500 From: "Michael S. Tsirkin" To: Jason Wang Subject: Re: [PATCH V4 4/4] vDPA/ifcvf: implement shared IRQ feature Message-ID: <20220214091842-mutt-send-email-mst@kernel.org> References: <20220203072735.189716-1-lingshan.zhu@intel.com> <20220203072735.189716-5-lingshan.zhu@intel.com> MIME-Version: 1.0 In-Reply-To: Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=mst@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline Cc: netdev@vger.kernel.org, Zhu Lingshan , virtualization@lists.linux-foundation.org X-BeenThere: virtualization@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux virtualization List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: virtualization-bounces@lists.linux-foundation.org Sender: "Virtualization" T24gTW9uLCBGZWIgMTQsIDIwMjIgYXQgMDM6MTk6MjVQTSArMDgwMCwgSmFzb24gV2FuZyB3cm90 ZToKPiAKPiDlnKggMjAyMi8yLzMg5LiL5Y2IMzoyNywgWmh1IExpbmdzaGFuIOWGmemBkzoKPiA+ IE9uIHNvbWUgcGxhdGZvcm1zL2RldmljZXMsIHRoZXJlIG1heSBub3QgYmUgZW5vdWdoIE1TSSB2 ZWN0b3IKPiA+IHNsb3RzIGFsbG9jYXRlZCBmb3IgdmlydHF1ZXVlcyBhbmQgY29uZmlnIGNoYW5n ZXMuIEluIHN1Y2ggYSBjYXNlLAo+ID4gdGhlIGludGVycnVwdCBzb3VyY2VzKHZpcnRxdWV1ZXMs IGNvbmZpZyBjaGFuZ2VzKSBtdXN0IHNoYXJlCj4gPiBhbiBJUlEvdmVjdG9yLCB0byBhdm9pZCBp bml0aWFsaXphdGlvbiBmYWlsdXJlcywga2VlcAo+ID4gdGhlIGRldmljZSBmdW5jdGlvbmFsLgo+ ID4gCj4gPiBUaGlzIGNvbW1pdCBoYW5kbGVzIHRocmVlIGNhc2VzOgo+ID4gKDEpIG51bWJlciBv ZiB0aGUgYWxsb2NhdGVkIHZlY3RvcnMgPT0gdGhlIG51bWJlciBvZiB2aXJ0cXVldWVzICsgMQo+ ID4gKGNvbmZpZyBjaGFuZ2VzKSwgZXZlcnkgdmlydHF1ZXVlIGFuZCB0aGUgY29uZmlnIGludGVy cnVwdCBoYXMKPiA+IGEgc2VwYXJhdGVkIHZlY3Rvci9JUlEsIHRoZSBiZXN0IGFuZCB0aGUgbW9z dCBsaWtlbHkgY2FzZS4KPiA+ICgyKSBudW1iZXIgb2YgdGhlIGFsbG9jYXRlZCB2ZWN0b3JzIGlz IGxlc3MgdGhhbiB0aGUgYmVzdCBjYXNlLCBidXQKPiA+IGdyZWF0ZXIgdGhhbiAxLiBJbiB0aGlz IGNhc2UsIGFsbCB2aXJ0cXVldWVzIHNoYXJlIGEgdmVjdG9yL0lSUSwKPiA+IHRoZSBjb25maWcg aW50ZXJydXB0IGhhcyBhIHNlcGFyYXRlZCB2ZWN0b3IvSVJRCj4gPiAoMykgb25seSBvbmUgdmVj dG9yIGlzIGFsbG9jYXRlZCwgaW4gdGhpcyBjYXNlLCB0aGUgdmlydHF1ZXVlcyBhbmQKPiA+IHRo ZSBjb25maWcgaW50ZXJydXB0IHNoYXJlIGEgdmVjdG9yL0lSUS4gVGhlIHdvcnN0IGFuZCBtb3N0 Cj4gPiB1bmxpa2VseSBjYXNlLgo+ID4gCj4gPiBPdGhlcndpc2UsIGl0IG5lZWRzIHRvIGZhaWwu Cj4gPiAKPiA+IFRoaXMgY29tbWl0IGludHJvZHVjZXMgc29tZSBoZWxwZXIgZnVuY3Rpb25zOgo+ ID4gaWZjdmZfc2V0X3ZxX3ZlY3RvcigpIGFuZCBpZmN2Zl9zZXRfY29uZmlnX3ZlY3RvcigpIHNl dHMgdmlydHF1ZXVlCj4gPiB2ZWN0b3IgYW5kIGNvbmZpZyB2ZWN0b3IgaW4gdGhlIGRldmljZSBj b25maWcgc3BhY2UsIHNvIHRoYXQKPiA+IHRoZSBkZXZpY2UgY2FuIHNlbmQgaW50ZXJydXB0IERN QS4KPiA+IAo+ID4gVGhpcyBjb21taXQgYWRkcyBzb21lIGZpZWxkcyBpbiBzdHJ1Y3QgaWZjdmZf aHcgYW5kIHJlLXBsYWNlZAo+ID4gdGhlIGV4aXN0ZWQgZmllbGRzIHRvIGJlIGFsaWduZWQgd2l0 aCB0aGUgY2FjaGVsaW5lLgo+ID4gCj4gPiBTaWduZWQtb2ZmLWJ5OiBaaHUgTGluZ3NoYW4gPGxp bmdzaGFuLnpodUBpbnRlbC5jb20+Cj4gPiAtLS0KPiA+ICAgZHJpdmVycy92ZHBhL2lmY3ZmL2lm Y3ZmX2Jhc2UuYyB8ICA0NyArKysrLS0KPiA+ICAgZHJpdmVycy92ZHBhL2lmY3ZmL2lmY3ZmX2Jh c2UuaCB8ICAyMyArKy0KPiA+ICAgZHJpdmVycy92ZHBhL2lmY3ZmL2lmY3ZmX21haW4uYyB8IDI0 MyArKysrKysrKysrKysrKysrKysrKysrKysrKystLS0tLQo+ID4gICAzIGZpbGVzIGNoYW5nZWQs IDI1NiBpbnNlcnRpb25zKCspLCA1NyBkZWxldGlvbnMoLSkKPiA+IAo+ID4gZGlmZiAtLWdpdCBh L2RyaXZlcnMvdmRwYS9pZmN2Zi9pZmN2Zl9iYXNlLmMgYi9kcml2ZXJzL3ZkcGEvaWZjdmYvaWZj dmZfYmFzZS5jCj4gPiBpbmRleCAzOTc2OTJhZTY3MWMuLjE4ZGNiNjNhYjFlMyAxMDA2NDQKPiA+ IC0tLSBhL2RyaXZlcnMvdmRwYS9pZmN2Zi9pZmN2Zl9iYXNlLmMKPiA+ICsrKyBiL2RyaXZlcnMv dmRwYS9pZmN2Zi9pZmN2Zl9iYXNlLmMKPiA+IEBAIC0xNSw2ICsxNSwzNiBAQCBzdHJ1Y3QgaWZj dmZfYWRhcHRlciAqdmZfdG9fYWRhcHRlcihzdHJ1Y3QgaWZjdmZfaHcgKmh3KQo+ID4gICAJcmV0 dXJuIGNvbnRhaW5lcl9vZihodywgc3RydWN0IGlmY3ZmX2FkYXB0ZXIsIHZmKTsKPiA+ICAgfQo+ ID4gK2ludCBpZmN2Zl9zZXRfdnFfdmVjdG9yKHN0cnVjdCBpZmN2Zl9odyAqaHcsIHUxNiBxaWQs IGludCB2ZWN0b3IpCj4gPiArewo+ID4gKwlzdHJ1Y3QgdmlydGlvX3BjaV9jb21tb25fY2ZnIF9f aW9tZW0gKmNmZyA9IGh3LT5jb21tb25fY2ZnOwo+ID4gKwlzdHJ1Y3QgaWZjdmZfYWRhcHRlciAq aWZjdmYgPSB2Zl90b19hZGFwdGVyKGh3KTsKPiA+ICsKPiA+ICsJaWZjX2lvd3JpdGUxNihxaWQs ICZjZmctPnF1ZXVlX3NlbGVjdCk7Cj4gPiArCWlmY19pb3dyaXRlMTYodmVjdG9yLCAmY2ZnLT5x dWV1ZV9tc2l4X3ZlY3Rvcik7Cj4gPiArCWlmIChpZmNfaW9yZWFkMTYoJmNmZy0+cXVldWVfbXNp eF92ZWN0b3IpID09IFZJUlRJT19NU0lfTk9fVkVDVE9SKSB7Cj4gPiArCQlJRkNWRl9FUlIoaWZj dmYtPnBkZXYsICJObyBtc2l4IHZlY3RvciBmb3IgcXVldWUgJXVcbiIsIHFpZCk7Cj4gPiArCQkJ cmV0dXJuIC1FSU5WQUw7Cj4gPiArCX0KPiAKPiAKPiBMZXQncyBsZWF2ZSB0aGlzIGNoZWNrIGZv ciB0aGUgY2FsbGVyLCBFLmcgY2FuIGNhbGxlciB0cnkgdG8gYXNzaWduCj4gTk9fVkVDVE9SIGR1 cmluZyB1bmktbml0PwoKCkhtbSBJJ20gbm90IHN1cmUgSSBhZ3JlZS4gQ2FsbGVyIHdpbGwgaGF2 ZSB0byB3cml0ZSBxdWV1ZSBzZWxlY3QKYWdhaW4sIGFuZCB0aGF0J3MgYW4gZXh0cmEgSU8sIHdo aWNoIGlzIGEgd2FzdGUuCkFuZCBoYXZpbmcgZnVuY3Rpb24gY2hlY2tpbmcgaXRzZWxmIGp1c3Qg c2VlbXMgYmV0dGVyIGNvbnRhaW5lZC4KCj4gCj4gPiArCj4gPiArCXJldHVybiAwOwo+ID4gK30K PiA+ICsKPiA+ICtpbnQgaWZjdmZfc2V0X2NvbmZpZ192ZWN0b3Ioc3RydWN0IGlmY3ZmX2h3ICpo dywgaW50IHZlY3RvcikKPiA+ICt7Cj4gPiArCXN0cnVjdCB2aXJ0aW9fcGNpX2NvbW1vbl9jZmcg X19pb21lbSAqY2ZnID0gaHctPmNvbW1vbl9jZmc7Cj4gPiArCXN0cnVjdCBpZmN2Zl9hZGFwdGVy ICppZmN2ZiA9IHZmX3RvX2FkYXB0ZXIoaHcpOwo+ID4gKwo+ID4gKwljZmcgPSBody0+Y29tbW9u X2NmZzsKPiA+ICsJaWZjX2lvd3JpdGUxNih2ZWN0b3IsICAmY2ZnLT5tc2l4X2NvbmZpZyk7Cj4g PiArCWlmIChpZmNfaW9yZWFkMTYoJmNmZy0+bXNpeF9jb25maWcpID09IFZJUlRJT19NU0lfTk9f VkVDVE9SKSB7Cj4gPiArCQlJRkNWRl9FUlIoaWZjdmYtPnBkZXYsICJObyBtc2l4IHZlY3RvciBm b3IgZGV2aWNlIGNvbmZpZ1xuIik7Cj4gPiArCQlyZXR1cm4gLUVJTlZBTDsKPiA+ICsJfQo+IAo+ IAo+IFNpbWlsYXIgcXVlc3Rpb24gYXMgYWJvdmUuCj4gCj4gCj4gPiArCj4gPiArCXJldHVybiAw Owo+ID4gK30KPiA+ICsKPiA+ICAgc3RhdGljIHZvaWQgX19pb21lbSAqZ2V0X2NhcF9hZGRyKHN0 cnVjdCBpZmN2Zl9odyAqaHcsCj4gPiAgIAkJCQkgIHN0cnVjdCB2aXJ0aW9fcGNpX2NhcCAqY2Fw KQo+ID4gICB7Cj4gPiBAQCAtMTQwLDYgKzE3MCw4IEBAIGludCBpZmN2Zl9pbml0X2h3KHN0cnVj dCBpZmN2Zl9odyAqaHcsIHN0cnVjdCBwY2lfZGV2ICpwZGV2KQo+ID4gICAJCSAgaHctPmNvbW1v bl9jZmcsIGh3LT5ub3RpZnlfYmFzZSwgaHctPmlzciwKPiA+ICAgCQkgIGh3LT5kZXZfY2ZnLCBo dy0+bm90aWZ5X29mZl9tdWx0aXBsaWVyKTsKPiA+ICsJaHctPnZxc19zaGFyZWRfaXJxID0gLUVJ TlZBTDsKPiA+ICsKPiA+ICAgCXJldHVybiAwOwo+ID4gICB9Cj4gPiBAQCAtMzIxLDEyICszNTMs NiBAQCBzdGF0aWMgaW50IGlmY3ZmX2h3X2VuYWJsZShzdHJ1Y3QgaWZjdmZfaHcgKmh3KQo+ID4g ICAJaWZjdmYgPSB2Zl90b19hZGFwdGVyKGh3KTsKPiA+ICAgCWNmZyA9IGh3LT5jb21tb25fY2Zn Owo+ID4gLQlpZmNfaW93cml0ZTE2KElGQ1ZGX01TSV9DT05GSUdfT0ZGLCAmY2ZnLT5tc2l4X2Nv bmZpZyk7Cj4gPiAtCj4gPiAtCWlmIChpZmNfaW9yZWFkMTYoJmNmZy0+bXNpeF9jb25maWcpID09 IFZJUlRJT19NU0lfTk9fVkVDVE9SKSB7Cj4gPiAtCQlJRkNWRl9FUlIoaWZjdmYtPnBkZXYsICJO byBtc2l4IHZlY3RvciBmb3IgZGV2aWNlIGNvbmZpZ1xuIik7Cj4gPiAtCQlyZXR1cm4gLUVJTlZB TDsKPiA+IC0JfQo+ID4gICAJZm9yIChpID0gMDsgaSA8IGh3LT5ucl92cmluZzsgaSsrKSB7Cj4g PiAgIAkJaWYgKCFody0+dnJpbmdbaV0ucmVhZHkpCj4gPiBAQCAtMzQwLDE1ICszNjYsNiBAQCBz dGF0aWMgaW50IGlmY3ZmX2h3X2VuYWJsZShzdHJ1Y3QgaWZjdmZfaHcgKmh3KQo+ID4gICAJCWlm Y19pb3dyaXRlNjRfdHdvcGFydChody0+dnJpbmdbaV0udXNlZCwgJmNmZy0+cXVldWVfdXNlZF9s bywKPiA+ICAgCQkJCSAgICAgJmNmZy0+cXVldWVfdXNlZF9oaSk7Cj4gPiAgIAkJaWZjX2lvd3Jp dGUxNihody0+dnJpbmdbaV0uc2l6ZSwgJmNmZy0+cXVldWVfc2l6ZSk7Cj4gPiAtCQlpZmNfaW93 cml0ZTE2KGkgKyBJRkNWRl9NU0lfUVVFVUVfT0ZGLCAmY2ZnLT5xdWV1ZV9tc2l4X3ZlY3Rvcik7 Cj4gPiAtCj4gPiAtCQlpZiAoaWZjX2lvcmVhZDE2KCZjZmctPnF1ZXVlX21zaXhfdmVjdG9yKSA9 PQo+ID4gLQkJICAgIFZJUlRJT19NU0lfTk9fVkVDVE9SKSB7Cj4gPiAtCQkJSUZDVkZfRVJSKGlm Y3ZmLT5wZGV2LAo+ID4gLQkJCQkgICJObyBtc2l4IHZlY3RvciBmb3IgcXVldWUgJXVcbiIsIGkp Owo+ID4gLQkJCXJldHVybiAtRUlOVkFMOwo+ID4gLQkJfQo+ID4gLQo+ID4gICAJCWlmY3ZmX3Nl dF92cV9zdGF0ZShodywgaSwgaHctPnZyaW5nW2ldLmxhc3RfYXZhaWxfaWR4KTsKPiA+ICAgCQlp ZmNfaW93cml0ZTE2KDEsICZjZmctPnF1ZXVlX2VuYWJsZSk7Cj4gPiAgIAl9Cj4gPiBkaWZmIC0t Z2l0IGEvZHJpdmVycy92ZHBhL2lmY3ZmL2lmY3ZmX2Jhc2UuaCBiL2RyaXZlcnMvdmRwYS9pZmN2 Zi9pZmN2Zl9iYXNlLmgKPiA+IGluZGV4IDk0OWI0ZmI5ZDU1NC4uOWNmZTA4OGM4MmU5IDEwMDY0 NAo+ID4gLS0tIGEvZHJpdmVycy92ZHBhL2lmY3ZmL2lmY3ZmX2Jhc2UuaAo+ID4gKysrIGIvZHJp dmVycy92ZHBhL2lmY3ZmL2lmY3ZmX2Jhc2UuaAo+ID4gQEAgLTI3LDggKzI3LDYgQEAKPiA+ICAg I2RlZmluZSBJRkNWRl9RVUVVRV9BTElHTk1FTlQJUEFHRV9TSVpFCj4gPiAgICNkZWZpbmUgSUZD VkZfUVVFVUVfTUFYCQkzMjc2OAo+ID4gLSNkZWZpbmUgSUZDVkZfTVNJX0NPTkZJR19PRkYJMAo+ ID4gLSNkZWZpbmUgSUZDVkZfTVNJX1FVRVVFX09GRgkxCj4gPiAgICNkZWZpbmUgSUZDVkZfUENJ X01BWF9SRVNPVVJDRQk2Cj4gPiAgICNkZWZpbmUgSUZDVkZfTE1fQ0ZHX1NJWkUJCTB4NDAKPiA+ IEBAIC00Miw2ICs0MCwxMyBAQAo+ID4gICAjZGVmaW5lIGlmY3ZmX3ByaXZhdGVfdG9fdmYoYWRh cHRlcikgXAo+ID4gICAJKCYoKHN0cnVjdCBpZmN2Zl9hZGFwdGVyICopYWRhcHRlciktPnZmKQo+ ID4gKy8qIGFsbCB2cXMgYW5kIGNvbmZpZyBpbnRlcnJ1cHQgaGFzIGl0cyBvd24gdmVjdG9yICov Cj4gPiArI2RlZmluZSBNU0lYX1ZFQ1RPUl9QRVJfVlFfQU5EX0NPTkZJRwkJMQo+ID4gKy8qIGFs bCB2cXMgc2hhcmUgYSB2ZWN0b3IsIGFuZCBjb25maWcgaW50ZXJydXB0IGhhcyBhIHNlcGFyYXRl IHZlY3RvciAqLwo+ID4gKyNkZWZpbmUgTVNJWF9WRUNUT1JfU0hBUkVEX1ZRX0FORF9DT05GSUcJ Mgo+ID4gKy8qIGFsbCB2cXMgYW5kIGNvbmZpZyBpbnRlcnJ1cHQgc2hhcmUgYSB2ZWN0b3IgKi8K PiA+ICsjZGVmaW5lIE1TSVhfVkVDVE9SX0RFVl9TSEFSRUQJCQkzCj4gCj4gCj4gSSB0aGluayB0 aGVyZSdzIG5vIG11Y2ggdmFsdWUgdG8gZGlmZmVyIDIgZnJvbSAzIGNvbnNpZGVyIGNvbmZpZyBp bnRlcnJ1cHQKPiBzaG91bGQgYmUgcmFyZS4KCgpZZXMgYnV0IGlmIHdlIGRvIG5vdCBoYXZlIGEg ZGVkaWNhdGVkIHZlY3RvciB0aGVuIHdlIG5lZWQgYW4KZXh0cmEgZGV2aWNlIElPIChpbiBmYWN0 LCBhIHJlYWQpIG9uIGVhY2ggaW50ZXJydXB0LgoKPiAKPiA+ICsKPiA+ICAgc3RhdGljIGlubGlu ZSB1OCBpZmNfaW9yZWFkOCh1OCBfX2lvbWVtICphZGRyKQo+ID4gICB7Cj4gPiAgIAlyZXR1cm4g aW9yZWFkOChhZGRyKTsKPiA+IEBAIC05NywyNSArMTAyLDI3IEBAIHN0cnVjdCBpZmN2Zl9odyB7 Cj4gPiAgIAl1OCBfX2lvbWVtICppc3I7Cj4gPiAgIAkvKiBMaXZlIG1pZ3JhdGlvbiAqLwo+ID4g ICAJdTggX19pb21lbSAqbG1fY2ZnOwo+ID4gLQl1MTYgbnJfdnJpbmc7Cj4gCj4gCj4gQW55IHJl YXNvbiBmb3IgbW92aW5nIG52X3ZyaW5nLCBjb25maWdfc2l6ZSwgYW5kIG90aGVyIHN0dWZmcz8K PiAKPiAKPiA+ICAgCS8qIE5vdGlmaWNhdGlvbiBiYXIgbnVtYmVyICovCj4gPiAgIAl1OCBub3Rp ZnlfYmFyOwo+ID4gKwl1OCBtc2l4X3ZlY3Rvcl9zdGF0dXM7Cj4gPiArCS8qIHZpcnRpby1uZXQg b3IgdmlydGlvLWJsayBkZXZpY2UgY29uZmlnIHNpemUgKi8KPiA+ICsJdTMyIGNvbmZpZ19zaXpl Owo+ID4gICAJLyogTm90aWZpY2FpdG9uIGJhciBhZGRyZXNzICovCj4gPiAgIAl2b2lkIF9faW9t ZW0gKm5vdGlmeV9iYXNlOwo+ID4gICAJcGh5c19hZGRyX3Qgbm90aWZ5X2Jhc2VfcGE7Cj4gPiAg IAl1MzIgbm90aWZ5X29mZl9tdWx0aXBsaWVyOwo+ID4gKwl1MzIgZGV2X3R5cGU7Cj4gPiAgIAl1 NjQgcmVxX2ZlYXR1cmVzOwo+ID4gICAJdTY0IGh3X2ZlYXR1cmVzOwo+ID4gLQl1MzIgZGV2X3R5 cGU7Cj4gPiAgIAlzdHJ1Y3QgdmlydGlvX3BjaV9jb21tb25fY2ZnIF9faW9tZW0gKmNvbW1vbl9j Zmc7Cj4gPiAgIAl2b2lkIF9faW9tZW0gKmRldl9jZmc7Cj4gPiAgIAlzdHJ1Y3QgdnJpbmdfaW5m byB2cmluZ1tJRkNWRl9NQVhfUVVFVUVTXTsKPiA+ICAgCXZvaWQgX19pb21lbSAqIGNvbnN0ICpi YXNlOwo+ID4gICAJY2hhciBjb25maWdfbXNpeF9uYW1lWzI1Nl07Cj4gPiAgIAlzdHJ1Y3QgdmRw YV9jYWxsYmFjayBjb25maWdfY2I7Cj4gPiAtCXVuc2lnbmVkIGludCBjb25maWdfaXJxOwo+ID4g LQkvKiB2aXJ0aW8tbmV0IG9yIHZpcnRpby1ibGsgZGV2aWNlIGNvbmZpZyBzaXplICovCj4gPiAt CXUzMiBjb25maWdfc2l6ZTsKPiA+ICsJaW50IGNvbmZpZ19pcnE7Cj4gPiArCWludCB2cXNfc2hh cmVkX2lycTsKPiA+ICsJdTE2IG5yX3ZyaW5nOwo+ID4gICB9Owo+ID4gICBzdHJ1Y3QgaWZjdmZf YWRhcHRlciB7Cj4gPiBAQCAtMTYwLDQgKzE2Nyw2IEBAIGludCBpZmN2Zl9zZXRfdnFfc3RhdGUo c3RydWN0IGlmY3ZmX2h3ICpodywgdTE2IHFpZCwgdTE2IG51bSk7Cj4gPiAgIHN0cnVjdCBpZmN2 Zl9hZGFwdGVyICp2Zl90b19hZGFwdGVyKHN0cnVjdCBpZmN2Zl9odyAqaHcpOwo+ID4gICBpbnQg aWZjdmZfcHJvYmVkX3ZpcnRpb19uZXQoc3RydWN0IGlmY3ZmX2h3ICpodyk7Cj4gPiAgIHUzMiBp ZmN2Zl9nZXRfY29uZmlnX3NpemUoc3RydWN0IGlmY3ZmX2h3ICpodyk7Cj4gPiAraW50IGlmY3Zm X3NldF92cV92ZWN0b3Ioc3RydWN0IGlmY3ZmX2h3ICpodywgdTE2IHFpZCwgaW50IHZlY3Rvcik7 Cj4gPiAraW50IGlmY3ZmX3NldF9jb25maWdfdmVjdG9yKHN0cnVjdCBpZmN2Zl9odyAqaHcsIGlu dCB2ZWN0b3IpOwo+ID4gICAjZW5kaWYgLyogX0lGQ1ZGX0hfICovCj4gPiBkaWZmIC0tZ2l0IGEv ZHJpdmVycy92ZHBhL2lmY3ZmL2lmY3ZmX21haW4uYyBiL2RyaXZlcnMvdmRwYS9pZmN2Zi9pZmN2 Zl9tYWluLmMKPiA+IGluZGV4IDQ0Yzg5YWIwYjZkYS4uY2E0MTQzOTlmMDQwIDEwMDY0NAo+ID4g LS0tIGEvZHJpdmVycy92ZHBhL2lmY3ZmL2lmY3ZmX21haW4uYwo+ID4gKysrIGIvZHJpdmVycy92 ZHBhL2lmY3ZmL2lmY3ZmX21haW4uYwo+ID4gQEAgLTE3LDYgKzE3LDcgQEAKPiA+ICAgI2RlZmlu ZSBEUklWRVJfQVVUSE9SICAgIkludGVsIENvcnBvcmF0aW9uIgo+ID4gICAjZGVmaW5lIElGQ1ZG X0RSSVZFUl9OQU1FICAgICAgICJpZmN2ZiIKPiA+ICsvKiBoYW5kbGVzIGNvbmZpZyBpbnRlcnJ1 cHQgKi8KPiAKPiAKPiBUaGlzIHNlZW1zIHVucmVsYXRlZCB0byB0aGUgc2hhcmVkIElSUSBsb2dp YyBhbmQgaXQgbG9va3MgdXNlbGVzcyBzaW5jZSBpdCdzCj4gZWFzaWx5IHRvIGRlZHVjZSBpdCBm cm9tIHRoZSBmdW5jdGlvbiBuYW1lIGJlbG93Lgo+IAo+IAo+ID4gICBzdGF0aWMgaXJxcmV0dXJu X3QgaWZjdmZfY29uZmlnX2NoYW5nZWQoaW50IGlycSwgdm9pZCAqYXJnKQo+ID4gICB7Cj4gPiAg IAlzdHJ1Y3QgaWZjdmZfaHcgKnZmID0gYXJnOwo+ID4gQEAgLTI3LDYgKzI4LDcgQEAgc3RhdGlj IGlycXJldHVybl90IGlmY3ZmX2NvbmZpZ19jaGFuZ2VkKGludCBpcnEsIHZvaWQgKmFyZykKPiA+ ICAgCXJldHVybiBJUlFfSEFORExFRDsKPiA+ICAgfQo+ID4gKy8qIGhhbmRsZXMgdnFzIGludGVy cnVwdCAqLwo+IAo+IAo+IFNvIGRpZCB0aGlzLgo+IAo+IAo+ID4gICBzdGF0aWMgaXJxcmV0dXJu X3QgaWZjdmZfaW50cl9oYW5kbGVyKGludCBpcnEsIHZvaWQgKmFyZykKPiA+ICAgewo+ID4gICAJ c3RydWN0IHZyaW5nX2luZm8gKnZyaW5nID0gYXJnOwo+ID4gQEAgLTM3LDI0ICszOSw3OCBAQCBz dGF0aWMgaXJxcmV0dXJuX3QgaWZjdmZfaW50cl9oYW5kbGVyKGludCBpcnEsIHZvaWQgKmFyZykK PiA+ICAgCXJldHVybiBJUlFfSEFORExFRDsKPiA+ICAgfQo+ID4gKy8qIGhhbmRscyB2cXMgc2hh cmVkIGludGVycnVwdCAqLwo+ID4gK3N0YXRpYyBpcnFyZXR1cm5fdCBpZmN2Zl92cV9zaGFyZWRf aW50cl9oYW5kbGVyKGludCBpcnEsIHZvaWQgKmFyZykKPiA+ICt7Cj4gPiArCXN0cnVjdCBpZmN2 Zl9odyAqdmYgPSBhcmc7Cj4gPiArCXN0cnVjdCB2cmluZ19pbmZvICp2cmluZzsKPiA+ICsJaW50 IGk7Cj4gPiArCj4gPiArCWZvciAoaSA9IDA7IGkgPCB2Zi0+bnJfdnJpbmc7IGkrKykgewo+ID4g KwkJdnJpbmcgPSAmdmYtPnZyaW5nW2ldOwo+ID4gKwkJaWYgKHZyaW5nLT5jYi5jYWxsYmFjaykK PiA+ICsJCQl2Zi0+dnJpbmctPmNiLmNhbGxiYWNrKHZyaW5nLT5jYi5wcml2YXRlKTsKPiA+ICsJ fQo+ID4gKwo+ID4gKwlyZXR1cm4gSVJRX0hBTkRMRUQ7Cj4gPiArfQo+ID4gKwo+ID4gKy8qIGhh bmRsZXMgYSBzaGFyZWQgaW50ZXJydXB0IGZvciB2cXMgYW5kIGNvbmZpZyAqLwo+ID4gK3N0YXRp YyBpcnFyZXR1cm5fdCBpZmN2Zl9kZXZfc2hhcmVkX2ludHJfaGFuZGxlcihpbnQgaXJxLCB2b2lk ICphcmcpCgpzaGFyZWQgaXMgbm90IGEgZ29vZCBuYW1lIGdpdmVuIElSUV9TSEFSRUQgaXMgbm90 IHNldC4KbWF5YmUgImNvbW1vbiI/ICJyZXVzZWQiPwoKPiA+ICt7Cj4gPiArCXN0cnVjdCBpZmN2 Zl9odyAqdmYgPSBhcmc7Cj4gPiArCXU4IGlzcjsKPiA+ICsKPiA+ICsJaXNyID0gaWZjX2lvcmVh ZDgodmYtPmlzcik7Cj4gCj4gCj4gV2UgbmVlZCB0byBleGFjdGx5IHdoYXQgdnBfaW50ZXJydXB0 IGRvIGhlcmUuIENoZWNraW5nIGFnYWluc3QgdmYtPmlzciBmaXJzdAo+IGFuZCByZXR1cm4gSVJR X05PTkUgaWYgaXQgaXMgbm90IHNldC4KCm5vLCB2Zi0+aXNyIGlzIG5vdCBzZXQgZm9yIFZRIGlu dGVycnVwdHMuIElmIG5lZWQgdG8gYWN0dWFsbHkgcG9rZQphdCB0aGUgVlEgdG8ga25vdy4KCj4g QWx3YXlzIHJldHVybiBJUlFfSEFORExFRCB3aWxsIGJyZWFrIHRoZSBkZXZpY2Ugd2hvIHNoYXJl cyBhbiBpcnEgd2l0aAo+IElGQ1ZGLgoKCkl0J3MgYSBNU0ksIG5vdCBJTlQjLiBTbyBpbnRlcnJ1 cHQgaXMgbm90IHNoYXJlZCBhcyBzdWNoIC0gaXQncyBvbmx5CnNoYXJpbmcgdmVjdG9yIGJldHdl ZW4gY29uZmlnIGFuZCB2cS4KCgo+IAo+ID4gKwlpZiAoaXNyICYgVklSVElPX1BDSV9JU1JfQ09O RklHKQo+ID4gKwkJaWZjdmZfY29uZmlnX2NoYW5nZWQoaXJxLCBhcmcpOwo+ID4gKwo+ID4gKwly ZXR1cm4gaWZjdmZfdnFfc2hhcmVkX2ludHJfaGFuZGxlcihpcnEsIGFyZyk7Cj4gPiArfQo+ID4g Kwo+ID4gICBzdGF0aWMgdm9pZCBpZmN2Zl9mcmVlX2lycV92ZWN0b3JzKHZvaWQgKmRhdGEpCj4g PiAgIHsKPiA+ICAgCXBjaV9mcmVlX2lycV92ZWN0b3JzKGRhdGEpOwo+ID4gICB9Cj4gPiAtc3Rh dGljIHZvaWQgaWZjdmZfZnJlZV9pcnEoc3RydWN0IGlmY3ZmX2FkYXB0ZXIgKmFkYXB0ZXIsIGlu dCBxdWV1ZXMpCj4gPiArc3RhdGljIHZvaWQgaWZjdmZfZnJlZV92cV9pcnEoc3RydWN0IGlmY3Zm X2FkYXB0ZXIgKmFkYXB0ZXIsIGludCBxdWV1ZXMpCj4gPiAgIHsKPiA+ICAgCXN0cnVjdCBwY2lf ZGV2ICpwZGV2ID0gYWRhcHRlci0+cGRldjsKPiA+ICAgCXN0cnVjdCBpZmN2Zl9odyAqdmYgPSAm YWRhcHRlci0+dmY7Cj4gPiAgIAlpbnQgaTsKPiA+ICsJaWYgKHZmLT5tc2l4X3ZlY3Rvcl9zdGF0 dXMgPT0gTVNJWF9WRUNUT1JfUEVSX1ZRX0FORF9DT05GSUcpIHsKPiA+ICsJCWZvciAoaSA9IDA7 IGkgPCBxdWV1ZXM7IGkrKykgewo+ID4gKwkJCWRldm1fZnJlZV9pcnEoJnBkZXYtPmRldiwgdmYt PnZyaW5nW2ldLmlycSwgJnZmLT52cmluZ1tpXSk7Cj4gPiArCQkJdmYtPnZyaW5nW2ldLmlycSA9 IC1FSU5WQUw7Cj4gPiArCQl9Cj4gPiArCX0gZWxzZSB7Cj4gPiArCQlkZXZtX2ZyZWVfaXJxKCZw ZGV2LT5kZXYsIHZmLT52cXNfc2hhcmVkX2lycSwgdmYpOwo+ID4gKwkJdmYtPnZxc19zaGFyZWRf aXJxID0gLUVJTlZBTDsKPiA+ICsJfQo+ID4gK30KPiA+IC0JZm9yIChpID0gMDsgaSA8IHF1ZXVl czsgaSsrKSB7Cj4gPiAtCQlkZXZtX2ZyZWVfaXJxKCZwZGV2LT5kZXYsIHZmLT52cmluZ1tpXS5p cnEsICZ2Zi0+dnJpbmdbaV0pOwo+ID4gLQkJdmYtPnZyaW5nW2ldLmlycSA9IC1FSU5WQUw7Cj4g PiArc3RhdGljIHZvaWQgaWZjdmZfZnJlZV9jb25maWdfaXJxKHN0cnVjdCBpZmN2Zl9hZGFwdGVy ICphZGFwdGVyKQo+ID4gK3sKPiA+ICsJc3RydWN0IHBjaV9kZXYgKnBkZXYgPSBhZGFwdGVyLT5w ZGV2Owo+ID4gKwlzdHJ1Y3QgaWZjdmZfaHcgKnZmID0gJmFkYXB0ZXItPnZmOwo+ID4gKwo+ID4g KwkvKiBJZiB0aGUgaXJxIGlzIHNoYXJlZCBieSBhbGwgdnFzIGFuZCB0aGUgY29uZmlnIGludGVy cnVwdCwKPiA+ICsJICogaXQgaXMgYWxyZWFkeSBmcmVlZCBpbiBpZmN2Zl9mcmVlX3ZxX2lycSwg c28gaGVyZSBvbmx5Cj4gPiArCSAqIG5lZWQgdG8gZnJlZSBjb25maWcgaXJxIHdoZW4gbXNpeF92 ZWN0b3Jfc3RhdHVzICE9IE1TSVhfVkVDVE9SX0RFVl9TSEFSRUQKPiA+ICsJICovCj4gPiArCWlm ICh2Zi0+bXNpeF92ZWN0b3Jfc3RhdHVzICE9IE1TSVhfVkVDVE9SX0RFVl9TSEFSRUQpIHsKPiA+ ICsJCWRldm1fZnJlZV9pcnEoJnBkZXYtPmRldiwgdmYtPmNvbmZpZ19pcnEsIHZmKTsKPiA+ICsJ CXZmLT5jb25maWdfaXJxID0gLUVJTlZBTDsKPiA+ICAgCX0KPiA+ICt9Cj4gPiArCj4gPiArc3Rh dGljIHZvaWQgaWZjdmZfZnJlZV9pcnEoc3RydWN0IGlmY3ZmX2FkYXB0ZXIgKmFkYXB0ZXIsIGlu dCBxdWV1ZXMpCj4gPiArewo+ID4gKwlzdHJ1Y3QgcGNpX2RldiAqcGRldiA9IGFkYXB0ZXItPnBk ZXY7Cj4gPiAtCWRldm1fZnJlZV9pcnEoJnBkZXYtPmRldiwgdmYtPmNvbmZpZ19pcnEsIHZmKTsK PiA+ICsJaWZjdmZfZnJlZV92cV9pcnEoYWRhcHRlciwgcXVldWVzKTsKPiA+ICsJaWZjdmZfZnJl ZV9jb25maWdfaXJxKGFkYXB0ZXIpOwo+ID4gICAJaWZjdmZfZnJlZV9pcnFfdmVjdG9ycyhwZGV2 KTsKPiA+ICAgfQo+ID4gQEAgLTg2LDU4ICsxNDIsMTcyIEBAIHN0YXRpYyBpbnQgaWZjdmZfYWxs b2NfdmVjdG9ycyhzdHJ1Y3QgaWZjdmZfYWRhcHRlciAqYWRhcHRlcikKPiA+ICAgCXJldHVybiBy ZXQ7Cj4gPiAgIH0KPiA+IC1zdGF0aWMgaW50IGlmY3ZmX3JlcXVlc3RfaXJxKHN0cnVjdCBpZmN2 Zl9hZGFwdGVyICphZGFwdGVyKQo+ID4gK3N0YXRpYyBpbnQgaWZjdmZfcmVxdWVzdF9wZXJfdnFf aXJxKHN0cnVjdCBpZmN2Zl9hZGFwdGVyICphZGFwdGVyKQo+ID4gICB7Cj4gPiAgIAlzdHJ1Y3Qg cGNpX2RldiAqcGRldiA9IGFkYXB0ZXItPnBkZXY7Cj4gPiAgIAlzdHJ1Y3QgaWZjdmZfaHcgKnZm ID0gJmFkYXB0ZXItPnZmOwo+ID4gLQlpbnQgdmVjdG9yLCBudmVjdG9ycywgaSwgcmV0LCBpcnE7 Cj4gPiAtCXUxNiBtYXhfaW50cjsKPiA+ICsJaW50IGksIHZlY3RvciwgcmV0LCBpcnE7Cj4gPiAt CW52ZWN0b3JzID0gaWZjdmZfYWxsb2NfdmVjdG9ycyhhZGFwdGVyKTsKPiA+IC0JaWYgKCEobnZl Y3RvcnMgPiAwKSkKPiA+IC0JCXJldHVybiBudmVjdG9yczsKPiA+ICsJZm9yIChpID0gMDsgaSA8 IHZmLT5ucl92cmluZzsgaSsrKSB7Cj4gPiArCQlzbnByaW50Zih2Zi0+dnJpbmdbaV0ubXNpeF9u YW1lLCAyNTYsICJpZmN2Zlslc10tJWRcbiIsIHBjaV9uYW1lKHBkZXYpLCBpKTsKPiA+ICsJCXZl Y3RvciA9IGk7Cj4gPiArCQlpcnEgPSBwY2lfaXJxX3ZlY3RvcihwZGV2LCB2ZWN0b3IpOwo+ID4g KwkJcmV0ID0gZGV2bV9yZXF1ZXN0X2lycSgmcGRldi0+ZGV2LCBpcnEsCj4gPiArCQkJCSAgICAg ICBpZmN2Zl9pbnRyX2hhbmRsZXIsIDAsCj4gPiArCQkJCSAgICAgICB2Zi0+dnJpbmdbaV0ubXNp eF9uYW1lLAo+ID4gKwkJCQkgICAgICAgJnZmLT52cmluZ1tpXSk7Cj4gPiArCQlpZiAocmV0KSB7 Cj4gPiArCQkJSUZDVkZfRVJSKHBkZXYsICJGYWlsZWQgdG8gcmVxdWVzdCBpcnEgZm9yIHZxICVk XG4iLCBpKTsKPiA+ICsJCQlpZmN2Zl9mcmVlX3ZxX2lycShhZGFwdGVyLCBpKTsKPiA+ICsJCX0g ZWxzZSB7Cj4gPiArCQkJdmYtPnZyaW5nW2ldLmlycSA9IGlycTsKPiA+ICsJCQlpZmN2Zl9zZXRf dnFfdmVjdG9yKHZmLCBpLCB2ZWN0b3IpOwo+ID4gKwkJfQo+ID4gKwl9Cj4gPiAtCW1heF9pbnRy ID0gdmYtPm5yX3ZyaW5nICsgMTsKPiA+ICsJdmYtPnZxc19zaGFyZWRfaXJxID0gLUVJTlZBTDsK PiA+ICsKPiA+ICsJcmV0dXJuIDA7Cj4gPiArfQo+ID4gKwo+ID4gK3N0YXRpYyBpbnQgaWZjdmZf cmVxdWVzdF9zaGFyZWRfdnFfaXJxKHN0cnVjdCBpZmN2Zl9hZGFwdGVyICphZGFwdGVyKQo+ID4g K3sKPiA+ICsJc3RydWN0IHBjaV9kZXYgKnBkZXYgPSBhZGFwdGVyLT5wZGV2Owo+ID4gKwlzdHJ1 Y3QgaWZjdmZfaHcgKnZmID0gJmFkYXB0ZXItPnZmOwo+ID4gKwlpbnQgaSwgdmVjdG9yLCByZXQs IGlycTsKPiA+ICsKPiA+ICsJdmVjdG9yID0gMDsKPiA+ICsJLyogcmV1c2UgbXNpeF9uYW1lWzI1 Nl0gc3BhY2Ugb2YgdnJpbmcwIHRvIHN0b3JlIHNoYXJlZCB2cXMgaW50ZXJydXB0IG5hbWUgKi8K PiAKPiAKPiBJIHRoaW5rIHdlIGNhbiByZW1vdmUgdGhpcyBjb21tZW50IHNpbmNlIHRoZSBjb2Rl IGlzIHN0cmFpZ2h0Zm9yd2FyZC4KPiAKPiAKPiA+ICsJc25wcmludGYodmYtPnZyaW5nWzBdLm1z aXhfbmFtZSwgMjU2LCAiaWZjdmZbJXNdLXZxcy1zaGFyZWQtaXJxXG4iLCBwY2lfbmFtZShwZGV2 KSk7Cj4gPiArCWlycSA9IHBjaV9pcnFfdmVjdG9yKHBkZXYsIHZlY3Rvcik7Cj4gPiArCXJldCA9 IGRldm1fcmVxdWVzdF9pcnEoJnBkZXYtPmRldiwgaXJxLAo+ID4gKwkJCSAgICAgICBpZmN2Zl92 cV9zaGFyZWRfaW50cl9oYW5kbGVyLCAwLAo+ID4gKwkJCSAgICAgICB2Zi0+dnJpbmdbMF0ubXNp eF9uYW1lLCB2Zik7Cj4gPiArCWlmIChyZXQpIHsKPiA+ICsJCUlGQ1ZGX0VSUihwZGV2LCAiRmFp bGVkIHRvIHJlcXVlc3Qgc2hhcmVkIGlycSBmb3IgdmZcbiIpOwo+ID4gKwo+ID4gKwkJcmV0dXJu IHJldDsKPiA+ICsJfQo+ID4gKwo+ID4gKwl2Zi0+dnFzX3NoYXJlZF9pcnEgPSBpcnE7Cj4gPiAr CWZvciAoaSA9IDA7IGkgPCB2Zi0+bnJfdnJpbmc7IGkrKykgewo+ID4gKwkJdmYtPnZyaW5nW2ld LmlycSA9IC1FSU5WQUw7Cj4gPiArCQlpZmN2Zl9zZXRfdnFfdmVjdG9yKHZmLCBpLCB2ZWN0b3Ip Owo+ID4gKwl9Cj4gPiArCj4gPiArCXJldHVybiAwOwo+ID4gKwo+ID4gK30KPiA+ICsKPiA+ICtz dGF0aWMgaW50IGlmY3ZmX3JlcXVlc3RfZGV2X3NoYXJlZF9pcnEoc3RydWN0IGlmY3ZmX2FkYXB0 ZXIgKmFkYXB0ZXIpCj4gPiArewo+ID4gKwlzdHJ1Y3QgcGNpX2RldiAqcGRldiA9IGFkYXB0ZXIt PnBkZXY7Cj4gPiArCXN0cnVjdCBpZmN2Zl9odyAqdmYgPSAmYWRhcHRlci0+dmY7Cj4gPiArCWlu dCBpLCB2ZWN0b3IsIHJldCwgaXJxOwo+ID4gKwo+ID4gKwl2ZWN0b3IgPSAwOwo+ID4gKwkvKiBy ZXVzZSBtc2l4X25hbWVbMjU2XSBzcGFjZSBvZiB2cmluZzAgdG8gc3RvcmUgc2hhcmVkIGRldmlj ZSBpbnRlcnJ1cHQgbmFtZSAqLwo+ID4gKwlzbnByaW50Zih2Zi0+dnJpbmdbMF0ubXNpeF9uYW1l LCAyNTYsICJpZmN2Zlslc10tZGV2LXNoYXJlZC1pcnFcbiIsIHBjaV9uYW1lKHBkZXYpKTsKPiA+ ICsJaXJxID0gcGNpX2lycV92ZWN0b3IocGRldiwgdmVjdG9yKTsKPiA+ICsJcmV0ID0gZGV2bV9y ZXF1ZXN0X2lycSgmcGRldi0+ZGV2LCBpcnEsCj4gPiArCQkJICAgICAgIGlmY3ZmX2Rldl9zaGFy ZWRfaW50cl9oYW5kbGVyLCAwLAo+ID4gKwkJCSAgICAgICB2Zi0+dnJpbmdbMF0ubXNpeF9uYW1l LCB2Zik7Cj4gPiArCWlmIChyZXQpIHsKPiA+ICsJCUlGQ1ZGX0VSUihwZGV2LCAiRmFpbGVkIHRv IHJlcXVlc3Qgc2hhcmVkIGlycSBmb3IgdmZcbiIpOwo+ID4gLQlyZXQgPSBwY2lfYWxsb2NfaXJx X3ZlY3RvcnMocGRldiwgbWF4X2ludHIsCj4gPiAtCQkJCSAgICBtYXhfaW50ciwgUENJX0lSUV9N U0lYKTsKPiA+IC0JaWYgKHJldCA8IDApIHsKPiA+IC0JCUlGQ1ZGX0VSUihwZGV2LCAiRmFpbGVk IHRvIGFsbG9jIElSUSB2ZWN0b3JzXG4iKTsKPiA+ICAgCQlyZXR1cm4gcmV0Owo+ID4gICAJfQo+ ID4gKwl2Zi0+dnFzX3NoYXJlZF9pcnEgPSBpcnE7Cj4gPiArCWZvciAoaSA9IDA7IGkgPCB2Zi0+ bnJfdnJpbmc7IGkrKykgewo+ID4gKwkJdmYtPnZyaW5nW2ldLmlycSA9IC1FSU5WQUw7Cj4gPiAr CQlpZmN2Zl9zZXRfdnFfdmVjdG9yKHZmLCBpLCB2ZWN0b3IpOwo+ID4gKwl9Cj4gPiArCj4gPiAr CXZmLT5jb25maWdfaXJxID0gaXJxOwo+ID4gKwlpZmN2Zl9zZXRfY29uZmlnX3ZlY3Rvcih2Ziwg dmVjdG9yKTsKPiA+ICsKPiA+ICsJcmV0dXJuIDA7Cj4gPiArCj4gPiArfQo+ID4gKwo+ID4gK3N0 YXRpYyBpbnQgaWZjdmZfcmVxdWVzdF92cV9pcnEoc3RydWN0IGlmY3ZmX2FkYXB0ZXIgKmFkYXB0 ZXIpCj4gPiArewo+ID4gKwlzdHJ1Y3QgaWZjdmZfaHcgKnZmID0gJmFkYXB0ZXItPnZmOwo+ID4g KwlpbnQgcmV0Owo+ID4gKwo+ID4gKwlpZiAodmYtPm1zaXhfdmVjdG9yX3N0YXR1cyA9PSBNU0lY X1ZFQ1RPUl9QRVJfVlFfQU5EX0NPTkZJRykKPiA+ICsJCXJldCA9IGlmY3ZmX3JlcXVlc3RfcGVy X3ZxX2lycShhZGFwdGVyKTsKPiA+ICsJZWxzZQo+ID4gKwkJcmV0ID0gaWZjdmZfcmVxdWVzdF9z aGFyZWRfdnFfaXJxKGFkYXB0ZXIpOwo+ID4gKwo+ID4gKwlyZXR1cm4gcmV0Owo+ID4gK30KPiA+ ICsKPiA+ICtzdGF0aWMgaW50IGlmY3ZmX3JlcXVlc3RfY29uZmlnX2lycShzdHJ1Y3QgaWZjdmZf YWRhcHRlciAqYWRhcHRlcikKPiA+ICt7Cj4gPiArCXN0cnVjdCBwY2lfZGV2ICpwZGV2ID0gYWRh cHRlci0+cGRldjsKPiA+ICsJc3RydWN0IGlmY3ZmX2h3ICp2ZiA9ICZhZGFwdGVyLT52ZjsKPiA+ ICsJaW50IGNvbmZpZ192ZWN0b3IsIHJldDsKPiA+ICsKPiA+ICsJaWYgKHZmLT5tc2l4X3ZlY3Rv cl9zdGF0dXMgPT0gTVNJWF9WRUNUT1JfREVWX1NIQVJFRCkKPiA+ICsJCXJldHVybiAwOwo+ID4g Kwo+ID4gKwlpZiAodmYtPm1zaXhfdmVjdG9yX3N0YXR1cyA9PSBNU0lYX1ZFQ1RPUl9QRVJfVlFf QU5EX0NPTkZJRykKPiA+ICsJCS8qIHZlY3RvciAwIH4gdmYtPm5yX3ZyaW5nIGZvciB2cXMsIG51 bSB2Zi0+bnJfdnJpbmcgdmVjdG9yIGZvciBjb25maWcgaW50ZXJydXB0ICovCj4gPiArCQljb25m aWdfdmVjdG9yID0gdmYtPm5yX3ZyaW5nOwo+ID4gKwo+ID4gKwlpZiAodmYtPm1zaXhfdmVjdG9y X3N0YXR1cyA9PSAgTVNJWF9WRUNUT1JfU0hBUkVEX1ZRX0FORF9DT05GSUcpCj4gPiArCQkvKiB2 ZWN0b3IgMCBmb3IgdnFzIGFuZCAxIGZvciBjb25maWcgaW50ZXJydXB0ICovCj4gPiArCQljb25m aWdfdmVjdG9yID0gMTsKPiA+ICsKPiA+ICAgCXNucHJpbnRmKHZmLT5jb25maWdfbXNpeF9uYW1l LCAyNTYsICJpZmN2Zlslc10tY29uZmlnXG4iLAo+ID4gICAJCSBwY2lfbmFtZShwZGV2KSk7Cj4g PiAtCXZlY3RvciA9IDA7Cj4gPiAtCXZmLT5jb25maWdfaXJxID0gcGNpX2lycV92ZWN0b3IocGRl diwgdmVjdG9yKTsKPiA+ICsJdmYtPmNvbmZpZ19pcnEgPSBwY2lfaXJxX3ZlY3RvcihwZGV2LCBj b25maWdfdmVjdG9yKTsKPiA+ICAgCXJldCA9IGRldm1fcmVxdWVzdF9pcnEoJnBkZXYtPmRldiwg dmYtPmNvbmZpZ19pcnEsCj4gPiAgIAkJCSAgICAgICBpZmN2Zl9jb25maWdfY2hhbmdlZCwgMCwK PiA+ICAgCQkJICAgICAgIHZmLT5jb25maWdfbXNpeF9uYW1lLCB2Zik7Cj4gPiAgIAlpZiAocmV0 KSB7Cj4gPiAgIAkJSUZDVkZfRVJSKHBkZXYsICJGYWlsZWQgdG8gcmVxdWVzdCBjb25maWcgaXJx XG4iKTsKPiA+ICsJCWlmY3ZmX2ZyZWVfdnFfaXJxKGFkYXB0ZXIsIHZmLT5ucl92cmluZyk7Cj4g PiAgIAkJcmV0dXJuIHJldDsKPiA+ICAgCX0KPiA+IC0JZm9yIChpID0gMDsgaSA8IHZmLT5ucl92 cmluZzsgaSsrKSB7Cj4gPiAtCQlzbnByaW50Zih2Zi0+dnJpbmdbaV0ubXNpeF9uYW1lLCAyNTYs ICJpZmN2Zlslc10tJWRcbiIsCj4gPiAtCQkJIHBjaV9uYW1lKHBkZXYpLCBpKTsKPiA+IC0JCXZl Y3RvciA9IGkgKyBJRkNWRl9NU0lfUVVFVUVfT0ZGOwo+ID4gLQkJaXJxID0gcGNpX2lycV92ZWN0 b3IocGRldiwgdmVjdG9yKTsKPiA+IC0JCXJldCA9IGRldm1fcmVxdWVzdF9pcnEoJnBkZXYtPmRl diwgaXJxLAo+ID4gLQkJCQkgICAgICAgaWZjdmZfaW50cl9oYW5kbGVyLCAwLAo+ID4gLQkJCQkg ICAgICAgdmYtPnZyaW5nW2ldLm1zaXhfbmFtZSwKPiA+IC0JCQkJICAgICAgICZ2Zi0+dnJpbmdb aV0pOwo+ID4gLQkJaWYgKHJldCkgewo+ID4gLQkJCUlGQ1ZGX0VSUihwZGV2LAo+ID4gLQkJCQkg ICJGYWlsZWQgdG8gcmVxdWVzdCBpcnEgZm9yIHZxICVkXG4iLCBpKTsKPiA+IC0JCQlpZmN2Zl9m cmVlX2lycShhZGFwdGVyLCBpKTsKPiA+ICsJaWZjdmZfc2V0X2NvbmZpZ192ZWN0b3IodmYsIGNv bmZpZ192ZWN0b3IpOwo+ID4gLQkJCXJldHVybiByZXQ7Cj4gPiAtCQl9Cj4gPiArCXJldHVybiAw Owo+ID4gK30KPiA+ICsKPiA+ICtzdGF0aWMgaW50IGlmY3ZmX3JlcXVlc3RfaXJxKHN0cnVjdCBp ZmN2Zl9hZGFwdGVyICphZGFwdGVyKQo+ID4gK3sKPiAKPiAKPiBBcyByZXBsaWVkIGFib3ZlLCBJ IHRoaW5rIGhhdmluZyB0d28gbW9kZXMgc2hvdWxkIGJlIHN1ZmZpY2llbnQgYW5kIHRoZSBjb2Rl Cj4gY291bGQgYmUgZ3JlYXRseSBzaW1wbGlmaWVkLgo+IAo+IFRoYW5rcwo+IAoKV2VsbCBpdCBp cyBjbGFpbWVkIHRoZXJlIGFyZSBwbGF0Zm9ybXMgd2hlcmUgd2UgYXJlIHNob3J0Cm9uIHZlY3Rv cnMuIDMgdmVyc3VzIDIgc2VlbXMgYSA1MCUgc2F2aW5nLiBZb3UgZGlzYWdyZWU/Cgo+ID4gKwlz dHJ1Y3QgaWZjdmZfaHcgKnZmID0gJmFkYXB0ZXItPnZmOwo+ID4gKwlpbnQgbnZlY3RvcnMsIHJl dCwgbWF4X2ludHI7Cj4gPiAtCQl2Zi0+dnJpbmdbaV0uaXJxID0gaXJxOwo+ID4gKwludmVjdG9y cyA9IGlmY3ZmX2FsbG9jX3ZlY3RvcnMoYWRhcHRlcik7Cj4gPiArCWlmICghKG52ZWN0b3JzID4g MCkpCj4gPiArCQlyZXR1cm4gbnZlY3RvcnM7Cj4gPiArCj4gPiArCXZmLT5tc2l4X3ZlY3Rvcl9z dGF0dXMgPSBNU0lYX1ZFQ1RPUl9QRVJfVlFfQU5EX0NPTkZJRzsKPiA+ICsJbWF4X2ludHIgPSB2 Zi0+bnJfdnJpbmcgKyAxOwo+ID4gKwlpZiAobnZlY3RvcnMgPCBtYXhfaW50cikKPiA+ICsJCXZm LT5tc2l4X3ZlY3Rvcl9zdGF0dXMgPSBNU0lYX1ZFQ1RPUl9TSEFSRURfVlFfQU5EX0NPTkZJRzsK PiA+ICsKPiA+ICsJaWYgKG52ZWN0b3JzID09IDEpIHsKPiA+ICsJCXZmLT5tc2l4X3ZlY3Rvcl9z dGF0dXMgPSBNU0lYX1ZFQ1RPUl9ERVZfU0hBUkVEOwo+ID4gKwkJcmV0ID0gaWZjdmZfcmVxdWVz dF9kZXZfc2hhcmVkX2lycShhZGFwdGVyKTsKPiA+ICsKPiA+ICsJCXJldHVybiByZXQ7Cj4gPiAg IAl9Cj4gPiArCXJldCA9IGlmY3ZmX3JlcXVlc3RfdnFfaXJxKGFkYXB0ZXIpOwo+ID4gKwlpZiAo cmV0KQo+ID4gKwkJcmV0dXJuIHJldDsKPiA+ICsKPiA+ICsJcmV0ID0gaWZjdmZfcmVxdWVzdF9j b25maWdfaXJxKGFkYXB0ZXIpOwo+ID4gKwo+ID4gKwlpZiAocmV0KQo+ID4gKwkJcmV0dXJuIHJl dDsKPiA+ICsKPiA+ICAgCXJldHVybiAwOwo+ID4gICB9Cj4gPiBAQCAtNDQxLDcgKzYxMSwxMCBA QCBzdGF0aWMgaW50IGlmY3ZmX3ZkcGFfZ2V0X3ZxX2lycShzdHJ1Y3QgdmRwYV9kZXZpY2UgKnZk cGFfZGV2LAo+ID4gICB7Cj4gPiAgIAlzdHJ1Y3QgaWZjdmZfaHcgKnZmID0gdmRwYV90b192Zih2 ZHBhX2Rldik7Cj4gPiAtCXJldHVybiB2Zi0+dnJpbmdbcWlkXS5pcnE7Cj4gPiArCWlmICh2Zi0+ dnFzX3NoYXJlZF9pcnEgPCAwKQo+ID4gKwkJcmV0dXJuIHZmLT52cmluZ1txaWRdLmlycTsKPiA+ ICsJZWxzZQo+ID4gKwkJcmV0dXJuIC1FSU5WQUw7Cj4gPiAgIH0KPiA+ICAgc3RhdGljIHN0cnVj dCB2ZHBhX25vdGlmaWNhdGlvbl9hcmVhIGlmY3ZmX2dldF92cV9ub3RpZmljYXRpb24oc3RydWN0 IHZkcGFfZGV2aWNlICp2ZHBhX2RldiwKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fClZpcnR1YWxpemF0aW9uIG1haWxpbmcgbGlzdApWaXJ0dWFsaXphdGlv bkBsaXN0cy5saW51eC1mb3VuZGF0aW9uLm9yZwpodHRwczovL2xpc3RzLmxpbnV4Zm91bmRhdGlv bi5vcmcvbWFpbG1hbi9saXN0aW5mby92aXJ0dWFsaXphdGlvbg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF8EFC433EF for ; Mon, 14 Feb 2022 14:25:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243275AbiBNOZ5 (ORCPT ); Mon, 14 Feb 2022 09:25:57 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:58518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355106AbiBNOZj (ORCPT ); Mon, 14 Feb 2022 09:25:39 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DEC184AE3A for ; Mon, 14 Feb 2022 06:25:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1644848730; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zJx2023ovQY+XjddZA8x6kaA/UGecR5XZ/Sz2QIDmz8=; b=IRsTT3rpH27bN8Anle0pwuhsgpB8aR0vJYn8DefQHlu/4kLeNwvKhEKd6k/ihTsbM0hSWx mf9B0lEkA+RyR9N4ekOHtiGvF28UVA9EM3b0z3MMJSOalU5fHLZYAvmvFTlaK1X/0AIGTk BIfq1f9Wu3uJL9d42vvWPkvboXML/z8= Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-281-n0afPqptPAuxHE5CdmQQfQ-1; Mon, 14 Feb 2022 09:25:28 -0500 X-MC-Unique: n0afPqptPAuxHE5CdmQQfQ-1 Received: by mail-wm1-f70.google.com with SMTP id v185-20020a1cacc2000000b0034906580813so9570597wme.1 for ; Mon, 14 Feb 2022 06:25:28 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=zJx2023ovQY+XjddZA8x6kaA/UGecR5XZ/Sz2QIDmz8=; b=ipDiPA4FOfBXPn+/RCtzqvFRoDnLJ58Vrara9MmcT27QDEarJJTb0ZcaHwQ0t8Ehkn bdtXsAoYrqEAqHs+l1Wx5OVDmz9ThPqR8q/HVAYqnfFAvifH68E0CZTBkHaUVhTZU5ZU 85baNFs05BSO0L2aiKdQ7mfGBXB2ZKr7VRNGsBLIYzn2zF+18A8YIKqW5Ews4LR1mO2O gkqc4vtkozx3uy+9WMOUXpZVZN7kQqJlgLcDkzgtGR/O2IXJmTZLEwZYLxUw5RoN9Okl RorlOyKt6L0u3G37AzR4xrWpJN4FSHq+8HxZwC7lKHsog9vhY16aeBhXUPn0HPwAOJk2 yo6g== X-Gm-Message-State: AOAM5333fKhRxEAmHo8EQ5Zevm1BllO1lsaCWXAvRkN0Q2RDUZBwVDqJ 0k29TK/LgCR+NGzEK2Y7scE0KTwzXMpfTF+c5Vhj+RxwtUE4GeYoKMGoCYtyxXrIZZygLKRY83C BcylrRivv4V6nPUpm X-Received: by 2002:adf:e112:: with SMTP id t18mr11805725wrz.411.1644848727118; Mon, 14 Feb 2022 06:25:27 -0800 (PST) X-Google-Smtp-Source: ABdhPJx2ISDjT9Ec9wZciPbCs/onDCPNkKqyIaiaGH5CI/UHFiZsr5vJaOyLJ0YF0Ram0MJcqDNQ0A== X-Received: by 2002:adf:e112:: with SMTP id t18mr11805695wrz.411.1644848726666; Mon, 14 Feb 2022 06:25:26 -0800 (PST) Received: from redhat.com ([2.55.156.76]) by smtp.gmail.com with ESMTPSA id x5sm22856366wrv.63.2022.02.14.06.25.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Feb 2022 06:25:26 -0800 (PST) Date: Mon, 14 Feb 2022 09:25:23 -0500 From: "Michael S. Tsirkin" To: Jason Wang Cc: Zhu Lingshan , netdev@vger.kernel.org, virtualization@lists.linux-foundation.org Subject: Re: [PATCH V4 4/4] vDPA/ifcvf: implement shared IRQ feature Message-ID: <20220214091842-mutt-send-email-mst@kernel.org> References: <20220203072735.189716-1-lingshan.zhu@intel.com> <20220203072735.189716-5-lingshan.zhu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Mon, Feb 14, 2022 at 03:19:25PM +0800, Jason Wang wrote: > > 在 2022/2/3 下午3:27, Zhu Lingshan 写道: > > On some platforms/devices, there may not be enough MSI vector > > slots allocated for virtqueues and config changes. In such a case, > > the interrupt sources(virtqueues, config changes) must share > > an IRQ/vector, to avoid initialization failures, keep > > the device functional. > > > > This commit handles three cases: > > (1) number of the allocated vectors == the number of virtqueues + 1 > > (config changes), every virtqueue and the config interrupt has > > a separated vector/IRQ, the best and the most likely case. > > (2) number of the allocated vectors is less than the best case, but > > greater than 1. In this case, all virtqueues share a vector/IRQ, > > the config interrupt has a separated vector/IRQ > > (3) only one vector is allocated, in this case, the virtqueues and > > the config interrupt share a vector/IRQ. The worst and most > > unlikely case. > > > > Otherwise, it needs to fail. > > > > This commit introduces some helper functions: > > ifcvf_set_vq_vector() and ifcvf_set_config_vector() sets virtqueue > > vector and config vector in the device config space, so that > > the device can send interrupt DMA. > > > > This commit adds some fields in struct ifcvf_hw and re-placed > > the existed fields to be aligned with the cacheline. > > > > Signed-off-by: Zhu Lingshan > > --- > > drivers/vdpa/ifcvf/ifcvf_base.c | 47 ++++-- > > drivers/vdpa/ifcvf/ifcvf_base.h | 23 ++- > > drivers/vdpa/ifcvf/ifcvf_main.c | 243 +++++++++++++++++++++++++++----- > > 3 files changed, 256 insertions(+), 57 deletions(-) > > > > diff --git a/drivers/vdpa/ifcvf/ifcvf_base.c b/drivers/vdpa/ifcvf/ifcvf_base.c > > index 397692ae671c..18dcb63ab1e3 100644 > > --- a/drivers/vdpa/ifcvf/ifcvf_base.c > > +++ b/drivers/vdpa/ifcvf/ifcvf_base.c > > @@ -15,6 +15,36 @@ struct ifcvf_adapter *vf_to_adapter(struct ifcvf_hw *hw) > > return container_of(hw, struct ifcvf_adapter, vf); > > } > > +int ifcvf_set_vq_vector(struct ifcvf_hw *hw, u16 qid, int vector) > > +{ > > + struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg; > > + struct ifcvf_adapter *ifcvf = vf_to_adapter(hw); > > + > > + ifc_iowrite16(qid, &cfg->queue_select); > > + ifc_iowrite16(vector, &cfg->queue_msix_vector); > > + if (ifc_ioread16(&cfg->queue_msix_vector) == VIRTIO_MSI_NO_VECTOR) { > > + IFCVF_ERR(ifcvf->pdev, "No msix vector for queue %u\n", qid); > > + return -EINVAL; > > + } > > > Let's leave this check for the caller, E.g can caller try to assign > NO_VECTOR during uni-nit? Hmm I'm not sure I agree. Caller will have to write queue select again, and that's an extra IO, which is a waste. And having function checking itself just seems better contained. > > > + > > + return 0; > > +} > > + > > +int ifcvf_set_config_vector(struct ifcvf_hw *hw, int vector) > > +{ > > + struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg; > > + struct ifcvf_adapter *ifcvf = vf_to_adapter(hw); > > + > > + cfg = hw->common_cfg; > > + ifc_iowrite16(vector, &cfg->msix_config); > > + if (ifc_ioread16(&cfg->msix_config) == VIRTIO_MSI_NO_VECTOR) { > > + IFCVF_ERR(ifcvf->pdev, "No msix vector for device config\n"); > > + return -EINVAL; > > + } > > > Similar question as above. > > > > + > > + return 0; > > +} > > + > > static void __iomem *get_cap_addr(struct ifcvf_hw *hw, > > struct virtio_pci_cap *cap) > > { > > @@ -140,6 +170,8 @@ int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *pdev) > > hw->common_cfg, hw->notify_base, hw->isr, > > hw->dev_cfg, hw->notify_off_multiplier); > > + hw->vqs_shared_irq = -EINVAL; > > + > > return 0; > > } > > @@ -321,12 +353,6 @@ static int ifcvf_hw_enable(struct ifcvf_hw *hw) > > ifcvf = vf_to_adapter(hw); > > cfg = hw->common_cfg; > > - ifc_iowrite16(IFCVF_MSI_CONFIG_OFF, &cfg->msix_config); > > - > > - if (ifc_ioread16(&cfg->msix_config) == VIRTIO_MSI_NO_VECTOR) { > > - IFCVF_ERR(ifcvf->pdev, "No msix vector for device config\n"); > > - return -EINVAL; > > - } > > for (i = 0; i < hw->nr_vring; i++) { > > if (!hw->vring[i].ready) > > @@ -340,15 +366,6 @@ static int ifcvf_hw_enable(struct ifcvf_hw *hw) > > ifc_iowrite64_twopart(hw->vring[i].used, &cfg->queue_used_lo, > > &cfg->queue_used_hi); > > ifc_iowrite16(hw->vring[i].size, &cfg->queue_size); > > - ifc_iowrite16(i + IFCVF_MSI_QUEUE_OFF, &cfg->queue_msix_vector); > > - > > - if (ifc_ioread16(&cfg->queue_msix_vector) == > > - VIRTIO_MSI_NO_VECTOR) { > > - IFCVF_ERR(ifcvf->pdev, > > - "No msix vector for queue %u\n", i); > > - return -EINVAL; > > - } > > - > > ifcvf_set_vq_state(hw, i, hw->vring[i].last_avail_idx); > > ifc_iowrite16(1, &cfg->queue_enable); > > } > > diff --git a/drivers/vdpa/ifcvf/ifcvf_base.h b/drivers/vdpa/ifcvf/ifcvf_base.h > > index 949b4fb9d554..9cfe088c82e9 100644 > > --- a/drivers/vdpa/ifcvf/ifcvf_base.h > > +++ b/drivers/vdpa/ifcvf/ifcvf_base.h > > @@ -27,8 +27,6 @@ > > #define IFCVF_QUEUE_ALIGNMENT PAGE_SIZE > > #define IFCVF_QUEUE_MAX 32768 > > -#define IFCVF_MSI_CONFIG_OFF 0 > > -#define IFCVF_MSI_QUEUE_OFF 1 > > #define IFCVF_PCI_MAX_RESOURCE 6 > > #define IFCVF_LM_CFG_SIZE 0x40 > > @@ -42,6 +40,13 @@ > > #define ifcvf_private_to_vf(adapter) \ > > (&((struct ifcvf_adapter *)adapter)->vf) > > +/* all vqs and config interrupt has its own vector */ > > +#define MSIX_VECTOR_PER_VQ_AND_CONFIG 1 > > +/* all vqs share a vector, and config interrupt has a separate vector */ > > +#define MSIX_VECTOR_SHARED_VQ_AND_CONFIG 2 > > +/* all vqs and config interrupt share a vector */ > > +#define MSIX_VECTOR_DEV_SHARED 3 > > > I think there's no much value to differ 2 from 3 consider config interrupt > should be rare. Yes but if we do not have a dedicated vector then we need an extra device IO (in fact, a read) on each interrupt. > > > + > > static inline u8 ifc_ioread8(u8 __iomem *addr) > > { > > return ioread8(addr); > > @@ -97,25 +102,27 @@ struct ifcvf_hw { > > u8 __iomem *isr; > > /* Live migration */ > > u8 __iomem *lm_cfg; > > - u16 nr_vring; > > > Any reason for moving nv_vring, config_size, and other stuffs? > > > > /* Notification bar number */ > > u8 notify_bar; > > + u8 msix_vector_status; > > + /* virtio-net or virtio-blk device config size */ > > + u32 config_size; > > /* Notificaiton bar address */ > > void __iomem *notify_base; > > phys_addr_t notify_base_pa; > > u32 notify_off_multiplier; > > + u32 dev_type; > > u64 req_features; > > u64 hw_features; > > - u32 dev_type; > > struct virtio_pci_common_cfg __iomem *common_cfg; > > void __iomem *dev_cfg; > > struct vring_info vring[IFCVF_MAX_QUEUES]; > > void __iomem * const *base; > > char config_msix_name[256]; > > struct vdpa_callback config_cb; > > - unsigned int config_irq; > > - /* virtio-net or virtio-blk device config size */ > > - u32 config_size; > > + int config_irq; > > + int vqs_shared_irq; > > + u16 nr_vring; > > }; > > struct ifcvf_adapter { > > @@ -160,4 +167,6 @@ int ifcvf_set_vq_state(struct ifcvf_hw *hw, u16 qid, u16 num); > > struct ifcvf_adapter *vf_to_adapter(struct ifcvf_hw *hw); > > int ifcvf_probed_virtio_net(struct ifcvf_hw *hw); > > u32 ifcvf_get_config_size(struct ifcvf_hw *hw); > > +int ifcvf_set_vq_vector(struct ifcvf_hw *hw, u16 qid, int vector); > > +int ifcvf_set_config_vector(struct ifcvf_hw *hw, int vector); > > #endif /* _IFCVF_H_ */ > > diff --git a/drivers/vdpa/ifcvf/ifcvf_main.c b/drivers/vdpa/ifcvf/ifcvf_main.c > > index 44c89ab0b6da..ca414399f040 100644 > > --- a/drivers/vdpa/ifcvf/ifcvf_main.c > > +++ b/drivers/vdpa/ifcvf/ifcvf_main.c > > @@ -17,6 +17,7 @@ > > #define DRIVER_AUTHOR "Intel Corporation" > > #define IFCVF_DRIVER_NAME "ifcvf" > > +/* handles config interrupt */ > > > This seems unrelated to the shared IRQ logic and it looks useless since it's > easily to deduce it from the function name below. > > > > static irqreturn_t ifcvf_config_changed(int irq, void *arg) > > { > > struct ifcvf_hw *vf = arg; > > @@ -27,6 +28,7 @@ static irqreturn_t ifcvf_config_changed(int irq, void *arg) > > return IRQ_HANDLED; > > } > > +/* handles vqs interrupt */ > > > So did this. > > > > static irqreturn_t ifcvf_intr_handler(int irq, void *arg) > > { > > struct vring_info *vring = arg; > > @@ -37,24 +39,78 @@ static irqreturn_t ifcvf_intr_handler(int irq, void *arg) > > return IRQ_HANDLED; > > } > > +/* handls vqs shared interrupt */ > > +static irqreturn_t ifcvf_vq_shared_intr_handler(int irq, void *arg) > > +{ > > + struct ifcvf_hw *vf = arg; > > + struct vring_info *vring; > > + int i; > > + > > + for (i = 0; i < vf->nr_vring; i++) { > > + vring = &vf->vring[i]; > > + if (vring->cb.callback) > > + vf->vring->cb.callback(vring->cb.private); > > + } > > + > > + return IRQ_HANDLED; > > +} > > + > > +/* handles a shared interrupt for vqs and config */ > > +static irqreturn_t ifcvf_dev_shared_intr_handler(int irq, void *arg) shared is not a good name given IRQ_SHARED is not set. maybe "common"? "reused"? > > +{ > > + struct ifcvf_hw *vf = arg; > > + u8 isr; > > + > > + isr = ifc_ioread8(vf->isr); > > > We need to exactly what vp_interrupt do here. Checking against vf->isr first > and return IRQ_NONE if it is not set. no, vf->isr is not set for VQ interrupts. If need to actually poke at the VQ to know. > Always return IRQ_HANDLED will break the device who shares an irq with > IFCVF. It's a MSI, not INT#. So interrupt is not shared as such - it's only sharing vector between config and vq. > > > + if (isr & VIRTIO_PCI_ISR_CONFIG) > > + ifcvf_config_changed(irq, arg); > > + > > + return ifcvf_vq_shared_intr_handler(irq, arg); > > +} > > + > > static void ifcvf_free_irq_vectors(void *data) > > { > > pci_free_irq_vectors(data); > > } > > -static void ifcvf_free_irq(struct ifcvf_adapter *adapter, int queues) > > +static void ifcvf_free_vq_irq(struct ifcvf_adapter *adapter, int queues) > > { > > struct pci_dev *pdev = adapter->pdev; > > struct ifcvf_hw *vf = &adapter->vf; > > int i; > > + if (vf->msix_vector_status == MSIX_VECTOR_PER_VQ_AND_CONFIG) { > > + for (i = 0; i < queues; i++) { > > + devm_free_irq(&pdev->dev, vf->vring[i].irq, &vf->vring[i]); > > + vf->vring[i].irq = -EINVAL; > > + } > > + } else { > > + devm_free_irq(&pdev->dev, vf->vqs_shared_irq, vf); > > + vf->vqs_shared_irq = -EINVAL; > > + } > > +} > > - for (i = 0; i < queues; i++) { > > - devm_free_irq(&pdev->dev, vf->vring[i].irq, &vf->vring[i]); > > - vf->vring[i].irq = -EINVAL; > > +static void ifcvf_free_config_irq(struct ifcvf_adapter *adapter) > > +{ > > + struct pci_dev *pdev = adapter->pdev; > > + struct ifcvf_hw *vf = &adapter->vf; > > + > > + /* If the irq is shared by all vqs and the config interrupt, > > + * it is already freed in ifcvf_free_vq_irq, so here only > > + * need to free config irq when msix_vector_status != MSIX_VECTOR_DEV_SHARED > > + */ > > + if (vf->msix_vector_status != MSIX_VECTOR_DEV_SHARED) { > > + devm_free_irq(&pdev->dev, vf->config_irq, vf); > > + vf->config_irq = -EINVAL; > > } > > +} > > + > > +static void ifcvf_free_irq(struct ifcvf_adapter *adapter, int queues) > > +{ > > + struct pci_dev *pdev = adapter->pdev; > > - devm_free_irq(&pdev->dev, vf->config_irq, vf); > > + ifcvf_free_vq_irq(adapter, queues); > > + ifcvf_free_config_irq(adapter); > > ifcvf_free_irq_vectors(pdev); > > } > > @@ -86,58 +142,172 @@ static int ifcvf_alloc_vectors(struct ifcvf_adapter *adapter) > > return ret; > > } > > -static int ifcvf_request_irq(struct ifcvf_adapter *adapter) > > +static int ifcvf_request_per_vq_irq(struct ifcvf_adapter *adapter) > > { > > struct pci_dev *pdev = adapter->pdev; > > struct ifcvf_hw *vf = &adapter->vf; > > - int vector, nvectors, i, ret, irq; > > - u16 max_intr; > > + int i, vector, ret, irq; > > - nvectors = ifcvf_alloc_vectors(adapter); > > - if (!(nvectors > 0)) > > - return nvectors; > > + for (i = 0; i < vf->nr_vring; i++) { > > + snprintf(vf->vring[i].msix_name, 256, "ifcvf[%s]-%d\n", pci_name(pdev), i); > > + vector = i; > > + irq = pci_irq_vector(pdev, vector); > > + ret = devm_request_irq(&pdev->dev, irq, > > + ifcvf_intr_handler, 0, > > + vf->vring[i].msix_name, > > + &vf->vring[i]); > > + if (ret) { > > + IFCVF_ERR(pdev, "Failed to request irq for vq %d\n", i); > > + ifcvf_free_vq_irq(adapter, i); > > + } else { > > + vf->vring[i].irq = irq; > > + ifcvf_set_vq_vector(vf, i, vector); > > + } > > + } > > - max_intr = vf->nr_vring + 1; > > + vf->vqs_shared_irq = -EINVAL; > > + > > + return 0; > > +} > > + > > +static int ifcvf_request_shared_vq_irq(struct ifcvf_adapter *adapter) > > +{ > > + struct pci_dev *pdev = adapter->pdev; > > + struct ifcvf_hw *vf = &adapter->vf; > > + int i, vector, ret, irq; > > + > > + vector = 0; > > + /* reuse msix_name[256] space of vring0 to store shared vqs interrupt name */ > > > I think we can remove this comment since the code is straightforward. > > > > + snprintf(vf->vring[0].msix_name, 256, "ifcvf[%s]-vqs-shared-irq\n", pci_name(pdev)); > > + irq = pci_irq_vector(pdev, vector); > > + ret = devm_request_irq(&pdev->dev, irq, > > + ifcvf_vq_shared_intr_handler, 0, > > + vf->vring[0].msix_name, vf); > > + if (ret) { > > + IFCVF_ERR(pdev, "Failed to request shared irq for vf\n"); > > + > > + return ret; > > + } > > + > > + vf->vqs_shared_irq = irq; > > + for (i = 0; i < vf->nr_vring; i++) { > > + vf->vring[i].irq = -EINVAL; > > + ifcvf_set_vq_vector(vf, i, vector); > > + } > > + > > + return 0; > > + > > +} > > + > > +static int ifcvf_request_dev_shared_irq(struct ifcvf_adapter *adapter) > > +{ > > + struct pci_dev *pdev = adapter->pdev; > > + struct ifcvf_hw *vf = &adapter->vf; > > + int i, vector, ret, irq; > > + > > + vector = 0; > > + /* reuse msix_name[256] space of vring0 to store shared device interrupt name */ > > + snprintf(vf->vring[0].msix_name, 256, "ifcvf[%s]-dev-shared-irq\n", pci_name(pdev)); > > + irq = pci_irq_vector(pdev, vector); > > + ret = devm_request_irq(&pdev->dev, irq, > > + ifcvf_dev_shared_intr_handler, 0, > > + vf->vring[0].msix_name, vf); > > + if (ret) { > > + IFCVF_ERR(pdev, "Failed to request shared irq for vf\n"); > > - ret = pci_alloc_irq_vectors(pdev, max_intr, > > - max_intr, PCI_IRQ_MSIX); > > - if (ret < 0) { > > - IFCVF_ERR(pdev, "Failed to alloc IRQ vectors\n"); > > return ret; > > } > > + vf->vqs_shared_irq = irq; > > + for (i = 0; i < vf->nr_vring; i++) { > > + vf->vring[i].irq = -EINVAL; > > + ifcvf_set_vq_vector(vf, i, vector); > > + } > > + > > + vf->config_irq = irq; > > + ifcvf_set_config_vector(vf, vector); > > + > > + return 0; > > + > > +} > > + > > +static int ifcvf_request_vq_irq(struct ifcvf_adapter *adapter) > > +{ > > + struct ifcvf_hw *vf = &adapter->vf; > > + int ret; > > + > > + if (vf->msix_vector_status == MSIX_VECTOR_PER_VQ_AND_CONFIG) > > + ret = ifcvf_request_per_vq_irq(adapter); > > + else > > + ret = ifcvf_request_shared_vq_irq(adapter); > > + > > + return ret; > > +} > > + > > +static int ifcvf_request_config_irq(struct ifcvf_adapter *adapter) > > +{ > > + struct pci_dev *pdev = adapter->pdev; > > + struct ifcvf_hw *vf = &adapter->vf; > > + int config_vector, ret; > > + > > + if (vf->msix_vector_status == MSIX_VECTOR_DEV_SHARED) > > + return 0; > > + > > + if (vf->msix_vector_status == MSIX_VECTOR_PER_VQ_AND_CONFIG) > > + /* vector 0 ~ vf->nr_vring for vqs, num vf->nr_vring vector for config interrupt */ > > + config_vector = vf->nr_vring; > > + > > + if (vf->msix_vector_status == MSIX_VECTOR_SHARED_VQ_AND_CONFIG) > > + /* vector 0 for vqs and 1 for config interrupt */ > > + config_vector = 1; > > + > > snprintf(vf->config_msix_name, 256, "ifcvf[%s]-config\n", > > pci_name(pdev)); > > - vector = 0; > > - vf->config_irq = pci_irq_vector(pdev, vector); > > + vf->config_irq = pci_irq_vector(pdev, config_vector); > > ret = devm_request_irq(&pdev->dev, vf->config_irq, > > ifcvf_config_changed, 0, > > vf->config_msix_name, vf); > > if (ret) { > > IFCVF_ERR(pdev, "Failed to request config irq\n"); > > + ifcvf_free_vq_irq(adapter, vf->nr_vring); > > return ret; > > } > > - for (i = 0; i < vf->nr_vring; i++) { > > - snprintf(vf->vring[i].msix_name, 256, "ifcvf[%s]-%d\n", > > - pci_name(pdev), i); > > - vector = i + IFCVF_MSI_QUEUE_OFF; > > - irq = pci_irq_vector(pdev, vector); > > - ret = devm_request_irq(&pdev->dev, irq, > > - ifcvf_intr_handler, 0, > > - vf->vring[i].msix_name, > > - &vf->vring[i]); > > - if (ret) { > > - IFCVF_ERR(pdev, > > - "Failed to request irq for vq %d\n", i); > > - ifcvf_free_irq(adapter, i); > > + ifcvf_set_config_vector(vf, config_vector); > > - return ret; > > - } > > + return 0; > > +} > > + > > +static int ifcvf_request_irq(struct ifcvf_adapter *adapter) > > +{ > > > As replied above, I think having two modes should be sufficient and the code > could be greatly simplified. > > Thanks > Well it is claimed there are platforms where we are short on vectors. 3 versus 2 seems a 50% saving. You disagree? > > + struct ifcvf_hw *vf = &adapter->vf; > > + int nvectors, ret, max_intr; > > - vf->vring[i].irq = irq; > > + nvectors = ifcvf_alloc_vectors(adapter); > > + if (!(nvectors > 0)) > > + return nvectors; > > + > > + vf->msix_vector_status = MSIX_VECTOR_PER_VQ_AND_CONFIG; > > + max_intr = vf->nr_vring + 1; > > + if (nvectors < max_intr) > > + vf->msix_vector_status = MSIX_VECTOR_SHARED_VQ_AND_CONFIG; > > + > > + if (nvectors == 1) { > > + vf->msix_vector_status = MSIX_VECTOR_DEV_SHARED; > > + ret = ifcvf_request_dev_shared_irq(adapter); > > + > > + return ret; > > } > > + ret = ifcvf_request_vq_irq(adapter); > > + if (ret) > > + return ret; > > + > > + ret = ifcvf_request_config_irq(adapter); > > + > > + if (ret) > > + return ret; > > + > > return 0; > > } > > @@ -441,7 +611,10 @@ static int ifcvf_vdpa_get_vq_irq(struct vdpa_device *vdpa_dev, > > { > > struct ifcvf_hw *vf = vdpa_to_vf(vdpa_dev); > > - return vf->vring[qid].irq; > > + if (vf->vqs_shared_irq < 0) > > + return vf->vring[qid].irq; > > + else > > + return -EINVAL; > > } > > static struct vdpa_notification_area ifcvf_get_vq_notification(struct vdpa_device *vdpa_dev,