From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AAA9AC433F5 for ; Thu, 17 Feb 2022 00:09:15 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 353F983A92; Thu, 17 Feb 2022 01:09:13 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="piW07D7y"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9DEE483A6B; Thu, 17 Feb 2022 01:09:05 +0100 (CET) Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5626383A77 for ; Thu, 17 Feb 2022 01:08:55 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=kabel@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C65E2B81EE6; Thu, 17 Feb 2022 00:08:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6076FC004E1; Thu, 17 Feb 2022 00:08:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645056533; bh=+NbD6muTtjtVV6B14MRkJ4iEVOyBIjETNx3iZDEA5UI=; h=From:To:Cc:Subject:Date:From; b=piW07D7yPtJkXWEnUGT4mPmsIGn9fHodNcJaNx1T5v+7O4mJCEd8xcAfKFRrf1RoC 5bH1gbpEZq5z68+5I0sIwtsC/smlYHybwyEm7jEdmdlrpkkjd1HR4T8jBAy6JziNsq Hgixc2xjmj03zzhqHD3W5h4iqqLZ2UucJ7TVP7U9iqHaolPZ3JYC06oCfQ1ydRxHQO +ACmEEb3qtJFT6kdUFice131kuWmJfVc8HZm5OBQN+wJZmgcJZgxLudu/eMz+9x2oV OdTG34WVwMyt2vWxz8usIprvjNEJipMEJi5xQ+mYoS7pIP573I90Rz4E70kMKcDiPx HLHQ09gcgAAOw== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Chris Packham , Stefan Roese Cc: "u-boot@lists.denx.de" , =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH u-boot-marvell 1/2] arm: mvebu: spl: Add option to reset the board on DDR training failure Date: Thu, 17 Feb 2022 01:08:48 +0100 Message-Id: <20220217000849.13028-1-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Marek Behún Some boards may occacionally fail DDR training. Currently we hang() in this case. Add an option that makes the board do an immediate reset in such a case, so that a new training is tried as soon as possible, instead of hanging and possibly waiting for watchdog to reset the board. Signed-off-by: Marek Behún --- arch/arm/mach-mvebu/Kconfig | 9 +++++++++ arch/arm/mach-mvebu/spl.c | 6 +++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index d23cc0c760..ed957be6e1 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -213,6 +213,15 @@ config DDR_LOG_LEVEL At level 3, rovides the windows margin of each DQ as a results of DQS centeralization. +config DDR_RESET_ON_TRAINING_FAILURE + bool "Reset the board on DDR training failure instead of hanging" + depends on ARMADA_38X || ARMADA_XP + help + If DDR training fails in SPL, reset the board instead of hanging. + Some boards are known to fail DDR training occasionally and an + immediate reset may be preferable to waiting until the board is + reset by watchdog (if there even is one). + config SYS_BOARD default "clearfog" if TARGET_CLEARFOG default "helios4" if TARGET_HELIOS4 diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 273ecb8bd6..d3c3bdc74d 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -330,7 +331,10 @@ void board_init_f(ulong dummy) ret = ddr3_init(); if (ret) { printf("ddr3_init() failed: %d\n", ret); - hang(); + if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE)) + reset_cpu(); + else + hang(); } #endif -- 2.34.1