From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7BA19C433FE for ; Thu, 17 Feb 2022 11:48:24 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 43A6D83AA5; Thu, 17 Feb 2022 12:48:22 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="WZeEsRXp"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9E98A83B69; Thu, 17 Feb 2022 12:48:19 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6B2F782A59 for ; Thu, 17 Feb 2022 12:48:15 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=kabel@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A36A9612D7; Thu, 17 Feb 2022 11:48:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 149E5C340E8; Thu, 17 Feb 2022 11:48:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645098493; bh=JzQRbpqzI86L9iwNbslKrWiF4TH+RBxEslGd+w/LkEM=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=WZeEsRXp7NSoPn++BCjl/BTpJhhj//Z+jjm5FAcnhU0Cf7NxAiEM7whbAnLAqOjr1 bD6xHX1s/RLtShgyLoRIxtyqNF5FRKW36RZIRAPmo01Km7Lt495MOozx3l8aNEc4nj DK2D7q7ciMfb9OrSOVfNVQoomfEWsC5NOjc8HFC5uruHs1m4LulN35cerG/SilUATh UktfzWbvcqULHTJYCHUqfIPR9J69Pw+zIxqIV1LZC+bS8Kf1sMza49fe8B1z96fMPc Qi49h8NI97EmRgwji8LClg+vQ58TwEfGsmguYoiC5dr3adNJFRG8wgTBmKp8ABgUCb V/EaT6EflQyJA== Date: Thu, 17 Feb 2022 12:48:08 +0100 From: Marek =?UTF-8?B?QmVow7pu?= To: Pali =?UTF-8?B?Um9ow6Fy?= Cc: Chris Packham , Stefan Roese , "u-boot@lists.denx.de" , Marek =?UTF-8?B?QmVow7pu?= Subject: Re: [PATCH u-boot-marvell 1/2] arm: mvebu: spl: Add option to reset the board on DDR training failure Message-ID: <20220217124808.663157c5@dellmb> In-Reply-To: <20220217113754.ya6gtg2m73ke4ng5@pali> References: <20220217000849.13028-1-kabel@kernel.org> <20220217113754.ya6gtg2m73ke4ng5@pali> X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Thu, 17 Feb 2022 12:37:54 +0100 Pali Roh=C3=A1r wrote: > On Thursday 17 February 2022 01:08:48 Marek Beh=C3=BAn wrote: > > From: Marek Beh=C3=BAn > >=20 > > Some boards may occacionally fail DDR training. Currently we hang() in > > this case. Add an option that makes the board do an immediate reset in > > such a case, so that a new training is tried as soon as possible, > > instead of hanging and possibly waiting for watchdog to reset the board. > >=20 > > Signed-off-by: Marek Beh=C3=BAn > > Reviewed-by: Stefan Roese > > --- > > arch/arm/mach-mvebu/Kconfig | 9 +++++++++ > > arch/arm/mach-mvebu/spl.c | 6 +++++- > > 2 files changed, 14 insertions(+), 1 deletion(-) > >=20 > > diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig > > index d23cc0c760..ed957be6e1 100644 > > --- a/arch/arm/mach-mvebu/Kconfig > > +++ b/arch/arm/mach-mvebu/Kconfig > > @@ -213,6 +213,15 @@ config DDR_LOG_LEVEL > > At level 3, rovides the windows margin of each DQ as a results of > > DQS centeralization. > > =20 > > +config DDR_RESET_ON_TRAINING_FAILURE > > + bool "Reset the board on DDR training failure instead of hanging" > > + depends on ARMADA_38X || ARMADA_XP > > + help > > + If DDR training fails in SPL, reset the board instead of hanging. > > + Some boards are known to fail DDR training occasionally and an > > + immediate reset may be preferable to waiting until the board is > > + reset by watchdog (if there even is one). > > + > > config SYS_BOARD > > default "clearfog" if TARGET_CLEARFOG > > default "helios4" if TARGET_HELIOS4 > > diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c > > index 273ecb8bd6..d3c3bdc74d 100644 > > --- a/arch/arm/mach-mvebu/spl.c > > +++ b/arch/arm/mach-mvebu/spl.c > > @@ -4,6 +4,7 @@ > > */ > > =20 > > #include > > +#include > > #include > > #include > > #include > > @@ -330,7 +331,10 @@ void board_init_f(ulong dummy) > > ret =3D ddr3_init(); > > if (ret) { > > printf("ddr3_init() failed: %d\n", ret); > > - hang(); > > + if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE)) > > + reset_cpu(); =20 >=20 > You should not call reset_cpu() from SPL loaded via UART. This will > confuse x-modem software. Either return failure to BootROM or hang() > like it was before. Hmm, I didn't consider that. What will happen if I return failure to BootROM? Will it try booting from different medium? I think that the best thing to do on failure when booting via UART is to hang()... Marek