Re: [PATCH v6 2/5] clk: qcom: gcc-msm8998: add SSC-related clocks

[Stephen Boyd <sboyd@kernel.org>]

Quoting michael.srba@seznam.cz (2022-02-17 03:30:01)
> From: Michael Srba <Michael.Srba@seznam.cz>
> 
> This patch adds four clocks which need to be manipulated in order to
> initialize the AHB bus which exposes the SCC block in the global address
> space.
> 
> If a device is known to be configured such that writing to these
> registers from Linux is not permitted, the 'protected-clocks'
> device tree property must be used to denote that fact.
> 
> Signed-off-by: Michael Srba <Michael.Srba@seznam.cz>
> ---
>  CHANGES:
>  - v2: none
>  - v3: none
>  - v4: reword the commit message
>  - v5: none
>  - v6: none
> ---
>  drivers/clk/qcom/gcc-msm8998.c | 56 ++++++++++++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
> 
> diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
> index 407e2c5caea4..2d14c3d672fc 100644
> --- a/drivers/clk/qcom/gcc-msm8998.c
> +++ b/drivers/clk/qcom/gcc-msm8998.c
> @@ -2833,6 +2833,58 @@ static struct clk_branch gcc_rx1_usb2_clkref_clk = {
>         },
>  };
>  
> +static struct clk_branch gcc_im_sleep_clk = {
> +       .halt_reg = 0x4300C,
> +       .halt_check = BRANCH_HALT,
> +       .clkr = {
> +               .enable_reg = 0x4300C,
> +               .enable_mask = BIT(0),
> +               .hw.init = &(struct clk_init_data){

const struct clk_init_data