From: Stafford Horne <shorne@gmail.com>
To: QEMU Development <qemu-devel@nongnu.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Stafford Horne <shorne@gmail.com>
Subject: [PATCH v3 0/6] OpenRISC Device Tree Generation
Date: Sat, 19 Feb 2022 15:42:04 +0900 [thread overview]
Message-ID: <20220219064210.3145381-1-shorne@gmail.com> (raw)
Changes since v2:
- Fix description to say devicetree "generation" not "support"
- Fix up various indentation issues.
- Use HWADDR_PRIx string formatting.
- Split device tree population out to device init.
- Do not load device tree or initrd if we have no kernel.
- Added patches to split uart initialization out to it's own function fix 2 CPU
limit.
Changes since v1:
- Fixed typos pointed out by Philippe
- Moved usage of machine state to patch 3/4
- added config dependency on FDT
This series adds device tree generation for the OpenRISC SIM hardware.
The simulator will generate an FDT and pass it to the kernel.
For example:
qemu-system-or1k -cpu or1200 -M or1k-sim \
-kernel /home/shorne/work/linux/vmlinux \
-initrd /home/shorne/work/linux/initramfs.cpio.gz \
-serial mon:stdio -nographic -gdb tcp::10001 -m 32
Using the linux kernel or1ksim_defconfig we can remove the built-in
dts and the kernel will boot as expected. The real benefit here is
being able to specify an external initrd which qemu will load into
memory and the device tree will tell the kernel where to find it.
Tested this by booting single core and SMP kernels with 4x CPUs.
Stafford Horne (6):
hw/openrisc/openrisc_sim: Create machine state for or1ksim
hw/openrisc/openrisc_sim: Parameterize initialization
hw/openrisc/openrisc_sim: Use IRQ splitter when connecting UART
hw/openrisc/openrisc_sim: Increase max_cpus to 4
hw/openrisc/openrisc_sim: Add automatic device tree generation
hw/openrisc/openrisc_sim: Add support for initrd loading
configs/targets/or1k-softmmu.mak | 1 +
hw/openrisc/openrisc_sim.c | 308 ++++++++++++++++++++++++++++---
2 files changed, 285 insertions(+), 24 deletions(-)
--
2.31.1
next reply other threads:[~2022-02-19 6:54 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-19 6:42 Stafford Horne [this message]
2022-02-19 6:42 ` [PATCH v3 1/6] hw/openrisc/openrisc_sim: Create machine state for or1ksim Stafford Horne
2022-02-19 6:42 ` [PATCH v3 2/6] hw/openrisc/openrisc_sim: Parameterize initialization Stafford Horne
2022-02-19 6:42 ` [PATCH v3 3/6] hw/openrisc/openrisc_sim: Use IRQ splitter when connecting UART Stafford Horne
2022-02-19 13:01 ` Peter Maydell
2022-02-20 20:06 ` Philippe Mathieu-Daudé
2022-02-21 0:08 ` Stafford Horne
2022-02-19 6:42 ` [PATCH v3 4/6] hw/openrisc/openrisc_sim: Increase max_cpus to 4 Stafford Horne
2022-02-19 13:02 ` Peter Maydell
2022-02-20 20:07 ` Philippe Mathieu-Daudé
2022-02-20 23:59 ` Stafford Horne
2022-02-19 6:42 ` [PATCH v3 5/6] hw/openrisc/openrisc_sim: Add automatic device tree generation Stafford Horne
2022-02-19 13:06 ` Peter Maydell
2022-02-19 6:42 ` [PATCH v3 6/6] hw/openrisc/openrisc_sim: Add support for initrd loading Stafford Horne
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