From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA6FEC433FE for ; Sun, 20 Feb 2022 19:34:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244640AbiBTTed (ORCPT ); Sun, 20 Feb 2022 14:34:33 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244641AbiBTTec (ORCPT ); Sun, 20 Feb 2022 14:34:32 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4029A4507D for ; Sun, 20 Feb 2022 11:34:11 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CEAD560EEE for ; Sun, 20 Feb 2022 19:34:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5BF65C340F3; Sun, 20 Feb 2022 19:34:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645385650; bh=RH0qfasTg/d+aAqUzpvw+7VMNWkP7M2Z31Fo0ZtAq8Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B3ks2dx7rkjptcs9S9ZYy8J+vDjhTb3SSQxjJutaKsZ6dmVcfLH7ZhWhTS0Pt13sI 9LaNQadp6LIfWKplc3hRoKUavJygU30GfbY1BkUhttXrUlsVf2OV9k9Ev4vlukMniE aFQdCrYDSfDUKiObTxJmr+sW6GW+aktJ3h16rzp/+ZeYkyQofIpltx9SaTxnhOcVXt 13/I9xrX+WpEMaFLsAyKQdNHpgp2U2/0A73AE3wMBOloUzTg8y/SQCYRhArh6xO08B R16Xus9WF7t9q9QaWlPOh58bGhv/UnKpKQhIeVvB+SdaYyNO8XO0rQgXbjWrEpk0oc DZQwk1DdpW11w== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Lorenzo Pieralisi , Bjorn Helgaas Cc: =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Marc Zyngier , pali@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Gregory CLEMENT , =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH 08/18] PCI: aardvark: Add support for DLLSC and hotplug interrupt Date: Sun, 20 Feb 2022 20:33:36 +0100 Message-Id: <20220220193346.23789-9-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220220193346.23789-1-kabel@kernel.org> References: <20220220193346.23789-1-kabel@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Pali Rohár Add support for Data Link Layer State Change in the emulated slot registers and hotplug interrupt via the emulated root bridge. Link down state change can be implemented because Aardvark supports Link Down event interrupt. Use it for signaling that Data Link Layer Link is not active anymore via Hot-Plug Interrupt on emulated root bridge. Link up interrupt is not available on Aardvark, but we check for whether link is up in the advk_pcie_link_up() function. By triggering Hot-Plug Interrupt from this function we achieve Link up event, so long as the function is called (which it is after probe and when rescanning). Although it is not ideal, it is better than nothing. Since advk_pcie_link_up() is not called from interrupt handler, we cannot call generic_handle_domain_irq() from it directly. Instead create a TIMER_IRQSAFE timer and trigger it from advk_pcie_link_up(). (We haven't been able to find any documentation for a Link Up interrupt on Aardvark, but it is possible there is one, in some undocumented register. If we manage to find this information, this can be rewritten.) Signed-off-by: Pali Rohár Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 100 ++++++++++++++++++++++++-- 1 file changed, 96 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index c80c78505bfa..62bb0308b9f7 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "../pci.h" #include "../pci-bridge-emul.h" @@ -99,6 +100,7 @@ #define PCIE_MSG_PM_PME_MASK BIT(7) #define PCIE_ISR0_MASK_REG (CONTROL_BASE_ADDR + 0x44) #define PCIE_ISR0_MSI_INT_PENDING BIT(24) +#define PCIE_ISR0_LINK_DOWN BIT(1) #define PCIE_ISR0_CORR_ERR BIT(11) #define PCIE_ISR0_NFAT_ERR BIT(12) #define PCIE_ISR0_FAT_ERR BIT(13) @@ -284,6 +286,8 @@ struct advk_pcie { DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); struct mutex msi_used_lock; int link_gen; + bool link_was_up; + struct timer_list link_irq_timer; struct pci_bridge_emul bridge; struct gpio_desc *reset_gpio; struct phy *phy; @@ -313,7 +317,24 @@ static inline bool advk_pcie_link_up(struct advk_pcie *pcie) { /* check if LTSSM is in normal operation - some L* state */ u8 ltssm_state = advk_pcie_ltssm_state(pcie); - return ltssm_state >= LTSSM_L0 && ltssm_state < LTSSM_DISABLED; + bool link_is_up; + u16 slotsta; + + link_is_up = ltssm_state >= LTSSM_L0 && ltssm_state < LTSSM_DISABLED; + + if (link_is_up && !pcie->link_was_up) { + dev_info(&pcie->pdev->dev, "link up\n"); + + pcie->link_was_up = true; + + slotsta = le16_to_cpu(pcie->bridge.pcie_conf.slotsta); + slotsta |= PCI_EXP_SLTSTA_DLLSC; + pcie->bridge.pcie_conf.slotsta = cpu_to_le16(slotsta); + + mod_timer(&pcie->link_irq_timer, jiffies + 1); + } + + return link_is_up; } static inline bool advk_pcie_link_active(struct advk_pcie *pcie) @@ -442,8 +463,6 @@ static void advk_pcie_train_link(struct advk_pcie *pcie) ret = advk_pcie_wait_for_link(pcie); if (ret < 0) dev_err(dev, "link never came up\n"); - else - dev_info(dev, "link up\n"); } /* @@ -592,6 +611,11 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) reg &= ~PCIE_ISR0_MSI_INT_PENDING; advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); + /* Unmask Link Down interrupt */ + reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); + reg &= ~PCIE_ISR0_LINK_DOWN; + advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); + /* Unmask PME interrupt for processing of PME requester */ reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); reg &= ~PCIE_MSG_PM_PME_MASK; @@ -918,6 +942,14 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, advk_pcie_wait_for_retrain(pcie); break; + case PCI_EXP_SLTCTL: { + u16 slotctl = le16_to_cpu(bridge->pcie_conf.slotctl); + /* Only emulation of HPIE and DLLSCE bits is provided */ + slotctl &= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_DLLSCE; + bridge->pcie_conf.slotctl = cpu_to_le16(slotctl); + break; + } + case PCI_EXP_RTCTL: { u16 rootctl = le16_to_cpu(bridge->pcie_conf.rootctl); /* Only emulation of PMEIE and CRSSVE bits is provided */ @@ -1033,6 +1065,7 @@ static const struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = { static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) { struct pci_bridge_emul *bridge = &pcie->bridge; + u32 slotcap; bridge->conf.vendor = cpu_to_le16(advk_readl(pcie, PCIE_CORE_DEV_ID_REG) & 0xffff); @@ -1059,6 +1092,13 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) bridge->pcie_conf.cap = cpu_to_le16(2 | PCI_EXP_FLAGS_SLOT); /* + * Mark bridge as Hot Plug Capable since this is the way how to enable + * delivering of Data Link Layer State Change interrupts. + * + * Set No Command Completed Support because bridge does not support + * Command Completed Interrupt. Every command is executed immediately + * without any delay. + * * Set Presence Detect State bit permanently since there is no support * for unplugging the card nor detecting whether it is plugged. (If a * platform exists in the future that supports it, via a GPIO for @@ -1068,7 +1108,9 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) * value is reserved for ports within the same silicon as Root Port * which is not our case. */ - bridge->pcie_conf.slotcap = cpu_to_le32(1 << PCI_EXP_SLTCAP_PSN_SHIFT); + slotcap = PCI_EXP_SLTCAP_NCCS | PCI_EXP_SLTCAP_HPC | + (1 << PCI_EXP_SLTCAP_PSN_SHIFT); + bridge->pcie_conf.slotcap = cpu_to_le32(slotcap); bridge->pcie_conf.slotsta = cpu_to_le16(PCI_EXP_SLTSTA_PDS); /* Indicates supports for Completion Retry Status */ @@ -1565,6 +1607,24 @@ static void advk_pcie_remove_rp_irq_domain(struct advk_pcie *pcie) irq_domain_remove(pcie->rp_irq_domain); } +static void advk_pcie_link_irq_handler(struct timer_list *timer) +{ + struct advk_pcie *pcie = from_timer(pcie, timer, link_irq_timer); + u16 slotctl; + + slotctl = le16_to_cpu(pcie->bridge.pcie_conf.slotctl); + if (!(slotctl & PCI_EXP_SLTCTL_DLLSCE) || + !(slotctl & PCI_EXP_SLTCTL_HPIE)) + return; + + /* + * Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ, so use PCIe + * interrupt 0 + */ + if (generic_handle_domain_irq(pcie->rp_irq_domain, 0) == -EINVAL) + dev_err_ratelimited(&pcie->pdev->dev, "unhandled HP IRQ\n"); +} + static void advk_pcie_handle_pme(struct advk_pcie *pcie) { u32 requester = advk_readl(pcie, PCIE_MSG_LOG_REG) >> 16; @@ -1616,6 +1676,7 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) { u32 isr0_val, isr0_mask, isr0_status; u32 isr1_val, isr1_mask, isr1_status; + u16 slotsta; int i; isr0_val = advk_readl(pcie, PCIE_ISR0_REG); @@ -1642,6 +1703,26 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) dev_err_ratelimited(&pcie->pdev->dev, "unhandled ERR IRQ\n"); } + /* Process Link Down interrupt as HP IRQ */ + if (isr0_status & PCIE_ISR0_LINK_DOWN) { + advk_writel(pcie, PCIE_ISR0_LINK_DOWN, PCIE_ISR0_REG); + + dev_info(&pcie->pdev->dev, "link down\n"); + + pcie->link_was_up = false; + + slotsta = le16_to_cpu(pcie->bridge.pcie_conf.slotsta); + slotsta |= PCI_EXP_SLTSTA_DLLSC; + pcie->bridge.pcie_conf.slotsta = cpu_to_le16(slotsta); + + /* + * Deactivate timer and call advk_pcie_link_irq_handler() + * function directly as we are in the interrupt context. + */ + del_timer_sync(&pcie->link_irq_timer); + advk_pcie_link_irq_handler(&pcie->link_irq_timer); + } + /* Process MSI interrupts */ if (isr0_status & PCIE_ISR0_MSI_INT_PENDING) advk_pcie_handle_msi(pcie); @@ -1877,6 +1958,14 @@ static int advk_pcie_probe(struct platform_device *pdev) if (ret) return ret; + /* + * generic_handle_domain_irq() expects local IRQs to be disabled since + * normally it is called from interrupt context, so use TIMER_IRQSAFE + * flag for this link_irq_timer. + */ + timer_setup(&pcie->link_irq_timer, advk_pcie_link_irq_handler, + TIMER_IRQSAFE); + advk_pcie_setup_hw(pcie); ret = advk_sw_pci_bridge_init(pcie); @@ -1971,6 +2060,9 @@ static int advk_pcie_remove(struct platform_device *pdev) advk_pcie_remove_msi_irq_domain(pcie); advk_pcie_remove_irq_domain(pcie); + /* Deactivate link event timer */ + del_timer_sync(&pcie->link_irq_timer); + /* Free config space for emulated root bridge */ pci_bridge_emul_cleanup(&pcie->bridge); -- 2.34.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04CF2C433F5 for ; Sun, 20 Feb 2022 19:38:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WtlFqatHrgEEeed4vSVCWXjBPw4PRJeuyL5IXoOIxGw=; b=dzruR6lk61ReJu YVVjEr5sYqU1uy48Rt9jJMViLtvcZEAc4oiwKLhWZKxa2lmbUo6jYQhZMwsTQSjTRrXg1+/5TEe4K wlp9K0tqh5q0OJzNrPHEfHWVhU+LLmkaZEl82kE3llt4U39lflB5amwWq+t9ZEZ7yQIYVRkusm14Q sByLaJ6FP4haHnzuAYuHtQlCWP2CudvPOFzGRI1yhBQ4vdyRPY9STkE7GhHSrHcyeFMXyrdAC8JcK OY1B7SPtQ3lFxrT1pFWusZqbufL2+bIu3DsEtEmFlqMUlaUoW87IsFuwpbswHofva1BRunOHBrMTO kdMQfqtuwsCz07De6V2w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nLs04-002C71-4o; Sun, 20 Feb 2022 19:36:04 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nLryF-002BDh-A9 for linux-arm-kernel@lists.infradead.org; Sun, 20 Feb 2022 19:34:13 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CE35F60EEA; Sun, 20 Feb 2022 19:34:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5BF65C340F3; Sun, 20 Feb 2022 19:34:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645385650; bh=RH0qfasTg/d+aAqUzpvw+7VMNWkP7M2Z31Fo0ZtAq8Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B3ks2dx7rkjptcs9S9ZYy8J+vDjhTb3SSQxjJutaKsZ6dmVcfLH7ZhWhTS0Pt13sI 9LaNQadp6LIfWKplc3hRoKUavJygU30GfbY1BkUhttXrUlsVf2OV9k9Ev4vlukMniE aFQdCrYDSfDUKiObTxJmr+sW6GW+aktJ3h16rzp/+ZeYkyQofIpltx9SaTxnhOcVXt 13/I9xrX+WpEMaFLsAyKQdNHpgp2U2/0A73AE3wMBOloUzTg8y/SQCYRhArh6xO08B R16Xus9WF7t9q9QaWlPOh58bGhv/UnKpKQhIeVvB+SdaYyNO8XO0rQgXbjWrEpk0oc DZQwk1DdpW11w== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Lorenzo Pieralisi , Bjorn Helgaas Cc: =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Marc Zyngier , pali@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Gregory CLEMENT , =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH 08/18] PCI: aardvark: Add support for DLLSC and hotplug interrupt Date: Sun, 20 Feb 2022 20:33:36 +0100 Message-Id: <20220220193346.23789-9-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220220193346.23789-1-kabel@kernel.org> References: <20220220193346.23789-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220220_113411_476546_54C392DD X-CRM114-Status: GOOD ( 27.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RnJvbTogUGFsaSBSb2jDoXIgPHBhbGlAa2VybmVsLm9yZz4KCkFkZCBzdXBwb3J0IGZvciBEYXRh IExpbmsgTGF5ZXIgU3RhdGUgQ2hhbmdlIGluIHRoZSBlbXVsYXRlZCBzbG90CnJlZ2lzdGVycyBh bmQgaG90cGx1ZyBpbnRlcnJ1cHQgdmlhIHRoZSBlbXVsYXRlZCByb290IGJyaWRnZS4KCkxpbmsg ZG93biBzdGF0ZSBjaGFuZ2UgY2FuIGJlIGltcGxlbWVudGVkIGJlY2F1c2UgQWFyZHZhcmsgc3Vw cG9ydHMgTGluawpEb3duIGV2ZW50IGludGVycnVwdC4gVXNlIGl0IGZvciBzaWduYWxpbmcgdGhh dCBEYXRhIExpbmsgTGF5ZXIgTGluayBpcwpub3QgYWN0aXZlIGFueW1vcmUgdmlhIEhvdC1QbHVn IEludGVycnVwdCBvbiBlbXVsYXRlZCByb290IGJyaWRnZS4KCkxpbmsgdXAgaW50ZXJydXB0IGlz IG5vdCBhdmFpbGFibGUgb24gQWFyZHZhcmssIGJ1dCB3ZSBjaGVjayBmb3Igd2hldGhlcgpsaW5r IGlzIHVwIGluIHRoZSBhZHZrX3BjaWVfbGlua191cCgpIGZ1bmN0aW9uLiBCeSB0cmlnZ2VyaW5n IEhvdC1QbHVnCkludGVycnVwdCBmcm9tIHRoaXMgZnVuY3Rpb24gd2UgYWNoaWV2ZSBMaW5rIHVw IGV2ZW50LCBzbyBsb25nIGFzIHRoZQpmdW5jdGlvbiBpcyBjYWxsZWQgKHdoaWNoIGl0IGlzIGFm dGVyIHByb2JlIGFuZCB3aGVuIHJlc2Nhbm5pbmcpLgpBbHRob3VnaCBpdCBpcyBub3QgaWRlYWws IGl0IGlzIGJldHRlciB0aGFuIG5vdGhpbmcuCgpTaW5jZSBhZHZrX3BjaWVfbGlua191cCgpIGlz IG5vdCBjYWxsZWQgZnJvbSBpbnRlcnJ1cHQgaGFuZGxlciwgd2UKY2Fubm90IGNhbGwgZ2VuZXJp Y19oYW5kbGVfZG9tYWluX2lycSgpIGZyb20gaXQgZGlyZWN0bHkuIEluc3RlYWQgY3JlYXRlCmEg VElNRVJfSVJRU0FGRSB0aW1lciBhbmQgdHJpZ2dlciBpdCBmcm9tIGFkdmtfcGNpZV9saW5rX3Vw KCkuCgooV2UgaGF2ZW4ndCBiZWVuIGFibGUgdG8gZmluZCBhbnkgZG9jdW1lbnRhdGlvbiBmb3Ig YSBMaW5rIFVwIGludGVycnVwdAogb24gQWFyZHZhcmssIGJ1dCBpdCBpcyBwb3NzaWJsZSB0aGVy ZSBpcyBvbmUsIGluIHNvbWUgdW5kb2N1bWVudGVkCiByZWdpc3Rlci4gSWYgd2UgbWFuYWdlIHRv IGZpbmQgdGhpcyBpbmZvcm1hdGlvbiwgdGhpcyBjYW4gYmUKIHJld3JpdHRlbi4pCgpTaWduZWQt b2ZmLWJ5OiBQYWxpIFJvaMOhciA8cGFsaUBrZXJuZWwub3JnPgpTaWduZWQtb2ZmLWJ5OiBNYXJl ayBCZWjDum4gPGthYmVsQGtlcm5lbC5vcmc+Ci0tLQogZHJpdmVycy9wY2kvY29udHJvbGxlci9w Y2ktYWFyZHZhcmsuYyB8IDEwMCArKysrKysrKysrKysrKysrKysrKysrKystLQogMSBmaWxlIGNo YW5nZWQsIDk2IGluc2VydGlvbnMoKyksIDQgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJp dmVycy9wY2kvY29udHJvbGxlci9wY2ktYWFyZHZhcmsuYyBiL2RyaXZlcnMvcGNpL2NvbnRyb2xs ZXIvcGNpLWFhcmR2YXJrLmMKaW5kZXggYzgwYzc4NTA1YmZhLi42MmJiMDMwOGI5ZjcgMTAwNjQ0 Ci0tLSBhL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvcGNpLWFhcmR2YXJrLmMKKysrIGIvZHJpdmVy cy9wY2kvY29udHJvbGxlci9wY2ktYWFyZHZhcmsuYwpAQCAtMjQsNiArMjQsNyBAQAogI2luY2x1 ZGUgPGxpbnV4L29mX2FkZHJlc3MuaD4KICNpbmNsdWRlIDxsaW51eC9vZl9ncGlvLmg+CiAjaW5j bHVkZSA8bGludXgvb2ZfcGNpLmg+CisjaW5jbHVkZSA8bGludXgvdGltZXIuaD4KIAogI2luY2x1 ZGUgIi4uL3BjaS5oIgogI2luY2x1ZGUgIi4uL3BjaS1icmlkZ2UtZW11bC5oIgpAQCAtOTksNiAr MTAwLDcgQEAKICNkZWZpbmUgUENJRV9NU0dfUE1fUE1FX01BU0sJCQlCSVQoNykKICNkZWZpbmUg UENJRV9JU1IwX01BU0tfUkVHCQkJKENPTlRST0xfQkFTRV9BRERSICsgMHg0NCkKICNkZWZpbmUg ICAgIFBDSUVfSVNSMF9NU0lfSU5UX1BFTkRJTkcJCUJJVCgyNCkKKyNkZWZpbmUgICAgIFBDSUVf SVNSMF9MSU5LX0RPV04JCQlCSVQoMSkKICNkZWZpbmUgICAgIFBDSUVfSVNSMF9DT1JSX0VSUgkJ CUJJVCgxMSkKICNkZWZpbmUgICAgIFBDSUVfSVNSMF9ORkFUX0VSUgkJCUJJVCgxMikKICNkZWZp bmUgICAgIFBDSUVfSVNSMF9GQVRfRVJSCQkJQklUKDEzKQpAQCAtMjg0LDYgKzI4Niw4IEBAIHN0 cnVjdCBhZHZrX3BjaWUgewogCURFQ0xBUkVfQklUTUFQKG1zaV91c2VkLCBNU0lfSVJRX05VTSk7 CiAJc3RydWN0IG11dGV4IG1zaV91c2VkX2xvY2s7CiAJaW50IGxpbmtfZ2VuOworCWJvb2wgbGlu a193YXNfdXA7CisJc3RydWN0IHRpbWVyX2xpc3QgbGlua19pcnFfdGltZXI7CiAJc3RydWN0IHBj aV9icmlkZ2VfZW11bCBicmlkZ2U7CiAJc3RydWN0IGdwaW9fZGVzYyAqcmVzZXRfZ3BpbzsKIAlz dHJ1Y3QgcGh5ICpwaHk7CkBAIC0zMTMsNyArMzE3LDI0IEBAIHN0YXRpYyBpbmxpbmUgYm9vbCBh ZHZrX3BjaWVfbGlua191cChzdHJ1Y3QgYWR2a19wY2llICpwY2llKQogewogCS8qIGNoZWNrIGlm IExUU1NNIGlzIGluIG5vcm1hbCBvcGVyYXRpb24gLSBzb21lIEwqIHN0YXRlICovCiAJdTggbHRz c21fc3RhdGUgPSBhZHZrX3BjaWVfbHRzc21fc3RhdGUocGNpZSk7Ci0JcmV0dXJuIGx0c3NtX3N0 YXRlID49IExUU1NNX0wwICYmIGx0c3NtX3N0YXRlIDwgTFRTU01fRElTQUJMRUQ7CisJYm9vbCBs aW5rX2lzX3VwOworCXUxNiBzbG90c3RhOworCisJbGlua19pc191cCA9IGx0c3NtX3N0YXRlID49 IExUU1NNX0wwICYmIGx0c3NtX3N0YXRlIDwgTFRTU01fRElTQUJMRUQ7CisKKwlpZiAobGlua19p c191cCAmJiAhcGNpZS0+bGlua193YXNfdXApIHsKKwkJZGV2X2luZm8oJnBjaWUtPnBkZXYtPmRl diwgImxpbmsgdXBcbiIpOworCisJCXBjaWUtPmxpbmtfd2FzX3VwID0gdHJ1ZTsKKworCQlzbG90 c3RhID0gbGUxNl90b19jcHUocGNpZS0+YnJpZGdlLnBjaWVfY29uZi5zbG90c3RhKTsKKwkJc2xv dHN0YSB8PSBQQ0lfRVhQX1NMVFNUQV9ETExTQzsKKwkJcGNpZS0+YnJpZGdlLnBjaWVfY29uZi5z bG90c3RhID0gY3B1X3RvX2xlMTYoc2xvdHN0YSk7CisKKwkJbW9kX3RpbWVyKCZwY2llLT5saW5r X2lycV90aW1lciwgamlmZmllcyArIDEpOworCX0KKworCXJldHVybiBsaW5rX2lzX3VwOwogfQog CiBzdGF0aWMgaW5saW5lIGJvb2wgYWR2a19wY2llX2xpbmtfYWN0aXZlKHN0cnVjdCBhZHZrX3Bj aWUgKnBjaWUpCkBAIC00NDIsOCArNDYzLDYgQEAgc3RhdGljIHZvaWQgYWR2a19wY2llX3RyYWlu X2xpbmsoc3RydWN0IGFkdmtfcGNpZSAqcGNpZSkKIAlyZXQgPSBhZHZrX3BjaWVfd2FpdF9mb3Jf bGluayhwY2llKTsKIAlpZiAocmV0IDwgMCkKIAkJZGV2X2VycihkZXYsICJsaW5rIG5ldmVyIGNh bWUgdXBcbiIpOwotCWVsc2UKLQkJZGV2X2luZm8oZGV2LCAibGluayB1cFxuIik7CiB9CiAKIC8q CkBAIC01OTIsNiArNjExLDExIEBAIHN0YXRpYyB2b2lkIGFkdmtfcGNpZV9zZXR1cF9odyhzdHJ1 Y3QgYWR2a19wY2llICpwY2llKQogCXJlZyAmPSB+UENJRV9JU1IwX01TSV9JTlRfUEVORElORzsK IAlhZHZrX3dyaXRlbChwY2llLCByZWcsIFBDSUVfSVNSMF9NQVNLX1JFRyk7CiAKKwkvKiBVbm1h c2sgTGluayBEb3duIGludGVycnVwdCAqLworCXJlZyA9IGFkdmtfcmVhZGwocGNpZSwgUENJRV9J U1IwX01BU0tfUkVHKTsKKwlyZWcgJj0gflBDSUVfSVNSMF9MSU5LX0RPV047CisJYWR2a193cml0 ZWwocGNpZSwgcmVnLCBQQ0lFX0lTUjBfTUFTS19SRUcpOworCiAJLyogVW5tYXNrIFBNRSBpbnRl cnJ1cHQgZm9yIHByb2Nlc3Npbmcgb2YgUE1FIHJlcXVlc3RlciAqLwogCXJlZyA9IGFkdmtfcmVh ZGwocGNpZSwgUENJRV9JU1IwX01BU0tfUkVHKTsKIAlyZWcgJj0gflBDSUVfTVNHX1BNX1BNRV9N QVNLOwpAQCAtOTE4LDYgKzk0MiwxNCBAQCBhZHZrX3BjaV9icmlkZ2VfZW11bF9wY2llX2NvbmZf d3JpdGUoc3RydWN0IHBjaV9icmlkZ2VfZW11bCAqYnJpZGdlLAogCQkJYWR2a19wY2llX3dhaXRf Zm9yX3JldHJhaW4ocGNpZSk7CiAJCWJyZWFrOwogCisJY2FzZSBQQ0lfRVhQX1NMVENUTDogewor CQl1MTYgc2xvdGN0bCA9IGxlMTZfdG9fY3B1KGJyaWRnZS0+cGNpZV9jb25mLnNsb3RjdGwpOwor CQkvKiBPbmx5IGVtdWxhdGlvbiBvZiBIUElFIGFuZCBETExTQ0UgYml0cyBpcyBwcm92aWRlZCAq LworCQlzbG90Y3RsICY9IFBDSV9FWFBfU0xUQ1RMX0hQSUUgfCBQQ0lfRVhQX1NMVENUTF9ETExT Q0U7CisJCWJyaWRnZS0+cGNpZV9jb25mLnNsb3RjdGwgPSBjcHVfdG9fbGUxNihzbG90Y3RsKTsK KwkJYnJlYWs7CisJfQorCiAJY2FzZSBQQ0lfRVhQX1JUQ1RMOiB7CiAJCXUxNiByb290Y3RsID0g bGUxNl90b19jcHUoYnJpZGdlLT5wY2llX2NvbmYucm9vdGN0bCk7CiAJCS8qIE9ubHkgZW11bGF0 aW9uIG9mIFBNRUlFIGFuZCBDUlNTVkUgYml0cyBpcyBwcm92aWRlZCAqLwpAQCAtMTAzMyw2ICsx MDY1LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBwY2lfYnJpZGdlX2VtdWxfb3BzIGFkdmtfcGNp X2JyaWRnZV9lbXVsX29wcyA9IHsKIHN0YXRpYyBpbnQgYWR2a19zd19wY2lfYnJpZGdlX2luaXQo c3RydWN0IGFkdmtfcGNpZSAqcGNpZSkKIHsKIAlzdHJ1Y3QgcGNpX2JyaWRnZV9lbXVsICpicmlk Z2UgPSAmcGNpZS0+YnJpZGdlOworCXUzMiBzbG90Y2FwOwogCiAJYnJpZGdlLT5jb25mLnZlbmRv ciA9CiAJCWNwdV90b19sZTE2KGFkdmtfcmVhZGwocGNpZSwgUENJRV9DT1JFX0RFVl9JRF9SRUcp ICYgMHhmZmZmKTsKQEAgLTEwNTksNiArMTA5MiwxMyBAQCBzdGF0aWMgaW50IGFkdmtfc3dfcGNp X2JyaWRnZV9pbml0KHN0cnVjdCBhZHZrX3BjaWUgKnBjaWUpCiAJYnJpZGdlLT5wY2llX2NvbmYu Y2FwID0gY3B1X3RvX2xlMTYoMiB8IFBDSV9FWFBfRkxBR1NfU0xPVCk7CiAKIAkvKgorCSAqIE1h cmsgYnJpZGdlIGFzIEhvdCBQbHVnIENhcGFibGUgc2luY2UgdGhpcyBpcyB0aGUgd2F5IGhvdyB0 byBlbmFibGUKKwkgKiBkZWxpdmVyaW5nIG9mIERhdGEgTGluayBMYXllciBTdGF0ZSBDaGFuZ2Ug aW50ZXJydXB0cy4KKwkgKgorCSAqIFNldCBObyBDb21tYW5kIENvbXBsZXRlZCBTdXBwb3J0IGJl Y2F1c2UgYnJpZGdlIGRvZXMgbm90IHN1cHBvcnQKKwkgKiBDb21tYW5kIENvbXBsZXRlZCBJbnRl cnJ1cHQuIEV2ZXJ5IGNvbW1hbmQgaXMgZXhlY3V0ZWQgaW1tZWRpYXRlbHkKKwkgKiB3aXRob3V0 IGFueSBkZWxheS4KKwkgKgogCSAqIFNldCBQcmVzZW5jZSBEZXRlY3QgU3RhdGUgYml0IHBlcm1h bmVudGx5IHNpbmNlIHRoZXJlIGlzIG5vIHN1cHBvcnQKIAkgKiBmb3IgdW5wbHVnZ2luZyB0aGUg Y2FyZCBub3IgZGV0ZWN0aW5nIHdoZXRoZXIgaXQgaXMgcGx1Z2dlZC4gKElmIGEKIAkgKiBwbGF0 Zm9ybSBleGlzdHMgaW4gdGhlIGZ1dHVyZSB0aGF0IHN1cHBvcnRzIGl0LCB2aWEgYSBHUElPIGZv cgpAQCAtMTA2OCw3ICsxMTA4LDkgQEAgc3RhdGljIGludCBhZHZrX3N3X3BjaV9icmlkZ2VfaW5p dChzdHJ1Y3QgYWR2a19wY2llICpwY2llKQogCSAqIHZhbHVlIGlzIHJlc2VydmVkIGZvciBwb3J0 cyB3aXRoaW4gdGhlIHNhbWUgc2lsaWNvbiBhcyBSb290IFBvcnQKIAkgKiB3aGljaCBpcyBub3Qg b3VyIGNhc2UuCiAJICovCi0JYnJpZGdlLT5wY2llX2NvbmYuc2xvdGNhcCA9IGNwdV90b19sZTMy KDEgPDwgUENJX0VYUF9TTFRDQVBfUFNOX1NISUZUKTsKKwlzbG90Y2FwID0gUENJX0VYUF9TTFRD QVBfTkNDUyB8IFBDSV9FWFBfU0xUQ0FQX0hQQyB8CisJCSAgKDEgPDwgUENJX0VYUF9TTFRDQVBf UFNOX1NISUZUKTsKKwlicmlkZ2UtPnBjaWVfY29uZi5zbG90Y2FwID0gY3B1X3RvX2xlMzIoc2xv dGNhcCk7CiAJYnJpZGdlLT5wY2llX2NvbmYuc2xvdHN0YSA9IGNwdV90b19sZTE2KFBDSV9FWFBf U0xUU1RBX1BEUyk7CiAKIAkvKiBJbmRpY2F0ZXMgc3VwcG9ydHMgZm9yIENvbXBsZXRpb24gUmV0 cnkgU3RhdHVzICovCkBAIC0xNTY1LDYgKzE2MDcsMjQgQEAgc3RhdGljIHZvaWQgYWR2a19wY2ll X3JlbW92ZV9ycF9pcnFfZG9tYWluKHN0cnVjdCBhZHZrX3BjaWUgKnBjaWUpCiAJaXJxX2RvbWFp bl9yZW1vdmUocGNpZS0+cnBfaXJxX2RvbWFpbik7CiB9CiAKK3N0YXRpYyB2b2lkIGFkdmtfcGNp ZV9saW5rX2lycV9oYW5kbGVyKHN0cnVjdCB0aW1lcl9saXN0ICp0aW1lcikKK3sKKwlzdHJ1Y3Qg YWR2a19wY2llICpwY2llID0gZnJvbV90aW1lcihwY2llLCB0aW1lciwgbGlua19pcnFfdGltZXIp OworCXUxNiBzbG90Y3RsOworCisJc2xvdGN0bCA9IGxlMTZfdG9fY3B1KHBjaWUtPmJyaWRnZS5w Y2llX2NvbmYuc2xvdGN0bCk7CisJaWYgKCEoc2xvdGN0bCAmIFBDSV9FWFBfU0xUQ1RMX0RMTFND RSkgfHwKKwkgICAgIShzbG90Y3RsICYgUENJX0VYUF9TTFRDVExfSFBJRSkpCisJCXJldHVybjsK KworCS8qCisJICogQWFyZHZhcmsgSFcgcmV0dXJucyB6ZXJvIGZvciBQQ0lfRVhQX0ZMQUdTX0lS USwgc28gdXNlIFBDSWUKKwkgKiBpbnRlcnJ1cHQgMAorCSAqLworCWlmIChnZW5lcmljX2hhbmRs ZV9kb21haW5faXJxKHBjaWUtPnJwX2lycV9kb21haW4sIDApID09IC1FSU5WQUwpCisJCWRldl9l cnJfcmF0ZWxpbWl0ZWQoJnBjaWUtPnBkZXYtPmRldiwgInVuaGFuZGxlZCBIUCBJUlFcbiIpOwor fQorCiBzdGF0aWMgdm9pZCBhZHZrX3BjaWVfaGFuZGxlX3BtZShzdHJ1Y3QgYWR2a19wY2llICpw Y2llKQogewogCXUzMiByZXF1ZXN0ZXIgPSBhZHZrX3JlYWRsKHBjaWUsIFBDSUVfTVNHX0xPR19S RUcpID4+IDE2OwpAQCAtMTYxNiw2ICsxNjc2LDcgQEAgc3RhdGljIHZvaWQgYWR2a19wY2llX2hh bmRsZV9pbnQoc3RydWN0IGFkdmtfcGNpZSAqcGNpZSkKIHsKIAl1MzIgaXNyMF92YWwsIGlzcjBf bWFzaywgaXNyMF9zdGF0dXM7CiAJdTMyIGlzcjFfdmFsLCBpc3IxX21hc2ssIGlzcjFfc3RhdHVz OworCXUxNiBzbG90c3RhOwogCWludCBpOwogCiAJaXNyMF92YWwgPSBhZHZrX3JlYWRsKHBjaWUs IFBDSUVfSVNSMF9SRUcpOwpAQCAtMTY0Miw2ICsxNzAzLDI2IEBAIHN0YXRpYyB2b2lkIGFkdmtf cGNpZV9oYW5kbGVfaW50KHN0cnVjdCBhZHZrX3BjaWUgKnBjaWUpCiAJCQlkZXZfZXJyX3JhdGVs aW1pdGVkKCZwY2llLT5wZGV2LT5kZXYsICJ1bmhhbmRsZWQgRVJSIElSUVxuIik7CiAJfQogCisJ LyogUHJvY2VzcyBMaW5rIERvd24gaW50ZXJydXB0IGFzIEhQIElSUSAqLworCWlmIChpc3IwX3N0 YXR1cyAmIFBDSUVfSVNSMF9MSU5LX0RPV04pIHsKKwkJYWR2a193cml0ZWwocGNpZSwgUENJRV9J U1IwX0xJTktfRE9XTiwgUENJRV9JU1IwX1JFRyk7CisKKwkJZGV2X2luZm8oJnBjaWUtPnBkZXYt PmRldiwgImxpbmsgZG93blxuIik7CisKKwkJcGNpZS0+bGlua193YXNfdXAgPSBmYWxzZTsKKwor CQlzbG90c3RhID0gbGUxNl90b19jcHUocGNpZS0+YnJpZGdlLnBjaWVfY29uZi5zbG90c3RhKTsK KwkJc2xvdHN0YSB8PSBQQ0lfRVhQX1NMVFNUQV9ETExTQzsKKwkJcGNpZS0+YnJpZGdlLnBjaWVf Y29uZi5zbG90c3RhID0gY3B1X3RvX2xlMTYoc2xvdHN0YSk7CisKKwkJLyoKKwkJICogRGVhY3Rp dmF0ZSB0aW1lciBhbmQgY2FsbCBhZHZrX3BjaWVfbGlua19pcnFfaGFuZGxlcigpCisJCSAqIGZ1 bmN0aW9uIGRpcmVjdGx5IGFzIHdlIGFyZSBpbiB0aGUgaW50ZXJydXB0IGNvbnRleHQuCisJCSAq LworCQlkZWxfdGltZXJfc3luYygmcGNpZS0+bGlua19pcnFfdGltZXIpOworCQlhZHZrX3BjaWVf bGlua19pcnFfaGFuZGxlcigmcGNpZS0+bGlua19pcnFfdGltZXIpOworCX0KKwogCS8qIFByb2Nl c3MgTVNJIGludGVycnVwdHMgKi8KIAlpZiAoaXNyMF9zdGF0dXMgJiBQQ0lFX0lTUjBfTVNJX0lO VF9QRU5ESU5HKQogCQlhZHZrX3BjaWVfaGFuZGxlX21zaShwY2llKTsKQEAgLTE4NzcsNiArMTk1 OCwxNCBAQCBzdGF0aWMgaW50IGFkdmtfcGNpZV9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNl ICpwZGV2KQogCWlmIChyZXQpCiAJCXJldHVybiByZXQ7CiAKKwkvKgorCSAqIGdlbmVyaWNfaGFu ZGxlX2RvbWFpbl9pcnEoKSBleHBlY3RzIGxvY2FsIElSUXMgdG8gYmUgZGlzYWJsZWQgc2luY2UK KwkgKiBub3JtYWxseSBpdCBpcyBjYWxsZWQgZnJvbSBpbnRlcnJ1cHQgY29udGV4dCwgc28gdXNl IFRJTUVSX0lSUVNBRkUKKwkgKiBmbGFnIGZvciB0aGlzIGxpbmtfaXJxX3RpbWVyLgorCSAqLwor CXRpbWVyX3NldHVwKCZwY2llLT5saW5rX2lycV90aW1lciwgYWR2a19wY2llX2xpbmtfaXJxX2hh bmRsZXIsCisJCSAgICBUSU1FUl9JUlFTQUZFKTsKKwogCWFkdmtfcGNpZV9zZXR1cF9odyhwY2ll KTsKIAogCXJldCA9IGFkdmtfc3dfcGNpX2JyaWRnZV9pbml0KHBjaWUpOwpAQCAtMTk3MSw2ICsy MDYwLDkgQEAgc3RhdGljIGludCBhZHZrX3BjaWVfcmVtb3ZlKHN0cnVjdCBwbGF0Zm9ybV9kZXZp Y2UgKnBkZXYpCiAJYWR2a19wY2llX3JlbW92ZV9tc2lfaXJxX2RvbWFpbihwY2llKTsKIAlhZHZr X3BjaWVfcmVtb3ZlX2lycV9kb21haW4ocGNpZSk7CiAKKwkvKiBEZWFjdGl2YXRlIGxpbmsgZXZl bnQgdGltZXIgKi8KKwlkZWxfdGltZXJfc3luYygmcGNpZS0+bGlua19pcnFfdGltZXIpOworCiAJ LyogRnJlZSBjb25maWcgc3BhY2UgZm9yIGVtdWxhdGVkIHJvb3QgYnJpZGdlICovCiAJcGNpX2Jy aWRnZV9lbXVsX2NsZWFudXAoJnBjaWUtPmJyaWRnZSk7CiAKLS0gCjIuMzQuMQoKCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwg bWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8v bGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK