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From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v3 5/6] drm/i915: Extract icl_qgv_points_mask()
Date: Mon, 21 Feb 2022 13:10:39 +0200	[thread overview]
Message-ID: <20220221111039.GA17795@intel.com> (raw)
In-Reply-To: <20220218064039.12834-6-ville.syrjala@linux.intel.com>

On Fri, Feb 18, 2022 at 08:40:38AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Declutter intel_bw_atomic_check() a bit by pulling
> the max QGV mask calculation out.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 35 ++++++++++++++++---------
>  1 file changed, 22 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 1fd1d2182d8f..6637da75f878 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -816,6 +816,26 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state *state)
>  	return 0;
>  }
>  
> +static u16 icl_qgv_points_mask(struct drm_i915_private *i915)
> +{
> +	unsigned int num_psf_gv_points = i915->max_bw[0].num_psf_gv_points;
> +	unsigned int num_qgv_points = i915->max_bw[0].num_qgv_points;
> +	u16 mask = 0;
> +
> +	/*
> +	 * We can _not_ use the whole ADLS_QGV_PT_MASK here, as PCode rejects
> +	 * it with failure if we try masking any unadvertised points.
> +	 * So need to operate only with those returned from PCode.
> +	 */
> +	if (num_qgv_points > 0)
> +		mask |= REG_GENMASK(num_qgv_points - 1, 0);
> +
> +	if (num_psf_gv_points > 0)
> +		mask |= REG_GENMASK(num_psf_gv_points - 1, 0) << ADLS_PSF_PT_SHIFT;
> +
> +	return mask;
> +}
> +
>  int intel_bw_atomic_check(struct intel_atomic_state *state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> @@ -831,23 +851,11 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
>  	unsigned int num_qgv_points = dev_priv->max_bw[0].num_qgv_points;
>  	unsigned int num_psf_gv_points = dev_priv->max_bw[0].num_psf_gv_points;
>  	bool changed = false;
> -	u32 mask = 0;
>  
>  	/* FIXME earlier gens need some checks too */
>  	if (DISPLAY_VER(dev_priv) < 11)
>  		return 0;
>  
> -	/*
> -	 * We can _not_ use the whole ADLS_QGV_PT_MASK here, as PCode rejects
> -	 * it with failure if we try masking any unadvertised points.
> -	 * So need to operate only with those returned from PCode.
> -	 */
> -	if (num_qgv_points > 0)
> -		mask |= REG_GENMASK(num_qgv_points - 1, 0);
> -
> -	if (num_psf_gv_points > 0)
> -		mask |= REG_GENMASK(num_psf_gv_points - 1, 0) << ADLS_PSF_PT_SHIFT;
> -
>  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
>  					    new_crtc_state, i) {
>  		unsigned int old_data_rate =
> @@ -979,7 +987,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
>  	 * We store the ones which need to be masked as that is what PCode
>  	 * actually accepts as a parameter.
>  	 */
> -	new_bw_state->qgv_points_mask = ~allowed_points & mask;
> +	new_bw_state->qgv_points_mask = ~allowed_points &
> +		icl_qgv_points_mask(dev_priv);
>  
>  	/*
>  	 * If the actual mask had changed we need to make sure that
> -- 
> 2.34.1
> 

  reply	other threads:[~2022-02-21 11:10 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-18  6:40 [Intel-gfx] [PATCH v3 0/6] drm/i915: SAGV fixes Ville Syrjala
2022-02-18  6:40 ` [Intel-gfx] [PATCH v3 1/6] drm/i915: Correctly populate use_sagv_wm for all pipes Ville Syrjala
2022-02-18  6:40   ` Ville Syrjala
2022-02-18  6:40 ` [Intel-gfx] [PATCH v3 2/6] drm/i915: Fix bw atomic check when switching between SAGV vs. no SAGV Ville Syrjala
2022-02-18  6:40   ` Ville Syrjala
2022-02-18  6:40 ` [Intel-gfx] [PATCH v3 3/6] drm/i915: Split pre-icl vs. icl+ SAGV hooks apart Ville Syrjala
2022-02-18  6:40 ` [Intel-gfx] [PATCH v3 4/6] drm/i915: Pimp icl+ sagv pre/post update Ville Syrjala
2022-02-18  6:40 ` [Intel-gfx] [PATCH v3 5/6] drm/i915: Extract icl_qgv_points_mask() Ville Syrjala
2022-02-21 11:10   ` Lisovskiy, Stanislav [this message]
2022-02-18  6:40 ` [Intel-gfx] [PATCH v3 6/6] drm/i915: Extract intel_bw_check_data_rate() Ville Syrjala
2022-02-18  7:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: SAGV fixes (rev3) Patchwork
2022-02-18 18:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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