From: Dan Carpenter <dan.carpenter@oracle.com>
To: yifan1.zhang@amd.com
Cc: amd-gfx@lists.freedesktop.org
Subject: [bug report] drm/amd/pm: add smu_v13_0_5_ppt implementation
Date: Thu, 24 Feb 2022 12:07:40 +0300 [thread overview]
Message-ID: <20220224090740.GA25946@kili> (raw)
Hello Yifan Zhang,
The patch 068ea8bdc0aa: "drm/amd/pm: add smu_v13_0_5_ppt
implementation" from Jan 21, 2022, leads to the following Smatch
static checker warning:
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_5_ppt.c:444 smu_v13_0_5_set_watermarks_table()
warn: duplicate check 'clock_ranges' (previous on line 441)
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_5_ppt.c
434 static int smu_v13_0_5_set_watermarks_table(struct smu_context *smu,
435 struct pp_smu_wm_range_sets *clock_ranges)
436 {
437 int i;
438 int ret = 0;
439 Watermarks_t *table = smu->smu_table.watermarks_table;
440
441 if (!table || !clock_ranges)
^^^^^^^^^^^^^
442 return -EINVAL;
443
--> 444 if (clock_ranges) {
^^^^^^^^^^^^
This is always true.
445 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
446 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
447 return -EINVAL;
448
449 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
450 table->WatermarkRow[WM_DCFCLK][i].MinClock =
451 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
452 table->WatermarkRow[WM_DCFCLK][i].MaxClock =
453 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
454 table->WatermarkRow[WM_DCFCLK][i].MinMclk =
455 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
456 table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
457 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
458
459 table->WatermarkRow[WM_DCFCLK][i].WmSetting =
460 clock_ranges->reader_wm_sets[i].wm_inst;
461 }
462
463 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
464 table->WatermarkRow[WM_SOCCLK][i].MinClock =
465 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
466 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
467 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
468 table->WatermarkRow[WM_SOCCLK][i].MinMclk =
469 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
470 table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
471 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
472
473 table->WatermarkRow[WM_SOCCLK][i].WmSetting =
474 clock_ranges->writer_wm_sets[i].wm_inst;
475 }
476
477 smu->watermarks_bitmap |= WATERMARKS_EXIST;
478 }
479
480 /* pass data to smu controller */
481 if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
482 !(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
483 ret = smu_cmn_write_watermarks_table(smu);
484 if (ret) {
485 dev_err(smu->adev->dev, "Failed to update WMTABLE!");
486 return ret;
487 }
488 smu->watermarks_bitmap |= WATERMARKS_LOADED;
489 }
490
491 return 0;
492 }
regards,
dan carpenter
reply other threads:[~2022-02-24 9:07 UTC|newest]
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