From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 2/5] drm/i915: Make skl+ universal plane registers unlocked
Date: Thu, 24 Feb 2022 16:38:20 +0200 [thread overview]
Message-ID: <20220224143820.GB19081@intel.com> (raw)
In-Reply-To: <20220210062403.18690-3-ville.syrjala@linux.intel.com>
On Thu, Feb 10, 2022 at 08:24:00AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Drop the locks around most universal plane register writes.
> The lock isn't needed since each plane's register are neatly
> contained on their own cachelines.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> .../drm/i915/display/skl_universal_plane.c | 35 -------------------
> 1 file changed, 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 5b1b089e045d..db9e31c12169 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -615,16 +615,11 @@ skl_plane_disable_arm(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> skl_write_plane_wm(plane, crtc_state);
>
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -634,9 +629,6 @@ icl_plane_disable_arm(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> if (icl_is_hdr_plane(dev_priv, plane_id))
> intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id), 0);
> @@ -646,8 +638,6 @@ icl_plane_disable_arm(struct intel_plane *plane,
> intel_psr2_disable_plane_sel_fetch(plane, crtc_state);
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static bool
> @@ -1106,7 +1096,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
> int crtc_y = plane_state->uapi.dst.y1;
> u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> - unsigned long irqflags;
>
> /* The scaler will handle the output position */
> if (plane_state->scaler_id >= 0) {
> @@ -1114,8 +1103,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
> crtc_y = 0;
> }
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
> PLANE_STRIDE_(stride));
> intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
> @@ -1124,8 +1111,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
> PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1));
>
> skl_write_plane_wm(plane, crtc_state);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1139,7 +1124,6 @@ skl_plane_update_arm(struct intel_plane *plane,
> u32 x = plane_state->view.color_plane[0].x;
> u32 y = plane_state->view.color_plane[0].y;
> u32 plane_ctl, plane_color_ctl = 0;
> - unsigned long irqflags;
>
> plane_ctl = plane_state->ctl |
> skl_plane_ctl_crtc(crtc_state);
> @@ -1148,8 +1132,6 @@ skl_plane_update_arm(struct intel_plane *plane,
> plane_color_ctl = plane_state->color_ctl |
> glk_plane_color_ctl_crtc(crtc_state);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
> intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
> intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
> @@ -1185,8 +1167,6 @@ skl_plane_update_arm(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> skl_plane_surf(plane_state, 0));
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1207,7 +1187,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
> int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> u32 plane_color_ctl;
> - unsigned long irqflags;
>
> plane_color_ctl = plane_state->color_ctl |
> glk_plane_color_ctl_crtc(crtc_state);
> @@ -1218,8 +1197,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
> crtc_y = 0;
> }
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
> PLANE_STRIDE_(stride));
> intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
> @@ -1263,8 +1240,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
> icl_plane_csc_load_black(plane);
>
> intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1277,13 +1252,10 @@ icl_plane_update_arm(struct intel_plane *plane,
> enum pipe pipe = plane->pipe;
> int color_plane = icl_plane_color_plane(plane_state);
> u32 plane_ctl;
> - unsigned long irqflags;
>
> plane_ctl = plane_state->ctl |
> skl_plane_ctl_crtc(crtc_state);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> /*
> * Enable the scaler before the plane so that we don't
> * get a catastrophic underrun even if the two operations
> @@ -1302,8 +1274,6 @@ icl_plane_update_arm(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> skl_plane_surf(plane_state, color_plane));
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1313,7 +1283,6 @@ skl_plane_async_flip(struct intel_plane *plane,
> bool async_flip)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> - unsigned long irqflags;
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> u32 plane_ctl = plane_state->ctl;
> @@ -1323,13 +1292,9 @@ skl_plane_async_flip(struct intel_plane *plane,
> if (async_flip)
> plane_ctl |= PLANE_CTL_ASYNC_FLIP;
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> skl_plane_surf(plane_state, 0));
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static bool intel_format_is_p01x(u32 format)
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-02-24 14:38 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
2022-02-10 6:23 ` [Intel-gfx] [PATCH v2 1/5] drm/i915: Optimize icl+ universal plane programming Ville Syrjala
2022-02-21 11:21 ` Lisovskiy, Stanislav
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 2/5] drm/i915: Make skl+ universal plane registers unlocked Ville Syrjala
2022-02-24 14:38 ` Lisovskiy, Stanislav [this message]
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 3/5] drm/i915: Make cursor " Ville Syrjala
2022-02-11 9:26 ` [Intel-gfx] [PATCH v3 " Ville Syrjala
2022-02-24 14:37 ` Lisovskiy, Stanislav
2022-02-24 17:00 ` Ville Syrjälä
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 4/5] drm/i915: Make most pre-skl primary " Ville Syrjala
2022-02-21 11:19 ` Lisovskiy, Stanislav
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Make pre-skl sprite " Ville Syrjala
2022-02-21 11:18 ` Lisovskiy, Stanislav
2022-02-10 7:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev3) Patchwork
2022-02-10 8:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-10 12:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev4) Patchwork
2022-02-10 14:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-11 18:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev5) Patchwork
2022-02-11 22:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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