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Thu, 24 Feb 2022 15:55:20 -0800 (PST) X-Google-Smtp-Source: ABdhPJy/VsATmojth2uqM5nUm6t1vpGEWqqogoXeU81tqIBlCIjhSne2BXUb+VcNp3pgGNjqCsI86Q== X-Received: by 2002:ac8:7f01:0:b0:2dd:bab8:6885 with SMTP id f1-20020ac87f01000000b002ddbab86885mr4816481qtk.130.1645746920419; Thu, 24 Feb 2022 15:55:20 -0800 (PST) Received: from treble ([2600:1700:6e32:6c00::45]) by smtp.gmail.com with ESMTPSA id d4-20020a05620a136400b0060dda40b3ecsm509760qkl.30.2022.02.24.15.55.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 15:55:19 -0800 (PST) Date: Thu, 24 Feb 2022 15:55:16 -0800 From: Josh Poimboeuf To: Peter Zijlstra Cc: x86@kernel.org, joao@overdrivepizza.com, hjl.tools@gmail.com, andrew.cooper3@citrix.com, linux-kernel@vger.kernel.org, ndesaulniers@google.com, keescook@chromium.org, samitolvanen@google.com, mark.rutland@arm.com, alyssa.milburn@intel.com, mbenes@suse.cz, rostedt@goodmis.org, mhiramat@kernel.org, alexei.starovoitov@gmail.com Subject: Re: [PATCH v2 18/39] x86/ibt: Add IBT feature, MSR and #CP handling Message-ID: <20220224235516.qdikcfdl7jo35iu6@treble> References: <20220224145138.952963315@infradead.org> <20220224151323.069205370@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20220224151323.069205370@infradead.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 24, 2022 at 03:51:56PM +0100, Peter Zijlstra wrote: > +static __always_inline void setup_cet(struct cpuinfo_x86 *c) > +{ > + u64 msr = CET_ENDBR_EN; > + > + if (!HAS_KERNEL_IBT || > + !cpu_feature_enabled(X86_FEATURE_IBT)) > + return; If you add X86_FEATURE_BIT to arch/x86/include/asm/disabled-features.h, the HAS_KERNEL_IBT check becomes redundant. > +bool ibt_selftest(void) > +{ > + unsigned long ret; > + > + asm ("1: lea 2f(%%rip), %%rax\n\t" > + ANNOTATE_RETPOLINE_SAFE > + " jmp *%%rax\n\t" > + ASM_REACHABLE > + ANNOTATE_NOENDBR > + "2: nop\n\t" > + > + /* unsigned ibt_selftest_ip = 2b */ > + ".pushsection .rodata,\"a\"\n\t" > + ".align 8\n\t" > + ".type ibt_selftest_ip, @object\n\t" > + ".size ibt_selftest_ip, 8\n\t" > + "ibt_selftest_ip:\n\t" > + ".quad 2b\n\t" > + ".popsection\n\t" It's still seems silly to make this variable in asm. Also .rodata isn't going to work for CPU hotplug. -- Josh