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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Joao Martins <joao.m.martins@oracle.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>,
	Jason Wang <jasowang@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	qemu-devel@nongnu.org, Daniel Jordan <daniel.m.jordan@oracle.com>,
	David Edmondson <david.edmondson@oracle.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>, Ani Sinha <ani@anisinha.ca>,
	Igor Mammedov <imammedo@redhat.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: Re: [PATCH v3 4/6] i386/pc: relocate 4g start to 1T where applicable
Date: Fri, 25 Feb 2022 07:49:20 -0500	[thread overview]
Message-ID: <20220225074024-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <eb699dff-09d3-e9ba-2c35-3c91966efa13@oracle.com>

On Fri, Feb 25, 2022 at 12:36:24PM +0000, Joao Martins wrote:
> I am trying to approach this iteratively and starting by fixing AMD 1T+ guests
> with something that hopefully is less painful to bear and unbreaks users doing
> multi-TB guests on kernels >= 5.4. While for < 5.4 it would not wrongly be
> DMA mapping bad IOVAs that may lead guests own spurious failures.
> For the longterm, qemu would need some sort of handling of configurable a sparse
> map of all guest RAM which currently does not exist (and it's stuffed inside on a
> per-machine basis as you're aware). What I am unsure is the churn associated
> with it (compat, migration, mem-hotplug, nvdimms, memory-backends) versus benefit
> if it's "just" one class of x86 platforms (Intel not affected) -- which is what I find
> attractive with the past 2 revisions via smaller change.

Right. I pondered this for a while and I wonder whether you considered
making this depend on the guest cpu vendor and max phys bits.  Things
are easier to debug if the memory map is the same whatever the host. The
guest vendor typically matches the host cpu vendor after all, and there
just could be guests avoiding the reserved memory ranges on principle.

We'll need a bunch of code comments explaining all this hackery, as well
as machine type compat things, but that is par for the course.

Additionally, we could have a host check and then fail to init vdpa and
vfio devices if the memory map will make some memory inaccessible.

Does this sound reasonable to others? Alex? Joao?

-- 
MST



  reply	other threads:[~2022-02-25 13:07 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-23 18:44 [PATCH v3 0/6] i386/pc: Fix creation of >= 1010G guests on AMD systems with IOMMU Joao Martins
2022-02-23 18:44 ` [PATCH v3 1/6] hw/i386: add 4g boundary start to X86MachineState Joao Martins
2022-02-23 18:44 ` [PATCH v3 2/6] i386/pc: create pci-host qdev prior to pc_memory_init() Joao Martins
2022-02-23 18:44 ` [PATCH v3 3/6] i386/pc: pass pci_hole64_size " Joao Martins
2022-02-23 18:44 ` [PATCH v3 4/6] i386/pc: relocate 4g start to 1T where applicable Joao Martins
2022-02-23 21:22   ` Michael S. Tsirkin
2022-02-23 23:35     ` Joao Martins
2022-02-24 16:07       ` Joao Martins
2022-02-24 17:23         ` Michael S. Tsirkin
2022-02-24 17:54           ` Joao Martins
2022-02-24 18:30             ` Michael S. Tsirkin
2022-02-24 19:44               ` Joao Martins
2022-02-24 19:54                 ` Michael S. Tsirkin
2022-02-24 20:04                   ` Joao Martins
2022-02-24 20:12                     ` Michael S. Tsirkin
2022-02-24 20:34                       ` Joao Martins
2022-02-24 21:40                         ` Alex Williamson
2022-02-25 12:36                           ` Joao Martins
2022-02-25 12:49                             ` Michael S. Tsirkin [this message]
2022-02-25 17:40                               ` Joao Martins
2022-02-25 16:15                             ` Alex Williamson
2022-02-25 17:40                               ` Joao Martins
2022-02-25  5:22                         ` Michael S. Tsirkin
2022-02-25 12:36                           ` Joao Martins
2022-02-25  3:52               ` Jason Wang
2022-02-24 14:27   ` Joao Martins
2022-02-23 18:44 ` [PATCH v3 5/6] i386/pc: warn if phys-bits is too low Joao Martins
2022-02-24 14:42   ` Joao Martins
2022-02-23 18:44 ` [PATCH v3 6/6] i386/pc: restrict AMD only enforcing of valid IOVAs to new machine type Joao Martins

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