From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tommy Haung Date: Wed, 2 Mar 2022 10:49:30 +0800 Subject: [PATCH v6 5/5] ARM: dtsi: aspeed: Modified gfx reset control In-Reply-To: <20220302024930.18758-1-tommy_huang@aspeedtech.com> References: <20220302024930.18758-1-tommy_huang@aspeedtech.com> Message-ID: <20220302024930.18758-6-tommy_huang@aspeedtech.com> List-Id: To: linux-aspeed@lists.ozlabs.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Remove the ast2500-gfx from aspeed-g6.dtsi. In the AST2600, the ASPEED_RESET_CRT1 is replaced by ASPEED_RESET_GRAPHICS. This is no differnce between these two reset behavior but reigster location is changed. The HW controller states and FW programming resgiter will be reset by CRT reset controller bit (SCU040[13]). And another part HW controller will be reset by Graphics controller bit (SCU040[26]). These two reset bit need be de-assert then the SOC display will be active. Signed-off-by: Tommy Haung --- arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index e38c3742761b..7cc99bc68558 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -352,7 +352,7 @@ }; gfx: display at 1e6e6000 { - compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon"; + compatible = "aspeed,ast2600-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35C15C433EF for ; Wed, 2 Mar 2022 03:36:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yvga/6v/fuTHKVYwsZIXxVi8qmkaZfqeCQK6PEnZMYI=; b=ZP0izt5L0RzsUX 7vA3Kc1vBzGsn79jW1MBrEgC3LKrNYeuSpHtG0dLW+LfpDefp3whC7MX8r5YTEoUGcC6JCK8FP8/E Z0rbyWtrqBVlyYecA/4xV4PE9BTqrgspNkMGMoHAoTeqd08sED0E0/+qDF1WFFfKY8VvwMi59/kvf PLzgkxSuQlsq3IFQHqVyP2U0eK27sCx5cYffvikDotJlPEhlsOLQQcfiPLYymG9/y6GIRJOFyqCOc /ppdZGty+D9UiY24Hrl4WsUg2TOmCrVInQyAW12yZGlKJB39T7ghimkIjopYkiuy0zTEBZLJf6/6j Lu9ONEoZgxp8kLEJhEYA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nPFlU-001JHp-Hr; Wed, 02 Mar 2022 03:35:00 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nPFlJ-001JGI-JV for linux-arm-kernel@bombadil.infradead.org; Wed, 02 Mar 2022 03:34:49 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=coaZ++2kw6d43MMBLkxVZMXqTQPVNAhBbqAogosDdOE=; b=Rx/V1g7tDVNELCAnPT2H9Fe8N+ TKGb8Nl2w+GY3qDLaUgydb0z5ktV5+DydFJXhIxN1cf3JnPI7lfCZCrrM1oz+27r4fyO9ZNuZUIXQ 33O4E0OEFa6AL3nwY+Wf/0DsCTle3YfiHvwcITFz6QHUyR5HlRXicR1VW8erHLE0HIZ00bhblR+VI HAVi2eMSH1XQuwkbTzrD8PnZUyPMSuYbQ67d+3mMTCG+Kf1xaLT9LxmS7vDBid/YyWgIb99Uz4CHj A6FS1OkpXE/AdZxJV9U9gPRAYT7dpFwpzsusq1igNSOl/QqyK16VsSJSVe+B7C3I+FeB876hzVdvP lqFg0BDg==; Received: from twspam01.aspeedtech.com ([211.20.114.71]) by desiato.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nPF4R-00ESbs-Dw for linux-arm-kernel@lists.infradead.org; Wed, 02 Mar 2022 02:50:36 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 2222eK6t029211; Wed, 2 Mar 2022 10:40:20 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from tommy0527-VirtualBox.aspeedtech.com (192.168.2.141) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Mar 2022 10:49:41 +0800 From: Tommy Haung To: , , , , , , , , , CC: Subject: [PATCH v6 5/5] ARM: dtsi: aspeed: Modified gfx reset control Date: Wed, 2 Mar 2022 10:49:30 +0800 Message-ID: <20220302024930.18758-6-tommy_huang@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220302024930.18758-1-tommy_huang@aspeedtech.com> References: <20220302024930.18758-1-tommy_huang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.141] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 2222eK6t029211 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220302_025032_011950_3A1FB208 X-CRM114-Status: GOOD ( 10.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove the ast2500-gfx from aspeed-g6.dtsi. In the AST2600, the ASPEED_RESET_CRT1 is replaced by ASPEED_RESET_GRAPHICS. This is no differnce between these two reset behavior but reigster location is changed. The HW controller states and FW programming resgiter will be reset by CRT reset controller bit (SCU040[13]). And another part HW controller will be reset by Graphics controller bit (SCU040[26]). These two reset bit need be de-assert then the SOC display will be active. Signed-off-by: Tommy Haung --- arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index e38c3742761b..7cc99bc68558 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -352,7 +352,7 @@ }; gfx: display@1e6e6000 { - compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon"; + compatible = "aspeed,ast2600-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15D1FC433F5 for ; Wed, 2 Mar 2022 03:07:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235657AbiCBDHz (ORCPT ); Tue, 1 Mar 2022 22:07:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239183AbiCBDHw (ORCPT ); Tue, 1 Mar 2022 22:07:52 -0500 Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EEC78AEF30 for ; Tue, 1 Mar 2022 19:07:09 -0800 (PST) Received: from twspam01.aspeedtech.com (localhost [127.0.0.2] (may be forged)) by twspam01.aspeedtech.com with ESMTP id 2222eods029299 for ; Wed, 2 Mar 2022 10:40:50 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 2222eK6t029211; Wed, 2 Mar 2022 10:40:20 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from tommy0527-VirtualBox.aspeedtech.com (192.168.2.141) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Mar 2022 10:49:41 +0800 From: Tommy Haung To: , , , , , , , , , CC: Subject: [PATCH v6 5/5] ARM: dtsi: aspeed: Modified gfx reset control Date: Wed, 2 Mar 2022 10:49:30 +0800 Message-ID: <20220302024930.18758-6-tommy_huang@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220302024930.18758-1-tommy_huang@aspeedtech.com> References: <20220302024930.18758-1-tommy_huang@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.2.141] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 2222eK6t029211 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove the ast2500-gfx from aspeed-g6.dtsi. In the AST2600, the ASPEED_RESET_CRT1 is replaced by ASPEED_RESET_GRAPHICS. This is no differnce between these two reset behavior but reigster location is changed. The HW controller states and FW programming resgiter will be reset by CRT reset controller bit (SCU040[13]). And another part HW controller will be reset by Graphics controller bit (SCU040[26]). These two reset bit need be de-assert then the SOC display will be active. Signed-off-by: Tommy Haung --- arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index e38c3742761b..7cc99bc68558 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -352,7 +352,7 @@ }; gfx: display@1e6e6000 { - compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon"; + compatible = "aspeed,ast2600-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 98616C433EF for ; Wed, 2 Mar 2022 03:07:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D57BF10E93C; Wed, 2 Mar 2022 03:07:29 +0000 (UTC) Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) by gabe.freedesktop.org (Postfix) with ESMTPS id E062310E958 for ; Wed, 2 Mar 2022 03:07:27 +0000 (UTC) Received: from twspam01.aspeedtech.com (localhost [127.0.0.2] (may be forged)) by twspam01.aspeedtech.com with ESMTP id 2222f5Pu029328 for ; Wed, 2 Mar 2022 10:41:05 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 2222eK6t029211; Wed, 2 Mar 2022 10:40:20 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from tommy0527-VirtualBox.aspeedtech.com (192.168.2.141) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Mar 2022 10:49:41 +0800 From: Tommy Haung To: , , , , , , , , , Subject: [PATCH v6 5/5] ARM: dtsi: aspeed: Modified gfx reset control Date: Wed, 2 Mar 2022 10:49:30 +0800 Message-ID: <20220302024930.18758-6-tommy_huang@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220302024930.18758-1-tommy_huang@aspeedtech.com> References: <20220302024930.18758-1-tommy_huang@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.2.141] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 2222eK6t029211 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: BMC-SW@aspeedtech.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Remove the ast2500-gfx from aspeed-g6.dtsi. In the AST2600, the ASPEED_RESET_CRT1 is replaced by ASPEED_RESET_GRAPHICS. This is no differnce between these two reset behavior but reigster location is changed. The HW controller states and FW programming resgiter will be reset by CRT reset controller bit (SCU040[13]). And another part HW controller will be reset by Graphics controller bit (SCU040[26]). These two reset bit need be de-assert then the SOC display will be active. Signed-off-by: Tommy Haung --- arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index e38c3742761b..7cc99bc68558 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -352,7 +352,7 @@ }; gfx: display@1e6e6000 { - compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon"; + compatible = "aspeed,ast2600-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; -- 2.17.1