Re: [PATCH 4/5] PCI: imx6: add PCIe embedded DMA support

[Bjorn Helgaas <helgaas@kernel.org>]

On Wed, Mar 02, 2022 at 03:28:48PM -0600, Zhi Li wrote:
> On Wed, Mar 2, 2022 at 3:21 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
> > On Wed, Mar 02, 2022 at 02:49:45PM -0600, Zhi Li wrote:
> > > On Wed, Mar 2, 2022 at 2:15 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
> > > > On Tue, Mar 01, 2022 at 09:26:45PM -0600, Frank Li wrote:
> > > > > ...

> > > > > The DMA can transfer data to any remote address location
> > > > > regardless PCI address space size.
> > > >
> > > > What is this sentence telling us?  Is it merely that the DMA "inbound
> > > > address space" may be larger than the MMIO "outbound address space"?
> > > > I think there's no necessary connection between them, and there's no
> > > > need to call it out as though it's something special.
> > >
> > > There are outbound address windows. such as 256M, but RC sides have more
> > > than 256M ddr memory, such as 16GB. If CPU or external DMA controller,
> > > only can access 256M
> > > address space.
> > >
> > > But if using an embedded DMA controller,  it can access the whole RC's
> > > 16G address without
> > > changing iAtu mapping.
> > >
> > > I want to say why I need enable embedded DMA for EP.
> >
> > OK, so if IIUC, the DMA controller is embedded in the imx6 host bridge
> > (of course; that's obvious from what you're doing here).  And unlike
> > DMA from devices *below* the host bridge, DMAs from the embedded
> > controller don't go through the iATU, so they are not subject to any
> > of the iATU limitations.  Right?
> 
> Yes!

I guess that means the DMA controller is functionally and logically
sort of a separate device from the PCI host bridge?  Sounds like the
DMA controller doesn't receive or generate PCI transactions?

Bjorn