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From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, android-kvm@google.com,
	Ard Biesheuvel <ardb@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Will Deacon <will@kernel.org>
Subject: [RFC PATCH 8/8] arm64: efi: leave MMU and caches on when handing over to the core kernel
Date: Fri,  4 Mar 2022 18:56:57 +0100	[thread overview]
Message-ID: <20220304175657.2744400-9-ardb@kernel.org> (raw)
In-Reply-To: <20220304175657.2744400-1-ardb@kernel.org>

Instead of cleaning the entire kernel image to the PoC and enter with
the MMU and caches disabled, leave them on and let the primary boot code
deal with this if we are executing at EL1.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/kernel/efi-entry.S      | 20 ++++++++++----------
 drivers/firmware/efi/libstub/fdt.c |  6 ++++--
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 61a87fa1c305..7eca829869b4 100644
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -23,6 +23,10 @@ SYM_CODE_START(efi_enter_kernel)
 	add	x19, x0, x2		// relocated Image entrypoint
 	mov	x20, x1			// DTB address
 
+	mrs	x0, CurrentEL
+	cmp	x0, #CurrentEL_EL2
+	b.ne	1f
+
 	/*
 	 * Clean the copied Image to the PoC, and ensure it is not shadowed by
 	 * stale icache entries from before relocation.
@@ -41,29 +45,25 @@ SYM_CODE_START(efi_enter_kernel)
 	bl	dcache_clean_poc
 0:
 	/* Turn off Dcache and MMU */
-	mrs	x0, CurrentEL
-	cmp	x0, #CurrentEL_EL2
-	b.ne	1f
 	mrs	x0, sctlr_el2
 	bic	x0, x0, #1 << 0	// clear SCTLR.M
 	bic	x0, x0, #1 << 2	// clear SCTLR.C
 	pre_disable_mmu_workaround
 	msr	sctlr_el2, x0
 	isb
+	mov	x1, xzr
 	b	2f
 1:
-	mrs	x0, sctlr_el1
-	bic	x0, x0, #1 << 0	// clear SCTLR.M
-	bic	x0, x0, #1 << 2	// clear SCTLR.C
-	pre_disable_mmu_workaround
-	msr	sctlr_el1, x0
-	isb
+	ldr_l	x1, kaslr_seed
 2:
 	/* Jump to kernel entry point */
 	mov	x0, x20
-	mov	x1, xzr
 	mov	x2, xzr
 	mov	x3, xzr
 	br	x19
 3:
 SYM_CODE_END(efi_enter_kernel)
+
+	.section ".bss", "aw", %nobits
+	.align	3
+SYM_DATA(kaslr_seed, .quad 0x0)
diff --git a/drivers/firmware/efi/libstub/fdt.c b/drivers/firmware/efi/libstub/fdt.c
index fe567be0f118..ec34c29d311d 100644
--- a/drivers/firmware/efi/libstub/fdt.c
+++ b/drivers/firmware/efi/libstub/fdt.c
@@ -137,11 +137,13 @@ static efi_status_t update_fdt(void *orig_fdt, unsigned long orig_fdt_size,
 		goto fdt_set_fail;
 
 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && !efi_nokaslr) {
+		extern u64 kaslr_seed;
 		efi_status_t efi_status;
 
-		efi_status = efi_get_random_bytes(sizeof(fdt_val64),
-						  (u8 *)&fdt_val64);
+		efi_status = efi_get_random_bytes(sizeof(kaslr_seed),
+						  (u8 *)&kaslr_seed);
 		if (efi_status == EFI_SUCCESS) {
+			fdt_val64 = cpu_to_fdt64(kaslr_seed);
 			status = fdt_setprop_var(fdt, node, "kaslr-seed", fdt_val64);
 			if (status)
 				goto fdt_set_fail;
-- 
2.30.2


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      parent reply	other threads:[~2022-03-04 18:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-04 17:56 [RFC PATCH 0/8] arm64: efi: leave MMU and caches on at boot Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 1/8] arm64: kaslr: deal with init called with VA randomization enabled Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 2/8] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 3/8] arm64: head: take KASLR seed passed via x1 into account Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 4/8] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 5/8] arm64: head: populate page tables before disabling the MMU Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 6/8] arm64: head: clean the ID map page to the PoC Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 7/8] arm64: lds: move idmap_pg_dir out of .rodata Ard Biesheuvel
2022-03-04 17:56 ` Ard Biesheuvel [this message]

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