From: "Philippe Mathieu-Daudé" <philippe.mathieu.daude@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Thomas Huth" <thuth@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 28/33] target: Use forward declared type instead of structure type
Date: Sun, 6 Mar 2022 13:59:55 +0100 [thread overview]
Message-ID: <20220306130000.8104-29-philippe.mathieu.daude@gmail.com> (raw)
In-Reply-To: <20220306130000.8104-1-philippe.mathieu.daude@gmail.com>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
The CPU / CPU state are forward declared.
$ git grep -E 'struct [A-Za-z]+CPU\ \*'
target/arm/hvf_arm.h:16:void hvf_arm_set_cpu_features_from_host(struct ARMCPU *cpu);
target/openrisc/cpu.h:234: int (*cpu_openrisc_map_address_code)(struct OpenRISCCPU *cpu,
target/openrisc/cpu.h:238: int (*cpu_openrisc_map_address_data)(struct OpenRISCCPU *cpu,
$ git grep -E 'struct CPU[A-Za-z]+State\ \*'
target/mips/internal.h:137: int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot,
target/mips/internal.h:139: void (*helper_tlbwi)(struct CPUMIPSState *env);
target/mips/internal.h:140: void (*helper_tlbwr)(struct CPUMIPSState *env);
target/mips/internal.h:141: void (*helper_tlbp)(struct CPUMIPSState *env);
target/mips/internal.h:142: void (*helper_tlbr)(struct CPUMIPSState *env);
target/mips/internal.h:143: void (*helper_tlbinv)(struct CPUMIPSState *env);
target/mips/internal.h:144: void (*helper_tlbinvf)(struct CPUMIPSState *env);
target/xtensa/cpu.h:347: struct CPUXtensaState *env;
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-12-f4bug@amsat.org>
---
target/arm/hvf_arm.h | 2 +-
target/mips/internal.h | 14 +++++++-------
target/openrisc/cpu.h | 4 ++--
target/xtensa/cpu.h | 2 +-
target/i386/nvmm/nvmm-all.c | 14 +++++++-------
target/i386/whpx/whpx-all.c | 18 +++++++++---------
6 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/target/arm/hvf_arm.h b/target/arm/hvf_arm.h
index ea238cff83f..9a9d1a0bf59 100644
--- a/target/arm/hvf_arm.h
+++ b/target/arm/hvf_arm.h
@@ -13,6 +13,6 @@
#include "cpu.h"
-void hvf_arm_set_cpu_features_from_host(struct ARMCPU *cpu);
+void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu);
#endif
diff --git a/target/mips/internal.h b/target/mips/internal.h
index f705d6bfa61..ac6e03e2f25 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -134,14 +134,14 @@ struct r4k_tlb_t {
struct CPUMIPSTLBContext {
uint32_t nb_tlb;
uint32_t tlb_in_use;
- int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot,
+ int (*map_address)(CPUMIPSState *env, hwaddr *physical, int *prot,
target_ulong address, MMUAccessType access_type);
- void (*helper_tlbwi)(struct CPUMIPSState *env);
- void (*helper_tlbwr)(struct CPUMIPSState *env);
- void (*helper_tlbp)(struct CPUMIPSState *env);
- void (*helper_tlbr)(struct CPUMIPSState *env);
- void (*helper_tlbinv)(struct CPUMIPSState *env);
- void (*helper_tlbinvf)(struct CPUMIPSState *env);
+ void (*helper_tlbwi)(CPUMIPSState *env);
+ void (*helper_tlbwr)(CPUMIPSState *env);
+ void (*helper_tlbp)(CPUMIPSState *env);
+ void (*helper_tlbr)(CPUMIPSState *env);
+ void (*helper_tlbinv)(CPUMIPSState *env);
+ void (*helper_tlbinvf)(CPUMIPSState *env);
union {
struct {
r4k_tlb_t tlb[MIPS_TLB_MAX];
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index ee069b080c9..5711591520d 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -231,11 +231,11 @@ typedef struct CPUOpenRISCTLBContext {
OpenRISCTLBEntry itlb[TLB_SIZE];
OpenRISCTLBEntry dtlb[TLB_SIZE];
- int (*cpu_openrisc_map_address_code)(struct OpenRISCCPU *cpu,
+ int (*cpu_openrisc_map_address_code)(OpenRISCCPU *cpu,
hwaddr *physical,
int *prot,
target_ulong address, int rw);
- int (*cpu_openrisc_map_address_data)(struct OpenRISCCPU *cpu,
+ int (*cpu_openrisc_map_address_data)(OpenRISCCPU *cpu,
hwaddr *physical,
int *prot,
target_ulong address, int rw);
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 02143f2f776..f2165b17e2d 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -344,7 +344,7 @@ typedef struct XtensaGdbRegmap {
} XtensaGdbRegmap;
typedef struct XtensaCcompareTimer {
- struct CPUXtensaState *env;
+ CPUXtensaState *env;
QEMUTimer *timer;
} XtensaCcompareTimer;
diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c
index 9af261eea32..e159dd2b939 100644
--- a/target/i386/nvmm/nvmm-all.c
+++ b/target/i386/nvmm/nvmm-all.c
@@ -85,7 +85,7 @@ nvmm_set_segment(struct nvmm_x64_state_seg *nseg, const SegmentCache *qseg)
static void
nvmm_set_registers(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
+ CPUX86State *env = (CPUArchState *)cpu->env_ptr;
struct nvmm_machine *mach = get_nvmm_mach();
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
@@ -222,7 +222,7 @@ nvmm_get_segment(SegmentCache *qseg, const struct nvmm_x64_state_seg *nseg)
static void
nvmm_get_registers(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
+ CPUX86State *env = (CPUArchState *)cpu->env_ptr;
struct nvmm_machine *mach = get_nvmm_mach();
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
@@ -347,7 +347,7 @@ nvmm_get_registers(CPUState *cpu)
static bool
nvmm_can_take_int(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
+ CPUX86State *env = (CPUArchState *)cpu->env_ptr;
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
struct nvmm_machine *mach = get_nvmm_mach();
@@ -394,7 +394,7 @@ nvmm_can_take_nmi(CPUState *cpu)
static void
nvmm_vcpu_pre_run(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
+ CPUX86State *env = (CPUArchState *)cpu->env_ptr;
struct nvmm_machine *mach = get_nvmm_mach();
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
@@ -480,7 +480,7 @@ static void
nvmm_vcpu_post_run(CPUState *cpu, struct nvmm_vcpu_exit *exit)
{
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
- struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
+ CPUX86State *env = (CPUArchState *)cpu->env_ptr;
X86CPU *x86_cpu = X86_CPU(cpu);
uint64_t tpr;
@@ -652,7 +652,7 @@ static int
nvmm_handle_halted(struct nvmm_machine *mach, CPUState *cpu,
struct nvmm_vcpu_exit *exit)
{
- struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
+ CPUX86State *env = (CPUArchState *)cpu->env_ptr;
int ret = 0;
qemu_mutex_lock_iothread();
@@ -685,7 +685,7 @@ nvmm_inject_ud(struct nvmm_machine *mach, struct nvmm_vcpu *vcpu)
static int
nvmm_vcpu_loop(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
+ CPUX86State *env = (CPUArchState *)cpu->env_ptr;
struct nvmm_machine *mach = get_nvmm_mach();
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index ef896da0a21..a8222461440 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -221,7 +221,7 @@ static SegmentCache whpx_seg_h2q(const WHV_X64_SEGMENT_REGISTER *hs)
static int whpx_set_tsc(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
WHV_REGISTER_NAME tsc_reg = WHvX64RegisterTsc;
WHV_REGISTER_VALUE tsc_val;
HRESULT hr;
@@ -260,7 +260,7 @@ static void whpx_set_registers(CPUState *cpu, int level)
{
struct whpx_state *whpx = &whpx_global;
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
X86CPU *x86_cpu = X86_CPU(cpu);
struct whpx_register_set vcxt;
HRESULT hr;
@@ -428,7 +428,7 @@ static void whpx_set_registers(CPUState *cpu, int level)
static int whpx_get_tsc(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
WHV_REGISTER_NAME tsc_reg = WHvX64RegisterTsc;
WHV_REGISTER_VALUE tsc_val;
HRESULT hr;
@@ -449,7 +449,7 @@ static void whpx_get_registers(CPUState *cpu)
{
struct whpx_state *whpx = &whpx_global;
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
X86CPU *x86_cpu = X86_CPU(cpu);
struct whpx_register_set vcxt;
uint64_t tpr, apic_base;
@@ -760,7 +760,7 @@ static int whpx_handle_portio(CPUState *cpu,
static int whpx_handle_halt(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
int ret = 0;
qemu_mutex_lock_iothread();
@@ -781,7 +781,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu)
HRESULT hr;
struct whpx_state *whpx = &whpx_global;
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
X86CPU *x86_cpu = X86_CPU(cpu);
int irq;
uint8_t tpr;
@@ -903,7 +903,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu)
static void whpx_vcpu_post_run(CPUState *cpu)
{
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
X86CPU *x86_cpu = X86_CPU(cpu);
env->eflags = vcpu->exit_ctx.VpContext.Rflags;
@@ -927,7 +927,7 @@ static void whpx_vcpu_post_run(CPUState *cpu)
static void whpx_vcpu_process_async_events(CPUState *cpu)
{
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
X86CPU *x86_cpu = X86_CPU(cpu);
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
@@ -1333,7 +1333,7 @@ int whpx_init_vcpu(CPUState *cpu)
struct whpx_state *whpx = &whpx_global;
struct whpx_vcpu *vcpu = NULL;
Error *local_error = NULL;
- struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
+ CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
X86CPU *x86_cpu = X86_CPU(cpu);
UINT64 freq = 0;
int ret;
--
2.35.1
next prev parent reply other threads:[~2022-03-06 13:35 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-06 12:59 [PULL 00/33] Abstract ArchCPU Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 01/33] accel: Restrict sysemu stubs to system emulation Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 02/33] accel/meson: Only build hw virtualization with " Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 03/33] exec: Declare vaddr as a generic target-agnostic type Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 04/33] exec: Make cpu_memory_rw_debug() target agnostic Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 05/33] sysemu/memory_mapping: Become target-agnostic Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 06/33] sysemu/kvm: Make kvm_on_sigbus() / kvm_on_sigbus_vcpu() target agnostic Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 07/33] accel/kvm: Simplify user-mode #ifdef'ry Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 08/33] accel/hax: Introduce CONFIG_HAX_IS_POSSIBLE Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 09/33] softmmu/cpus: Code movement Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 10/33] accel: Introduce AccelOpsClass::cpu_thread_is_idle() Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 11/33] accel: Introduce AccelOpsClass::cpus_are_resettable() Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 12/33] softmmu/globals: Remove unused 'hw/i386/*' headers Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 13/33] softmmu/physmem: Remove unnecessary include Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 14/33] softmmu/cpu-timers: Remove unused 'exec/exec-all.h' header Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 15/33] misc: Remove unnecessary "sysemu/cpu-timers.h" include Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 16/33] misc: Add missing " Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 17/33] exec/gdbstub: Make gdb_exit() / gdb_set_stop_cpu() target agnostic Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 18/33] exec/cpu: Make address_space_init/reloading_memory_map " Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 19/33] softmmu: Add qemu_init_arch_modules() Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 20/33] softmmu: Build target-agnostic objects once Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 21/33] meson: Display libfdt as disabled when system emulation is disabled Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 22/33] exec/cpu_ldst: Include 'cpu.h' to get target_ulong definition Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 23/33] cpu: Add missing 'exec/exec-all.h' and 'qemu/accel.h' headers Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 24/33] target/i386/tcg/sysemu: Include missing 'exec/exec-all.h' header Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 25/33] Hexagon (target/hexagon) convert to OBJECT_DECLARE_TYPE Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 26/33] target: Include missing 'cpu.h' Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 27/33] target/hexagon: Add missing 'hw/core/cpu.h' include Philippe Mathieu-Daudé
2022-03-06 12:59 ` Philippe Mathieu-Daudé [this message]
2022-03-06 21:25 ` [PULL 28/33] target: Use forward declared type instead of structure type Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 29/33] target: Use CPUArchState as interface to target-specific CPU state Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 30/33] target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 31/33] target: Use ArchCPU as interface to target CPU Philippe Mathieu-Daudé
2022-03-06 12:59 ` [PULL 32/33] target/i386: Remove pointless CPUArchState casts Philippe Mathieu-Daudé
2022-03-06 13:00 ` [PULL 33/33] accel/tcg: " Philippe Mathieu-Daudé
2022-03-06 18:16 ` [PULL 00/33] Abstract ArchCPU Peter Maydell
2022-03-06 19:06 ` Philippe Mathieu-Daudé
2022-03-06 19:56 ` Peter Maydell
2022-03-06 21:13 ` Philippe Mathieu-Daudé
2022-03-07 11:51 ` Peter Maydell
2022-03-07 12:12 ` Daniel P. Berrangé
2022-03-07 12:17 ` Peter Maydell
2022-03-07 12:27 ` Daniel P. Berrangé
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